1 /* 2 * x86/vmx.c : Framework for testing nested virtualization 3 * This is a framework to test nested VMX for KVM, which 4 * started as a project of GSoC 2013. All test cases should 5 * be located in x86/vmx_tests.c and framework related 6 * functions should be in this file. 7 * 8 * How to write test cases? 9 * Add callbacks of test suite in variant "vmx_tests". You can 10 * write: 11 * 1. init function used for initializing test suite 12 * 2. main function for codes running in L2 guest, 13 * 3. exit_handler to handle vmexit of L2 to L1 14 * 4. syscall handler to handle L2 syscall vmexit 15 * 5. vmenter fail handler to handle direct failure of vmenter 16 * 6. guest_regs is loaded when vmenter and saved when 17 * vmexit, you can read and set it in exit_handler 18 * If no special function is needed for a test suite, use 19 * coressponding basic_* functions as callback. More handlers 20 * can be added to "vmx_tests", see details of "struct vmx_test" 21 * and function test_run(). 22 * 23 * Currently, vmx test framework only set up one VCPU and one 24 * concurrent guest test environment with same paging for L2 and 25 * L1. For usage of EPT, only 1:1 mapped paging is used from VFN 26 * to PFN. 27 * 28 * Author : Arthur Chunqi Li <yzt356@gmail.com> 29 */ 30 31 #include "libcflat.h" 32 #include "processor.h" 33 #include "vm.h" 34 #include "desc.h" 35 #include "vmx.h" 36 #include "msr.h" 37 #include "smp.h" 38 #include "io.h" 39 40 u64 *vmxon_region; 41 struct vmcs *vmcs_root; 42 u32 vpid_cnt; 43 void *guest_stack, *guest_syscall_stack; 44 u32 ctrl_pin, ctrl_enter, ctrl_exit, ctrl_cpu[2]; 45 struct regs regs; 46 struct vmx_test *current; 47 u64 hypercall_field; 48 bool launched; 49 u64 host_rflags; 50 51 union vmx_basic basic; 52 union vmx_ctrl_msr ctrl_pin_rev; 53 union vmx_ctrl_msr ctrl_cpu_rev[2]; 54 union vmx_ctrl_msr ctrl_exit_rev; 55 union vmx_ctrl_msr ctrl_enter_rev; 56 union vmx_ept_vpid ept_vpid; 57 58 extern struct descriptor_table_ptr gdt64_desc; 59 extern struct descriptor_table_ptr idt_descr; 60 extern struct descriptor_table_ptr tss_descr; 61 extern void *vmx_return; 62 extern void *entry_sysenter; 63 extern void *guest_entry; 64 65 static volatile u32 stage; 66 67 void vmx_set_test_stage(u32 s) 68 { 69 barrier(); 70 stage = s; 71 barrier(); 72 } 73 74 u32 vmx_get_test_stage(void) 75 { 76 u32 s; 77 78 barrier(); 79 s = stage; 80 barrier(); 81 return s; 82 } 83 84 void vmx_inc_test_stage(void) 85 { 86 barrier(); 87 stage++; 88 barrier(); 89 } 90 91 static int make_vmcs_current(struct vmcs *vmcs) 92 { 93 bool ret; 94 u64 rflags = read_rflags() | X86_EFLAGS_CF | X86_EFLAGS_ZF; 95 96 asm volatile ("push %1; popf; vmptrld %2; setbe %0" 97 : "=q" (ret) : "q" (rflags), "m" (vmcs) : "cc"); 98 return ret; 99 } 100 101 /* entry_sysenter */ 102 asm( 103 ".align 4, 0x90\n\t" 104 ".globl entry_sysenter\n\t" 105 "entry_sysenter:\n\t" 106 SAVE_GPR 107 " and $0xf, %rax\n\t" 108 " mov %rax, %rdi\n\t" 109 " call syscall_handler\n\t" 110 LOAD_GPR 111 " vmresume\n\t" 112 ); 113 114 static void __attribute__((__used__)) syscall_handler(u64 syscall_no) 115 { 116 if (current->syscall_handler) 117 current->syscall_handler(syscall_no); 118 } 119 120 static inline int vmx_on() 121 { 122 bool ret; 123 u64 rflags = read_rflags() | X86_EFLAGS_CF | X86_EFLAGS_ZF; 124 asm volatile ("push %1; popf; vmxon %2; setbe %0\n\t" 125 : "=q" (ret) : "q" (rflags), "m" (vmxon_region) : "cc"); 126 return ret; 127 } 128 129 static inline int vmx_off() 130 { 131 bool ret; 132 u64 rflags = read_rflags() | X86_EFLAGS_CF | X86_EFLAGS_ZF; 133 134 asm volatile("push %1; popf; vmxoff; setbe %0\n\t" 135 : "=q"(ret) : "q" (rflags) : "cc"); 136 return ret; 137 } 138 139 void print_vmexit_info() 140 { 141 u64 guest_rip, guest_rsp; 142 ulong reason = vmcs_read(EXI_REASON) & 0xff; 143 ulong exit_qual = vmcs_read(EXI_QUALIFICATION); 144 guest_rip = vmcs_read(GUEST_RIP); 145 guest_rsp = vmcs_read(GUEST_RSP); 146 printf("VMEXIT info:\n"); 147 printf("\tvmexit reason = %d\n", reason); 148 printf("\texit qualification = 0x%x\n", exit_qual); 149 printf("\tBit 31 of reason = %x\n", (vmcs_read(EXI_REASON) >> 31) & 1); 150 printf("\tguest_rip = 0x%llx\n", guest_rip); 151 printf("\tRAX=0x%llx RBX=0x%llx RCX=0x%llx RDX=0x%llx\n", 152 regs.rax, regs.rbx, regs.rcx, regs.rdx); 153 printf("\tRSP=0x%llx RBP=0x%llx RSI=0x%llx RDI=0x%llx\n", 154 guest_rsp, regs.rbp, regs.rsi, regs.rdi); 155 printf("\tR8 =0x%llx R9 =0x%llx R10=0x%llx R11=0x%llx\n", 156 regs.r8, regs.r9, regs.r10, regs.r11); 157 printf("\tR12=0x%llx R13=0x%llx R14=0x%llx R15=0x%llx\n", 158 regs.r12, regs.r13, regs.r14, regs.r15); 159 } 160 161 static void test_vmclear(void) 162 { 163 struct vmcs *tmp_root; 164 int width = cpuid(0x80000008).a & 0xff; 165 166 /* 167 * Note- The tests below do not necessarily have a 168 * valid VMCS, but that's ok since the invalid vmcs 169 * is only used for a specific test and is discarded 170 * without touching its contents 171 */ 172 173 /* Unaligned page access */ 174 tmp_root = (struct vmcs *)((intptr_t)vmcs_root + 1); 175 report("test vmclear with unaligned vmcs", 176 vmcs_clear(tmp_root) == 1); 177 178 /* gpa bits beyond physical address width are set*/ 179 tmp_root = (struct vmcs *)((intptr_t)vmcs_root | 180 ((u64)1 << (width+1))); 181 report("test vmclear with vmcs address bits set beyond physical address width", 182 vmcs_clear(tmp_root) == 1); 183 184 /* Pass VMXON region */ 185 tmp_root = (struct vmcs *)vmxon_region; 186 report("test vmclear with vmxon region", 187 vmcs_clear(tmp_root) == 1); 188 189 /* Valid VMCS */ 190 report("test vmclear with valid vmcs region", vmcs_clear(vmcs_root) == 0); 191 192 } 193 194 static void test_vmxoff(void) 195 { 196 int ret; 197 198 ret = vmx_off(); 199 report("test vmxoff", !ret); 200 } 201 202 static void __attribute__((__used__)) guest_main(void) 203 { 204 current->guest_main(); 205 } 206 207 /* guest_entry */ 208 asm( 209 ".align 4, 0x90\n\t" 210 ".globl entry_guest\n\t" 211 "guest_entry:\n\t" 212 " call guest_main\n\t" 213 " mov $1, %edi\n\t" 214 " call hypercall\n\t" 215 ); 216 217 /* EPT paging structure related functions */ 218 /* install_ept_entry : Install a page to a given level in EPT 219 @pml4 : addr of pml4 table 220 @pte_level : level of PTE to set 221 @guest_addr : physical address of guest 222 @pte : pte value to set 223 @pt_page : address of page table, NULL for a new page 224 */ 225 void install_ept_entry(unsigned long *pml4, 226 int pte_level, 227 unsigned long guest_addr, 228 unsigned long pte, 229 unsigned long *pt_page) 230 { 231 int level; 232 unsigned long *pt = pml4; 233 unsigned offset; 234 235 for (level = EPT_PAGE_LEVEL; level > pte_level; --level) { 236 offset = (guest_addr >> ((level-1) * EPT_PGDIR_WIDTH + 12)) 237 & EPT_PGDIR_MASK; 238 if (!(pt[offset] & (EPT_PRESENT))) { 239 unsigned long *new_pt = pt_page; 240 if (!new_pt) 241 new_pt = alloc_page(); 242 else 243 pt_page = 0; 244 memset(new_pt, 0, PAGE_SIZE); 245 pt[offset] = virt_to_phys(new_pt) 246 | EPT_RA | EPT_WA | EPT_EA; 247 } else 248 pt[offset] &= ~EPT_LARGE_PAGE; 249 pt = phys_to_virt(pt[offset] & 0xffffffffff000ull); 250 } 251 offset = ((unsigned long)guest_addr >> ((level-1) * 252 EPT_PGDIR_WIDTH + 12)) & EPT_PGDIR_MASK; 253 pt[offset] = pte; 254 } 255 256 /* Map a page, @perm is the permission of the page */ 257 void install_ept(unsigned long *pml4, 258 unsigned long phys, 259 unsigned long guest_addr, 260 u64 perm) 261 { 262 install_ept_entry(pml4, 1, guest_addr, (phys & PAGE_MASK) | perm, 0); 263 } 264 265 /* Map a 1G-size page */ 266 void install_1g_ept(unsigned long *pml4, 267 unsigned long phys, 268 unsigned long guest_addr, 269 u64 perm) 270 { 271 install_ept_entry(pml4, 3, guest_addr, 272 (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 273 } 274 275 /* Map a 2M-size page */ 276 void install_2m_ept(unsigned long *pml4, 277 unsigned long phys, 278 unsigned long guest_addr, 279 u64 perm) 280 { 281 install_ept_entry(pml4, 2, guest_addr, 282 (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 283 } 284 285 /* setup_ept_range : Setup a range of 1:1 mapped page to EPT paging structure. 286 @start : start address of guest page 287 @len : length of address to be mapped 288 @map_1g : whether 1G page map is used 289 @map_2m : whether 2M page map is used 290 @perm : permission for every page 291 */ 292 void setup_ept_range(unsigned long *pml4, unsigned long start, 293 unsigned long len, int map_1g, int map_2m, u64 perm) 294 { 295 u64 phys = start; 296 u64 max = (u64)len + (u64)start; 297 298 if (map_1g) { 299 while (phys + PAGE_SIZE_1G <= max) { 300 install_1g_ept(pml4, phys, phys, perm); 301 phys += PAGE_SIZE_1G; 302 } 303 } 304 if (map_2m) { 305 while (phys + PAGE_SIZE_2M <= max) { 306 install_2m_ept(pml4, phys, phys, perm); 307 phys += PAGE_SIZE_2M; 308 } 309 } 310 while (phys + PAGE_SIZE <= max) { 311 install_ept(pml4, phys, phys, perm); 312 phys += PAGE_SIZE; 313 } 314 } 315 316 /* get_ept_pte : Get the PTE of a given level in EPT, 317 @level == 1 means get the latest level*/ 318 unsigned long get_ept_pte(unsigned long *pml4, 319 unsigned long guest_addr, int level) 320 { 321 int l; 322 unsigned long *pt = pml4, pte; 323 unsigned offset; 324 325 for (l = EPT_PAGE_LEVEL; l > 1; --l) { 326 offset = (guest_addr >> (((l-1) * EPT_PGDIR_WIDTH) + 12)) 327 & EPT_PGDIR_MASK; 328 pte = pt[offset]; 329 if (!(pte & (EPT_PRESENT))) 330 return 0; 331 if (l == level) 332 return pte; 333 if (l < 4 && (pte & EPT_LARGE_PAGE)) 334 return pte; 335 pt = (unsigned long *)(pte & 0xffffffffff000ull); 336 } 337 offset = (guest_addr >> (((l-1) * EPT_PGDIR_WIDTH) + 12)) 338 & EPT_PGDIR_MASK; 339 pte = pt[offset]; 340 return pte; 341 } 342 343 void ept_sync(int type, u64 eptp) 344 { 345 switch (type) { 346 case INVEPT_SINGLE: 347 if (ept_vpid.val & EPT_CAP_INVEPT_SINGLE) { 348 invept(INVEPT_SINGLE, eptp); 349 break; 350 } 351 /* else fall through */ 352 case INVEPT_GLOBAL: 353 if (ept_vpid.val & EPT_CAP_INVEPT_ALL) { 354 invept(INVEPT_GLOBAL, eptp); 355 break; 356 } 357 /* else fall through */ 358 default: 359 printf("WARNING: invept is not supported!\n"); 360 } 361 } 362 363 int set_ept_pte(unsigned long *pml4, unsigned long guest_addr, 364 int level, u64 pte_val) 365 { 366 int l; 367 unsigned long *pt = pml4; 368 unsigned offset; 369 370 if (level < 1 || level > 3) 371 return -1; 372 for (l = EPT_PAGE_LEVEL; l > 1; --l) { 373 offset = (guest_addr >> (((l-1) * EPT_PGDIR_WIDTH) + 12)) 374 & EPT_PGDIR_MASK; 375 if (l == level) { 376 pt[offset] = pte_val; 377 return 0; 378 } 379 if (!(pt[offset] & (EPT_PRESENT))) 380 return -1; 381 pt = (unsigned long *)(pt[offset] & 0xffffffffff000ull); 382 } 383 offset = (guest_addr >> (((l-1) * EPT_PGDIR_WIDTH) + 12)) 384 & EPT_PGDIR_MASK; 385 pt[offset] = pte_val; 386 return 0; 387 } 388 389 390 static void init_vmcs_ctrl(void) 391 { 392 /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 393 /* 26.2.1.1 */ 394 vmcs_write(PIN_CONTROLS, ctrl_pin); 395 /* Disable VMEXIT of IO instruction */ 396 vmcs_write(CPU_EXEC_CTRL0, ctrl_cpu[0]); 397 if (ctrl_cpu_rev[0].set & CPU_SECONDARY) { 398 ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) & 399 ctrl_cpu_rev[1].clr; 400 vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu[1]); 401 } 402 vmcs_write(CR3_TARGET_COUNT, 0); 403 vmcs_write(VPID, ++vpid_cnt); 404 } 405 406 static void init_vmcs_host(void) 407 { 408 /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 409 /* 26.2.1.2 */ 410 vmcs_write(HOST_EFER, rdmsr(MSR_EFER)); 411 412 /* 26.2.1.3 */ 413 vmcs_write(ENT_CONTROLS, ctrl_enter); 414 vmcs_write(EXI_CONTROLS, ctrl_exit); 415 416 /* 26.2.2 */ 417 vmcs_write(HOST_CR0, read_cr0()); 418 vmcs_write(HOST_CR3, read_cr3()); 419 vmcs_write(HOST_CR4, read_cr4()); 420 vmcs_write(HOST_SYSENTER_EIP, (u64)(&entry_sysenter)); 421 vmcs_write(HOST_SYSENTER_CS, KERNEL_CS); 422 423 /* 26.2.3 */ 424 vmcs_write(HOST_SEL_CS, KERNEL_CS); 425 vmcs_write(HOST_SEL_SS, KERNEL_DS); 426 vmcs_write(HOST_SEL_DS, KERNEL_DS); 427 vmcs_write(HOST_SEL_ES, KERNEL_DS); 428 vmcs_write(HOST_SEL_FS, KERNEL_DS); 429 vmcs_write(HOST_SEL_GS, KERNEL_DS); 430 vmcs_write(HOST_SEL_TR, TSS_MAIN); 431 vmcs_write(HOST_BASE_TR, tss_descr.base); 432 vmcs_write(HOST_BASE_GDTR, gdt64_desc.base); 433 vmcs_write(HOST_BASE_IDTR, idt_descr.base); 434 vmcs_write(HOST_BASE_FS, 0); 435 vmcs_write(HOST_BASE_GS, 0); 436 437 /* Set other vmcs area */ 438 vmcs_write(PF_ERROR_MASK, 0); 439 vmcs_write(PF_ERROR_MATCH, 0); 440 vmcs_write(VMCS_LINK_PTR, ~0ul); 441 vmcs_write(VMCS_LINK_PTR_HI, ~0ul); 442 vmcs_write(HOST_RIP, (u64)(&vmx_return)); 443 } 444 445 static void init_vmcs_guest(void) 446 { 447 /* 26.3 CHECKING AND LOADING GUEST STATE */ 448 ulong guest_cr0, guest_cr4, guest_cr3; 449 /* 26.3.1.1 */ 450 guest_cr0 = read_cr0(); 451 guest_cr4 = read_cr4(); 452 guest_cr3 = read_cr3(); 453 if (ctrl_enter & ENT_GUEST_64) { 454 guest_cr0 |= X86_CR0_PG; 455 guest_cr4 |= X86_CR4_PAE; 456 } 457 if ((ctrl_enter & ENT_GUEST_64) == 0) 458 guest_cr4 &= (~X86_CR4_PCIDE); 459 if (guest_cr0 & X86_CR0_PG) 460 guest_cr0 |= X86_CR0_PE; 461 vmcs_write(GUEST_CR0, guest_cr0); 462 vmcs_write(GUEST_CR3, guest_cr3); 463 vmcs_write(GUEST_CR4, guest_cr4); 464 vmcs_write(GUEST_SYSENTER_CS, KERNEL_CS); 465 vmcs_write(GUEST_SYSENTER_ESP, 466 (u64)(guest_syscall_stack + PAGE_SIZE - 1)); 467 vmcs_write(GUEST_SYSENTER_EIP, (u64)(&entry_sysenter)); 468 vmcs_write(GUEST_DR7, 0); 469 vmcs_write(GUEST_EFER, rdmsr(MSR_EFER)); 470 471 /* 26.3.1.2 */ 472 vmcs_write(GUEST_SEL_CS, KERNEL_CS); 473 vmcs_write(GUEST_SEL_SS, KERNEL_DS); 474 vmcs_write(GUEST_SEL_DS, KERNEL_DS); 475 vmcs_write(GUEST_SEL_ES, KERNEL_DS); 476 vmcs_write(GUEST_SEL_FS, KERNEL_DS); 477 vmcs_write(GUEST_SEL_GS, KERNEL_DS); 478 vmcs_write(GUEST_SEL_TR, TSS_MAIN); 479 vmcs_write(GUEST_SEL_LDTR, 0); 480 481 vmcs_write(GUEST_BASE_CS, 0); 482 vmcs_write(GUEST_BASE_ES, 0); 483 vmcs_write(GUEST_BASE_SS, 0); 484 vmcs_write(GUEST_BASE_DS, 0); 485 vmcs_write(GUEST_BASE_FS, 0); 486 vmcs_write(GUEST_BASE_GS, 0); 487 vmcs_write(GUEST_BASE_TR, tss_descr.base); 488 vmcs_write(GUEST_BASE_LDTR, 0); 489 490 vmcs_write(GUEST_LIMIT_CS, 0xFFFFFFFF); 491 vmcs_write(GUEST_LIMIT_DS, 0xFFFFFFFF); 492 vmcs_write(GUEST_LIMIT_ES, 0xFFFFFFFF); 493 vmcs_write(GUEST_LIMIT_SS, 0xFFFFFFFF); 494 vmcs_write(GUEST_LIMIT_FS, 0xFFFFFFFF); 495 vmcs_write(GUEST_LIMIT_GS, 0xFFFFFFFF); 496 vmcs_write(GUEST_LIMIT_LDTR, 0xffff); 497 vmcs_write(GUEST_LIMIT_TR, tss_descr.limit); 498 499 vmcs_write(GUEST_AR_CS, 0xa09b); 500 vmcs_write(GUEST_AR_DS, 0xc093); 501 vmcs_write(GUEST_AR_ES, 0xc093); 502 vmcs_write(GUEST_AR_FS, 0xc093); 503 vmcs_write(GUEST_AR_GS, 0xc093); 504 vmcs_write(GUEST_AR_SS, 0xc093); 505 vmcs_write(GUEST_AR_LDTR, 0x82); 506 vmcs_write(GUEST_AR_TR, 0x8b); 507 508 /* 26.3.1.3 */ 509 vmcs_write(GUEST_BASE_GDTR, gdt64_desc.base); 510 vmcs_write(GUEST_BASE_IDTR, idt_descr.base); 511 vmcs_write(GUEST_LIMIT_GDTR, gdt64_desc.limit); 512 vmcs_write(GUEST_LIMIT_IDTR, idt_descr.limit); 513 514 /* 26.3.1.4 */ 515 vmcs_write(GUEST_RIP, (u64)(&guest_entry)); 516 vmcs_write(GUEST_RSP, (u64)(guest_stack + PAGE_SIZE - 1)); 517 vmcs_write(GUEST_RFLAGS, 0x2); 518 519 /* 26.3.1.5 */ 520 vmcs_write(GUEST_ACTV_STATE, ACTV_ACTIVE); 521 vmcs_write(GUEST_INTR_STATE, 0); 522 } 523 524 static int init_vmcs(struct vmcs **vmcs) 525 { 526 *vmcs = alloc_page(); 527 memset(*vmcs, 0, PAGE_SIZE); 528 (*vmcs)->revision_id = basic.revision; 529 /* vmclear first to init vmcs */ 530 if (vmcs_clear(*vmcs)) { 531 printf("%s : vmcs_clear error\n", __func__); 532 return 1; 533 } 534 535 if (make_vmcs_current(*vmcs)) { 536 printf("%s : make_vmcs_current error\n", __func__); 537 return 1; 538 } 539 540 /* All settings to pin/exit/enter/cpu 541 control fields should be placed here */ 542 ctrl_pin |= PIN_EXTINT | PIN_NMI | PIN_VIRT_NMI; 543 ctrl_exit = EXI_LOAD_EFER | EXI_HOST_64; 544 ctrl_enter = (ENT_LOAD_EFER | ENT_GUEST_64); 545 /* DIsable IO instruction VMEXIT now */ 546 ctrl_cpu[0] &= (~(CPU_IO | CPU_IO_BITMAP)); 547 ctrl_cpu[1] = 0; 548 549 ctrl_pin = (ctrl_pin | ctrl_pin_rev.set) & ctrl_pin_rev.clr; 550 ctrl_enter = (ctrl_enter | ctrl_enter_rev.set) & ctrl_enter_rev.clr; 551 ctrl_exit = (ctrl_exit | ctrl_exit_rev.set) & ctrl_exit_rev.clr; 552 ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr; 553 554 init_vmcs_ctrl(); 555 init_vmcs_host(); 556 init_vmcs_guest(); 557 return 0; 558 } 559 560 static void init_vmx(void) 561 { 562 ulong fix_cr0_set, fix_cr0_clr; 563 ulong fix_cr4_set, fix_cr4_clr; 564 565 vmxon_region = alloc_page(); 566 memset(vmxon_region, 0, PAGE_SIZE); 567 568 fix_cr0_set = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 569 fix_cr0_clr = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 570 fix_cr4_set = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 571 fix_cr4_clr = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 572 basic.val = rdmsr(MSR_IA32_VMX_BASIC); 573 ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PIN 574 : MSR_IA32_VMX_PINBASED_CTLS); 575 ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT 576 : MSR_IA32_VMX_EXIT_CTLS); 577 ctrl_enter_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_ENTRY 578 : MSR_IA32_VMX_ENTRY_CTLS); 579 ctrl_cpu_rev[0].val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PROC 580 : MSR_IA32_VMX_PROCBASED_CTLS); 581 if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0) 582 ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2); 583 else 584 ctrl_cpu_rev[1].val = 0; 585 if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0) 586 ept_vpid.val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 587 else 588 ept_vpid.val = 0; 589 590 write_cr0((read_cr0() & fix_cr0_clr) | fix_cr0_set); 591 write_cr4((read_cr4() & fix_cr4_clr) | fix_cr4_set | X86_CR4_VMXE); 592 593 *vmxon_region = basic.revision; 594 595 guest_stack = alloc_page(); 596 memset(guest_stack, 0, PAGE_SIZE); 597 guest_syscall_stack = alloc_page(); 598 memset(guest_syscall_stack, 0, PAGE_SIZE); 599 } 600 601 static void do_vmxon_off(void *data) 602 { 603 set_exception_return(&&resume); 604 vmx_on(); 605 vmx_off(); 606 resume: 607 barrier(); 608 } 609 610 static void do_write_feature_control(void *data) 611 { 612 set_exception_return(&&resume); 613 wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 614 resume: 615 barrier(); 616 } 617 618 static int test_vmx_feature_control(void) 619 { 620 u64 ia32_feature_control; 621 bool vmx_enabled; 622 623 ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); 624 vmx_enabled = ((ia32_feature_control & 0x5) == 0x5); 625 if ((ia32_feature_control & 0x5) == 0x5) { 626 printf("VMX enabled and locked by BIOS\n"); 627 return 0; 628 } else if (ia32_feature_control & 0x1) { 629 printf("ERROR: VMX locked out by BIOS!?\n"); 630 return 1; 631 } 632 633 wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 634 report("test vmxon with FEATURE_CONTROL cleared", 635 test_for_exception(GP_VECTOR, &do_vmxon_off, NULL)); 636 637 wrmsr(MSR_IA32_FEATURE_CONTROL, 0x4); 638 report("test vmxon without FEATURE_CONTROL lock", 639 test_for_exception(GP_VECTOR, &do_vmxon_off, NULL)); 640 641 wrmsr(MSR_IA32_FEATURE_CONTROL, 0x5); 642 vmx_enabled = ((rdmsr(MSR_IA32_FEATURE_CONTROL) & 0x5) == 0x5); 643 report("test enable VMX in FEATURE_CONTROL", vmx_enabled); 644 645 report("test FEATURE_CONTROL lock bit", 646 test_for_exception(GP_VECTOR, &do_write_feature_control, NULL)); 647 648 return !vmx_enabled; 649 } 650 651 static int test_vmxon(void) 652 { 653 int ret, ret1; 654 u64 *tmp_region = vmxon_region; 655 int width = cpuid(0x80000008).a & 0xff; 656 657 /* Unaligned page access */ 658 vmxon_region = (u64 *)((intptr_t)vmxon_region + 1); 659 ret1 = vmx_on(); 660 report("test vmxon with unaligned vmxon region", ret1); 661 if (!ret1) { 662 ret = 1; 663 goto out; 664 } 665 666 /* gpa bits beyond physical address width are set*/ 667 vmxon_region = (u64 *)((intptr_t)tmp_region | ((u64)1 << (width+1))); 668 ret1 = vmx_on(); 669 report("test vmxon with bits set beyond physical address width", ret1); 670 if (!ret1) { 671 ret = 1; 672 goto out; 673 } 674 675 /* invalid revision indentifier */ 676 vmxon_region = tmp_region; 677 *vmxon_region = 0xba9da9; 678 ret1 = vmx_on(); 679 report("test vmxon with invalid revision identifier", ret1); 680 if (!ret1) { 681 ret = 1; 682 goto out; 683 } 684 685 /* and finally a valid region */ 686 *vmxon_region = basic.revision; 687 ret = vmx_on(); 688 report("test vmxon with valid vmxon region", !ret); 689 690 out: 691 return ret; 692 } 693 694 static void test_vmptrld(void) 695 { 696 struct vmcs *vmcs, *tmp_root; 697 int width = cpuid(0x80000008).a & 0xff; 698 699 vmcs = alloc_page(); 700 vmcs->revision_id = basic.revision; 701 702 /* Unaligned page access */ 703 tmp_root = (struct vmcs *)((intptr_t)vmcs + 1); 704 report("test vmptrld with unaligned vmcs", 705 make_vmcs_current(tmp_root) == 1); 706 707 /* gpa bits beyond physical address width are set*/ 708 tmp_root = (struct vmcs *)((intptr_t)vmcs | 709 ((u64)1 << (width+1))); 710 report("test vmptrld with vmcs address bits set beyond physical address width", 711 make_vmcs_current(tmp_root) == 1); 712 713 /* Pass VMXON region */ 714 tmp_root = (struct vmcs *)vmxon_region; 715 report("test vmptrld with vmxon region", 716 make_vmcs_current(tmp_root) == 1); 717 718 report("test vmptrld with valid vmcs region", make_vmcs_current(vmcs) == 0); 719 } 720 721 static void test_vmptrst(void) 722 { 723 int ret; 724 struct vmcs *vmcs1, *vmcs2; 725 726 vmcs1 = alloc_page(); 727 memset(vmcs1, 0, PAGE_SIZE); 728 init_vmcs(&vmcs1); 729 ret = vmcs_save(&vmcs2); 730 report("test vmptrst", (!ret) && (vmcs1 == vmcs2)); 731 } 732 733 struct vmx_ctl_msr { 734 const char *name; 735 u32 index, true_index; 736 u32 default1; 737 } vmx_ctl_msr[] = { 738 { "MSR_IA32_VMX_PINBASED_CTLS", MSR_IA32_VMX_PINBASED_CTLS, 739 MSR_IA32_VMX_TRUE_PIN, 0x16 }, 740 { "MSR_IA32_VMX_PROCBASED_CTLS", MSR_IA32_VMX_PROCBASED_CTLS, 741 MSR_IA32_VMX_TRUE_PROC, 0x401e172 }, 742 { "MSR_IA32_VMX_PROCBASED_CTLS2", MSR_IA32_VMX_PROCBASED_CTLS2, 743 MSR_IA32_VMX_PROCBASED_CTLS2, 0 }, 744 { "MSR_IA32_VMX_EXIT_CTLS", MSR_IA32_VMX_EXIT_CTLS, 745 MSR_IA32_VMX_TRUE_EXIT, 0x36dff }, 746 { "MSR_IA32_VMX_ENTRY_CTLS", MSR_IA32_VMX_ENTRY_CTLS, 747 MSR_IA32_VMX_TRUE_ENTRY, 0x11ff }, 748 }; 749 750 static void test_vmx_caps(void) 751 { 752 u64 val, default1, fixed0, fixed1; 753 union vmx_ctrl_msr ctrl, true_ctrl; 754 unsigned int n; 755 bool ok; 756 757 printf("\nTest suite: VMX capability reporting\n"); 758 759 report("MSR_IA32_VMX_BASIC", 760 (basic.revision & (1ul << 31)) == 0 && 761 basic.size > 0 && basic.size <= 4096 && 762 (basic.type == 0 || basic.type == 6) && 763 basic.reserved1 == 0 && basic.reserved2 == 0); 764 765 val = rdmsr(MSR_IA32_VMX_MISC); 766 report("MSR_IA32_VMX_MISC", 767 (!(ctrl_cpu_rev[1].clr & CPU_URG) || val & (1ul << 5)) && 768 ((val >> 16) & 0x1ff) <= 256 && 769 (val & 0xc0007e00) == 0); 770 771 for (n = 0; n < ARRAY_SIZE(vmx_ctl_msr); n++) { 772 ctrl.val = rdmsr(vmx_ctl_msr[n].index); 773 default1 = vmx_ctl_msr[n].default1; 774 ok = (ctrl.set & default1) == default1; 775 ok = ok && (ctrl.set & ~ctrl.clr) == 0; 776 if (ok && basic.ctrl) { 777 true_ctrl.val = rdmsr(vmx_ctl_msr[n].true_index); 778 ok = ctrl.clr == true_ctrl.clr; 779 ok = ok && ctrl.set == (true_ctrl.set | default1); 780 } 781 report(vmx_ctl_msr[n].name, ok); 782 } 783 784 fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 785 fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 786 report("MSR_IA32_VMX_IA32_VMX_CR0_FIXED0/1", 787 ((fixed0 ^ fixed1) & ~fixed1) == 0); 788 789 fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 790 fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 791 report("MSR_IA32_VMX_IA32_VMX_CR4_FIXED0/1", 792 ((fixed0 ^ fixed1) & ~fixed1) == 0); 793 794 val = rdmsr(MSR_IA32_VMX_VMCS_ENUM); 795 report("MSR_IA32_VMX_VMCS_ENUM", 796 (val & 0x3e) >= 0x2a && 797 (val & 0xfffffffffffffc01Ull) == 0); 798 799 val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 800 report("MSR_IA32_VMX_EPT_VPID_CAP", 801 (val & 0xfffff07ef9eebebeUll) == 0); 802 } 803 804 /* This function can only be called in guest */ 805 static void __attribute__((__used__)) hypercall(u32 hypercall_no) 806 { 807 u64 val = 0; 808 val = (hypercall_no & HYPERCALL_MASK) | HYPERCALL_BIT; 809 hypercall_field = val; 810 asm volatile("vmcall\n\t"); 811 } 812 813 static bool is_hypercall() 814 { 815 ulong reason, hyper_bit; 816 817 reason = vmcs_read(EXI_REASON) & 0xff; 818 hyper_bit = hypercall_field & HYPERCALL_BIT; 819 if (reason == VMX_VMCALL && hyper_bit) 820 return true; 821 return false; 822 } 823 824 static int handle_hypercall() 825 { 826 ulong hypercall_no; 827 828 hypercall_no = hypercall_field & HYPERCALL_MASK; 829 hypercall_field = 0; 830 switch (hypercall_no) { 831 case HYPERCALL_VMEXIT: 832 return VMX_TEST_VMEXIT; 833 default: 834 printf("ERROR : Invalid hypercall number : %d\n", hypercall_no); 835 } 836 return VMX_TEST_EXIT; 837 } 838 839 static int exit_handler() 840 { 841 int ret; 842 843 current->exits++; 844 regs.rflags = vmcs_read(GUEST_RFLAGS); 845 if (is_hypercall()) 846 ret = handle_hypercall(); 847 else 848 ret = current->exit_handler(); 849 vmcs_write(GUEST_RFLAGS, regs.rflags); 850 switch (ret) { 851 case VMX_TEST_VMEXIT: 852 case VMX_TEST_RESUME: 853 return ret; 854 case VMX_TEST_EXIT: 855 break; 856 default: 857 printf("ERROR : Invalid exit_handler return val %d.\n" 858 , ret); 859 } 860 print_vmexit_info(); 861 exit(-1); 862 return 0; 863 } 864 865 static int vmx_run() 866 { 867 u32 ret = 0, fail = 0; 868 869 while (1) { 870 asm volatile ( 871 "mov %%rsp, %%rsi\n\t" 872 "mov %2, %%rdi\n\t" 873 "vmwrite %%rsi, %%rdi\n\t" 874 875 LOAD_GPR_C 876 "cmpl $0, %1\n\t" 877 "jne 1f\n\t" 878 LOAD_RFLAGS 879 "vmlaunch\n\t" 880 "jmp 2f\n\t" 881 "1: " 882 "vmresume\n\t" 883 "2: " 884 "setbe %0\n\t" 885 "vmx_return:\n\t" 886 SAVE_GPR_C 887 SAVE_RFLAGS 888 : "=m"(fail) 889 : "m"(launched), "i"(HOST_RSP) 890 : "rdi", "rsi", "memory", "cc" 891 892 ); 893 if (fail) 894 ret = launched ? VMX_TEST_RESUME_ERR : 895 VMX_TEST_LAUNCH_ERR; 896 else { 897 launched = 1; 898 ret = exit_handler(); 899 } 900 if (ret != VMX_TEST_RESUME) 901 break; 902 } 903 launched = 0; 904 switch (ret) { 905 case VMX_TEST_VMEXIT: 906 return 0; 907 case VMX_TEST_LAUNCH_ERR: 908 printf("%s : vmlaunch failed.\n", __func__); 909 if ((!(host_rflags & X86_EFLAGS_CF) && !(host_rflags & X86_EFLAGS_ZF)) 910 || ((host_rflags & X86_EFLAGS_CF) && (host_rflags & X86_EFLAGS_ZF))) 911 printf("\tvmlaunch set wrong flags\n"); 912 report("test vmlaunch", 0); 913 break; 914 case VMX_TEST_RESUME_ERR: 915 printf("%s : vmresume failed.\n", __func__); 916 if ((!(host_rflags & X86_EFLAGS_CF) && !(host_rflags & X86_EFLAGS_ZF)) 917 || ((host_rflags & X86_EFLAGS_CF) && (host_rflags & X86_EFLAGS_ZF))) 918 printf("\tvmresume set wrong flags\n"); 919 report("test vmresume", 0); 920 break; 921 default: 922 printf("%s : unhandled ret from exit_handler, ret=%d.\n", __func__, ret); 923 break; 924 } 925 return 1; 926 } 927 928 static int test_run(struct vmx_test *test) 929 { 930 if (test->name == NULL) 931 test->name = "(no name)"; 932 if (vmx_on()) { 933 printf("%s : vmxon failed.\n", __func__); 934 return 1; 935 } 936 init_vmcs(&(test->vmcs)); 937 /* Directly call test->init is ok here, init_vmcs has done 938 vmcs init, vmclear and vmptrld*/ 939 if (test->init && test->init(test->vmcs) != VMX_TEST_START) 940 goto out; 941 test->exits = 0; 942 current = test; 943 regs = test->guest_regs; 944 vmcs_write(GUEST_RFLAGS, regs.rflags | 0x2); 945 launched = 0; 946 printf("\nTest suite: %s\n", test->name); 947 vmx_run(); 948 out: 949 if (vmx_off()) { 950 printf("%s : vmxoff failed.\n", __func__); 951 return 1; 952 } 953 return 0; 954 } 955 956 extern struct vmx_test vmx_tests[]; 957 958 int main(void) 959 { 960 int i = 0; 961 962 setup_vm(); 963 setup_idt(); 964 hypercall_field = 0; 965 966 if (!(cpuid(1).c & (1 << 5))) { 967 printf("WARNING: vmx not supported, add '-cpu host'\n"); 968 goto exit; 969 } 970 init_vmx(); 971 if (test_vmx_feature_control() != 0) 972 goto exit; 973 /* Set basic test ctxt the same as "null" */ 974 current = &vmx_tests[0]; 975 if (test_vmxon() != 0) 976 goto exit; 977 test_vmptrld(); 978 test_vmclear(); 979 test_vmptrst(); 980 init_vmcs(&vmcs_root); 981 if (vmx_run()) { 982 report("test vmlaunch", 0); 983 goto exit; 984 } 985 test_vmxoff(); 986 test_vmx_caps(); 987 988 while (vmx_tests[++i].name != NULL) 989 if (test_run(&vmx_tests[i])) 990 goto exit; 991 992 exit: 993 return report_summary(); 994 } 995