1 /* 2 * x86/vmx.c : Framework for testing nested virtualization 3 * This is a framework to test nested VMX for KVM, which 4 * started as a project of GSoC 2013. All test cases should 5 * be located in x86/vmx_tests.c and framework related 6 * functions should be in this file. 7 * 8 * How to write test cases? 9 * Add callbacks of test suite in variant "vmx_tests". You can 10 * write: 11 * 1. init function used for initializing test suite 12 * 2. main function for codes running in L2 guest, 13 * 3. exit_handler to handle vmexit of L2 to L1 14 * 4. syscall handler to handle L2 syscall vmexit 15 * 5. vmenter fail handler to handle direct failure of vmenter 16 * 6. guest_regs is loaded when vmenter and saved when 17 * vmexit, you can read and set it in exit_handler 18 * If no special function is needed for a test suite, use 19 * coressponding basic_* functions as callback. More handlers 20 * can be added to "vmx_tests", see details of "struct vmx_test" 21 * and function test_run(). 22 * 23 * Currently, vmx test framework only set up one VCPU and one 24 * concurrent guest test environment with same paging for L2 and 25 * L1. For usage of EPT, only 1:1 mapped paging is used from VFN 26 * to PFN. 27 * 28 * Author : Arthur Chunqi Li <yzt356@gmail.com> 29 */ 30 31 #include "libcflat.h" 32 #include "processor.h" 33 #include "vm.h" 34 #include "desc.h" 35 #include "vmx.h" 36 #include "msr.h" 37 #include "smp.h" 38 39 u64 *vmxon_region; 40 struct vmcs *vmcs_root; 41 u32 vpid_cnt; 42 void *guest_stack, *guest_syscall_stack; 43 u32 ctrl_pin, ctrl_enter, ctrl_exit, ctrl_cpu[2]; 44 struct regs regs; 45 46 struct vmx_test *current; 47 48 #define MAX_TEST_TEARDOWN_STEPS 10 49 50 struct test_teardown_step { 51 test_teardown_func func; 52 void *data; 53 }; 54 55 static int teardown_count; 56 static struct test_teardown_step teardown_steps[MAX_TEST_TEARDOWN_STEPS]; 57 58 static test_guest_func v2_guest_main; 59 60 u64 hypercall_field; 61 bool launched; 62 static int matched; 63 static int guest_finished; 64 static int in_guest; 65 66 union vmx_basic basic; 67 union vmx_ctrl_msr ctrl_pin_rev; 68 union vmx_ctrl_msr ctrl_cpu_rev[2]; 69 union vmx_ctrl_msr ctrl_exit_rev; 70 union vmx_ctrl_msr ctrl_enter_rev; 71 union vmx_ept_vpid ept_vpid; 72 73 extern struct descriptor_table_ptr gdt64_desc; 74 extern struct descriptor_table_ptr idt_descr; 75 extern struct descriptor_table_ptr tss_descr; 76 extern void *vmx_return; 77 extern void *entry_sysenter; 78 extern void *guest_entry; 79 80 static volatile u32 stage; 81 82 static jmp_buf abort_target; 83 84 struct vmcs_field { 85 u64 mask; 86 u64 encoding; 87 }; 88 89 #define MASK(_bits) GENMASK_ULL((_bits) - 1, 0) 90 #define MASK_NATURAL MASK(sizeof(unsigned long) * 8) 91 92 static struct vmcs_field vmcs_fields[] = { 93 { MASK(16), VPID }, 94 { MASK(16), PINV }, 95 { MASK(16), EPTP_IDX }, 96 97 { MASK(16), GUEST_SEL_ES }, 98 { MASK(16), GUEST_SEL_CS }, 99 { MASK(16), GUEST_SEL_SS }, 100 { MASK(16), GUEST_SEL_DS }, 101 { MASK(16), GUEST_SEL_FS }, 102 { MASK(16), GUEST_SEL_GS }, 103 { MASK(16), GUEST_SEL_LDTR }, 104 { MASK(16), GUEST_SEL_TR }, 105 { MASK(16), GUEST_INT_STATUS }, 106 107 { MASK(16), HOST_SEL_ES }, 108 { MASK(16), HOST_SEL_CS }, 109 { MASK(16), HOST_SEL_SS }, 110 { MASK(16), HOST_SEL_DS }, 111 { MASK(16), HOST_SEL_FS }, 112 { MASK(16), HOST_SEL_GS }, 113 { MASK(16), HOST_SEL_TR }, 114 115 { MASK(64), IO_BITMAP_A }, 116 { MASK(64), IO_BITMAP_B }, 117 { MASK(64), MSR_BITMAP }, 118 { MASK(64), EXIT_MSR_ST_ADDR }, 119 { MASK(64), EXIT_MSR_LD_ADDR }, 120 { MASK(64), ENTER_MSR_LD_ADDR }, 121 { MASK(64), VMCS_EXEC_PTR }, 122 { MASK(64), TSC_OFFSET }, 123 { MASK(64), APIC_VIRT_ADDR }, 124 { MASK(64), APIC_ACCS_ADDR }, 125 { MASK(64), EPTP }, 126 127 { 0 /* read-only */, INFO_PHYS_ADDR }, 128 129 { MASK(64), VMCS_LINK_PTR }, 130 { MASK(64), GUEST_DEBUGCTL }, 131 { MASK(64), GUEST_EFER }, 132 { MASK(64), GUEST_PAT }, 133 { MASK(64), GUEST_PERF_GLOBAL_CTRL }, 134 { MASK(64), GUEST_PDPTE }, 135 136 { MASK(64), HOST_PAT }, 137 { MASK(64), HOST_EFER }, 138 { MASK(64), HOST_PERF_GLOBAL_CTRL }, 139 140 { MASK(32), PIN_CONTROLS }, 141 { MASK(32), CPU_EXEC_CTRL0 }, 142 { MASK(32), EXC_BITMAP }, 143 { MASK(32), PF_ERROR_MASK }, 144 { MASK(32), PF_ERROR_MATCH }, 145 { MASK(32), CR3_TARGET_COUNT }, 146 { MASK(32), EXI_CONTROLS }, 147 { MASK(32), EXI_MSR_ST_CNT }, 148 { MASK(32), EXI_MSR_LD_CNT }, 149 { MASK(32), ENT_CONTROLS }, 150 { MASK(32), ENT_MSR_LD_CNT }, 151 { MASK(32), ENT_INTR_INFO }, 152 { MASK(32), ENT_INTR_ERROR }, 153 { MASK(32), ENT_INST_LEN }, 154 { MASK(32), TPR_THRESHOLD }, 155 { MASK(32), CPU_EXEC_CTRL1 }, 156 157 { 0 /* read-only */, VMX_INST_ERROR }, 158 { 0 /* read-only */, EXI_REASON }, 159 { 0 /* read-only */, EXI_INTR_INFO }, 160 { 0 /* read-only */, EXI_INTR_ERROR }, 161 { 0 /* read-only */, IDT_VECT_INFO }, 162 { 0 /* read-only */, IDT_VECT_ERROR }, 163 { 0 /* read-only */, EXI_INST_LEN }, 164 { 0 /* read-only */, EXI_INST_INFO }, 165 166 { MASK(32), GUEST_LIMIT_ES }, 167 { MASK(32), GUEST_LIMIT_CS }, 168 { MASK(32), GUEST_LIMIT_SS }, 169 { MASK(32), GUEST_LIMIT_DS }, 170 { MASK(32), GUEST_LIMIT_FS }, 171 { MASK(32), GUEST_LIMIT_GS }, 172 { MASK(32), GUEST_LIMIT_LDTR }, 173 { MASK(32), GUEST_LIMIT_TR }, 174 { MASK(32), GUEST_LIMIT_GDTR }, 175 { MASK(32), GUEST_LIMIT_IDTR }, 176 { 0x1d0ff, GUEST_AR_ES }, 177 { 0x1f0ff, GUEST_AR_CS }, 178 { 0x1d0ff, GUEST_AR_SS }, 179 { 0x1d0ff, GUEST_AR_DS }, 180 { 0x1d0ff, GUEST_AR_FS }, 181 { 0x1d0ff, GUEST_AR_GS }, 182 { 0x1d0ff, GUEST_AR_LDTR }, 183 { 0x1d0ff, GUEST_AR_TR }, 184 { MASK(32), GUEST_INTR_STATE }, 185 { MASK(32), GUEST_ACTV_STATE }, 186 { MASK(32), GUEST_SMBASE }, 187 { MASK(32), GUEST_SYSENTER_CS }, 188 { MASK(32), PREEMPT_TIMER_VALUE }, 189 190 { MASK(32), HOST_SYSENTER_CS }, 191 192 { MASK_NATURAL, CR0_MASK }, 193 { MASK_NATURAL, CR4_MASK }, 194 { MASK_NATURAL, CR0_READ_SHADOW }, 195 { MASK_NATURAL, CR4_READ_SHADOW }, 196 { MASK_NATURAL, CR3_TARGET_0 }, 197 { MASK_NATURAL, CR3_TARGET_1 }, 198 { MASK_NATURAL, CR3_TARGET_2 }, 199 { MASK_NATURAL, CR3_TARGET_3 }, 200 201 { 0 /* read-only */, EXI_QUALIFICATION }, 202 { 0 /* read-only */, IO_RCX }, 203 { 0 /* read-only */, IO_RSI }, 204 { 0 /* read-only */, IO_RDI }, 205 { 0 /* read-only */, IO_RIP }, 206 { 0 /* read-only */, GUEST_LINEAR_ADDRESS }, 207 208 { MASK_NATURAL, GUEST_CR0 }, 209 { MASK_NATURAL, GUEST_CR3 }, 210 { MASK_NATURAL, GUEST_CR4 }, 211 { MASK_NATURAL, GUEST_BASE_ES }, 212 { MASK_NATURAL, GUEST_BASE_CS }, 213 { MASK_NATURAL, GUEST_BASE_SS }, 214 { MASK_NATURAL, GUEST_BASE_DS }, 215 { MASK_NATURAL, GUEST_BASE_FS }, 216 { MASK_NATURAL, GUEST_BASE_GS }, 217 { MASK_NATURAL, GUEST_BASE_LDTR }, 218 { MASK_NATURAL, GUEST_BASE_TR }, 219 { MASK_NATURAL, GUEST_BASE_GDTR }, 220 { MASK_NATURAL, GUEST_BASE_IDTR }, 221 { MASK_NATURAL, GUEST_DR7 }, 222 { MASK_NATURAL, GUEST_RSP }, 223 { MASK_NATURAL, GUEST_RIP }, 224 { MASK_NATURAL, GUEST_RFLAGS }, 225 { MASK_NATURAL, GUEST_PENDING_DEBUG }, 226 { MASK_NATURAL, GUEST_SYSENTER_ESP }, 227 { MASK_NATURAL, GUEST_SYSENTER_EIP }, 228 229 { MASK_NATURAL, HOST_CR0 }, 230 { MASK_NATURAL, HOST_CR3 }, 231 { MASK_NATURAL, HOST_CR4 }, 232 { MASK_NATURAL, HOST_BASE_FS }, 233 { MASK_NATURAL, HOST_BASE_GS }, 234 { MASK_NATURAL, HOST_BASE_TR }, 235 { MASK_NATURAL, HOST_BASE_GDTR }, 236 { MASK_NATURAL, HOST_BASE_IDTR }, 237 { MASK_NATURAL, HOST_SYSENTER_ESP }, 238 { MASK_NATURAL, HOST_SYSENTER_EIP }, 239 { MASK_NATURAL, HOST_RSP }, 240 { MASK_NATURAL, HOST_RIP }, 241 }; 242 243 static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie) 244 { 245 u64 value; 246 247 /* Incorporate the cookie and the field encoding into the value. */ 248 value = cookie; 249 value |= (f->encoding << 8); 250 value |= 0xdeadbeefull << 32; 251 252 return value & f->mask; 253 } 254 255 static void set_vmcs_field(struct vmcs_field *f, u8 cookie) 256 { 257 vmcs_write(f->encoding, vmcs_field_value(f, cookie)); 258 } 259 260 static bool check_vmcs_field(struct vmcs_field *f, u8 cookie) 261 { 262 u64 expected; 263 u64 actual; 264 int ret; 265 266 ret = vmcs_read_checking(f->encoding, &actual); 267 assert(!(ret & X86_EFLAGS_CF)); 268 /* Skip VMCS fields that aren't recognized by the CPU */ 269 if (ret & X86_EFLAGS_ZF) 270 return true; 271 272 expected = vmcs_field_value(f, cookie); 273 actual &= f->mask; 274 275 if (expected == actual) 276 return true; 277 278 printf("FAIL: VMWRITE/VMREAD %lx (expected: %lx, actual: %lx)\n", 279 f->encoding, (unsigned long) expected, (unsigned long) actual); 280 281 return false; 282 } 283 284 static void set_all_vmcs_fields(u8 cookie) 285 { 286 int i; 287 288 for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) 289 set_vmcs_field(&vmcs_fields[i], cookie); 290 } 291 292 static bool check_all_vmcs_fields(u8 cookie) 293 { 294 bool pass = true; 295 int i; 296 297 for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) { 298 if (!check_vmcs_field(&vmcs_fields[i], cookie)) 299 pass = false; 300 } 301 302 return pass; 303 } 304 305 void test_vmwrite_vmread(void) 306 { 307 struct vmcs *vmcs = alloc_page(); 308 309 memset(vmcs, 0, PAGE_SIZE); 310 vmcs->revision_id = basic.revision; 311 assert(!vmcs_clear(vmcs)); 312 assert(!make_vmcs_current(vmcs)); 313 314 set_all_vmcs_fields(0x42); 315 report("VMWRITE/VMREAD", check_all_vmcs_fields(0x42)); 316 317 assert(!vmcs_clear(vmcs)); 318 free_page(vmcs); 319 } 320 321 void test_vmcs_lifecycle(void) 322 { 323 struct vmcs *vmcs[2] = {}; 324 int i; 325 326 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 327 vmcs[i] = alloc_page(); 328 memset(vmcs[i], 0, PAGE_SIZE); 329 vmcs[i]->revision_id = basic.revision; 330 } 331 332 #define VMPTRLD(_i) do { \ 333 assert(_i < ARRAY_SIZE(vmcs)); \ 334 assert(!make_vmcs_current(vmcs[_i])); \ 335 printf("VMPTRLD VMCS%d\n", (_i)); \ 336 } while (0) 337 338 #define VMCLEAR(_i) do { \ 339 assert(_i < ARRAY_SIZE(vmcs)); \ 340 assert(!vmcs_clear(vmcs[_i])); \ 341 printf("VMCLEAR VMCS%d\n", (_i)); \ 342 } while (0) 343 344 VMCLEAR(0); 345 VMPTRLD(0); 346 set_all_vmcs_fields(0); 347 report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0)); 348 349 VMCLEAR(0); 350 VMPTRLD(0); 351 report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0)); 352 353 VMCLEAR(1); 354 report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0)); 355 356 VMPTRLD(1); 357 set_all_vmcs_fields(1); 358 report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1)); 359 360 VMPTRLD(0); 361 report("current:VMCS0 active:[VMCS0,VCMS1]", check_all_vmcs_fields(0)); 362 VMPTRLD(1); 363 report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1)); 364 VMPTRLD(1); 365 report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1)); 366 367 VMCLEAR(0); 368 report("current:VMCS1 active:[VCMS1]", check_all_vmcs_fields(1)); 369 370 /* VMPTRLD should not erase VMWRITEs to the current VMCS */ 371 set_all_vmcs_fields(2); 372 VMPTRLD(1); 373 report("current:VMCS1 active:[VCMS1]", check_all_vmcs_fields(2)); 374 375 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 376 VMCLEAR(i); 377 free_page(vmcs[i]); 378 } 379 380 #undef VMPTRLD 381 #undef VMCLEAR 382 } 383 384 void vmx_set_test_stage(u32 s) 385 { 386 barrier(); 387 stage = s; 388 barrier(); 389 } 390 391 u32 vmx_get_test_stage(void) 392 { 393 u32 s; 394 395 barrier(); 396 s = stage; 397 barrier(); 398 return s; 399 } 400 401 void vmx_inc_test_stage(void) 402 { 403 barrier(); 404 stage++; 405 barrier(); 406 } 407 408 /* entry_sysenter */ 409 asm( 410 ".align 4, 0x90\n\t" 411 ".globl entry_sysenter\n\t" 412 "entry_sysenter:\n\t" 413 SAVE_GPR 414 " and $0xf, %rax\n\t" 415 " mov %rax, %rdi\n\t" 416 " call syscall_handler\n\t" 417 LOAD_GPR 418 " vmresume\n\t" 419 ); 420 421 static void __attribute__((__used__)) syscall_handler(u64 syscall_no) 422 { 423 if (current->syscall_handler) 424 current->syscall_handler(syscall_no); 425 } 426 427 static inline int vmx_on() 428 { 429 bool ret; 430 u64 rflags = read_rflags() | X86_EFLAGS_CF | X86_EFLAGS_ZF; 431 asm volatile ("push %1; popf; vmxon %2; setbe %0\n\t" 432 : "=q" (ret) : "q" (rflags), "m" (vmxon_region) : "cc"); 433 return ret; 434 } 435 436 static inline int vmx_off() 437 { 438 bool ret; 439 u64 rflags = read_rflags() | X86_EFLAGS_CF | X86_EFLAGS_ZF; 440 441 asm volatile("push %1; popf; vmxoff; setbe %0\n\t" 442 : "=q"(ret) : "q" (rflags) : "cc"); 443 return ret; 444 } 445 446 static const char * const exit_reason_descriptions[] = { 447 [VMX_EXC_NMI] = "VMX_EXC_NMI", 448 [VMX_EXTINT] = "VMX_EXTINT", 449 [VMX_TRIPLE_FAULT] = "VMX_TRIPLE_FAULT", 450 [VMX_INIT] = "VMX_INIT", 451 [VMX_SIPI] = "VMX_SIPI", 452 [VMX_SMI_IO] = "VMX_SMI_IO", 453 [VMX_SMI_OTHER] = "VMX_SMI_OTHER", 454 [VMX_INTR_WINDOW] = "VMX_INTR_WINDOW", 455 [VMX_NMI_WINDOW] = "VMX_NMI_WINDOW", 456 [VMX_TASK_SWITCH] = "VMX_TASK_SWITCH", 457 [VMX_CPUID] = "VMX_CPUID", 458 [VMX_GETSEC] = "VMX_GETSEC", 459 [VMX_HLT] = "VMX_HLT", 460 [VMX_INVD] = "VMX_INVD", 461 [VMX_INVLPG] = "VMX_INVLPG", 462 [VMX_RDPMC] = "VMX_RDPMC", 463 [VMX_RDTSC] = "VMX_RDTSC", 464 [VMX_RSM] = "VMX_RSM", 465 [VMX_VMCALL] = "VMX_VMCALL", 466 [VMX_VMCLEAR] = "VMX_VMCLEAR", 467 [VMX_VMLAUNCH] = "VMX_VMLAUNCH", 468 [VMX_VMPTRLD] = "VMX_VMPTRLD", 469 [VMX_VMPTRST] = "VMX_VMPTRST", 470 [VMX_VMREAD] = "VMX_VMREAD", 471 [VMX_VMRESUME] = "VMX_VMRESUME", 472 [VMX_VMWRITE] = "VMX_VMWRITE", 473 [VMX_VMXOFF] = "VMX_VMXOFF", 474 [VMX_VMXON] = "VMX_VMXON", 475 [VMX_CR] = "VMX_CR", 476 [VMX_DR] = "VMX_DR", 477 [VMX_IO] = "VMX_IO", 478 [VMX_RDMSR] = "VMX_RDMSR", 479 [VMX_WRMSR] = "VMX_WRMSR", 480 [VMX_FAIL_STATE] = "VMX_FAIL_STATE", 481 [VMX_FAIL_MSR] = "VMX_FAIL_MSR", 482 [VMX_MWAIT] = "VMX_MWAIT", 483 [VMX_MTF] = "VMX_MTF", 484 [VMX_MONITOR] = "VMX_MONITOR", 485 [VMX_PAUSE] = "VMX_PAUSE", 486 [VMX_FAIL_MCHECK] = "VMX_FAIL_MCHECK", 487 [VMX_TPR_THRESHOLD] = "VMX_TPR_THRESHOLD", 488 [VMX_APIC_ACCESS] = "VMX_APIC_ACCESS", 489 [VMX_GDTR_IDTR] = "VMX_GDTR_IDTR", 490 [VMX_LDTR_TR] = "VMX_LDTR_TR", 491 [VMX_EPT_VIOLATION] = "VMX_EPT_VIOLATION", 492 [VMX_EPT_MISCONFIG] = "VMX_EPT_MISCONFIG", 493 [VMX_INVEPT] = "VMX_INVEPT", 494 [VMX_PREEMPT] = "VMX_PREEMPT", 495 [VMX_INVVPID] = "VMX_INVVPID", 496 [VMX_WBINVD] = "VMX_WBINVD", 497 [VMX_XSETBV] = "VMX_XSETBV", 498 [VMX_APIC_WRITE] = "VMX_APIC_WRITE", 499 [VMX_RDRAND] = "VMX_RDRAND", 500 [VMX_INVPCID] = "VMX_INVPCID", 501 [VMX_VMFUNC] = "VMX_VMFUNC", 502 [VMX_RDSEED] = "VMX_RDSEED", 503 [VMX_PML_FULL] = "VMX_PML_FULL", 504 [VMX_XSAVES] = "VMX_XSAVES", 505 [VMX_XRSTORS] = "VMX_XRSTORS", 506 }; 507 508 const char *exit_reason_description(u64 reason) 509 { 510 if (reason >= ARRAY_SIZE(exit_reason_descriptions)) 511 return "(unknown)"; 512 return exit_reason_descriptions[reason] ? : "(unused)"; 513 } 514 515 void print_vmexit_info() 516 { 517 u64 guest_rip, guest_rsp; 518 ulong reason = vmcs_read(EXI_REASON) & 0xff; 519 ulong exit_qual = vmcs_read(EXI_QUALIFICATION); 520 guest_rip = vmcs_read(GUEST_RIP); 521 guest_rsp = vmcs_read(GUEST_RSP); 522 printf("VMEXIT info:\n"); 523 printf("\tvmexit reason = %ld\n", reason); 524 printf("\texit qualification = 0x%lx\n", exit_qual); 525 printf("\tBit 31 of reason = %lx\n", (vmcs_read(EXI_REASON) >> 31) & 1); 526 printf("\tguest_rip = 0x%lx\n", guest_rip); 527 printf("\tRAX=0x%lx RBX=0x%lx RCX=0x%lx RDX=0x%lx\n", 528 regs.rax, regs.rbx, regs.rcx, regs.rdx); 529 printf("\tRSP=0x%lx RBP=0x%lx RSI=0x%lx RDI=0x%lx\n", 530 guest_rsp, regs.rbp, regs.rsi, regs.rdi); 531 printf("\tR8 =0x%lx R9 =0x%lx R10=0x%lx R11=0x%lx\n", 532 regs.r8, regs.r9, regs.r10, regs.r11); 533 printf("\tR12=0x%lx R13=0x%lx R14=0x%lx R15=0x%lx\n", 534 regs.r12, regs.r13, regs.r14, regs.r15); 535 } 536 537 void 538 print_vmentry_failure_info(struct vmentry_failure *failure) { 539 if (failure->early) { 540 printf("Early %s failure: ", failure->instr); 541 switch (failure->flags & VMX_ENTRY_FLAGS) { 542 case X86_EFLAGS_CF: 543 printf("current-VMCS pointer is not valid.\n"); 544 break; 545 case X86_EFLAGS_ZF: 546 printf("error number is %ld. See Intel 30.4.\n", 547 vmcs_read(VMX_INST_ERROR)); 548 break; 549 default: 550 printf("unexpected flags %lx!\n", failure->flags); 551 } 552 } else { 553 u64 reason = vmcs_read(EXI_REASON); 554 u64 qual = vmcs_read(EXI_QUALIFICATION); 555 556 printf("Non-early %s failure (reason=0x%lx, qual=0x%lx): ", 557 failure->instr, reason, qual); 558 559 switch (reason & 0xff) { 560 case VMX_FAIL_STATE: 561 printf("invalid guest state\n"); 562 break; 563 case VMX_FAIL_MSR: 564 printf("MSR loading\n"); 565 break; 566 case VMX_FAIL_MCHECK: 567 printf("machine-check event\n"); 568 break; 569 default: 570 printf("unexpected basic exit reason %ld\n", 571 reason & 0xff); 572 } 573 574 if (!(reason & VMX_ENTRY_FAILURE)) 575 printf("\tVMX_ENTRY_FAILURE BIT NOT SET!\n"); 576 577 if (reason & 0x7fff0000) 578 printf("\tRESERVED BITS SET!\n"); 579 } 580 } 581 582 /* 583 * VMCLEAR should ensures all VMCS state is flushed to the VMCS 584 * region in memory. 585 */ 586 static void test_vmclear_flushing(void) 587 { 588 struct vmcs *vmcs[3] = {}; 589 int i; 590 591 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 592 vmcs[i] = alloc_page(); 593 memset(vmcs[i], 0, PAGE_SIZE); 594 } 595 596 vmcs[0]->revision_id = basic.revision; 597 assert(!vmcs_clear(vmcs[0])); 598 assert(!make_vmcs_current(vmcs[0])); 599 set_all_vmcs_fields(0x86); 600 601 assert(!vmcs_clear(vmcs[0])); 602 memcpy(vmcs[1], vmcs[0], basic.size); 603 assert(!make_vmcs_current(vmcs[1])); 604 report("test vmclear flush (current VMCS)", check_all_vmcs_fields(0x86)); 605 606 set_all_vmcs_fields(0x87); 607 assert(!make_vmcs_current(vmcs[0])); 608 assert(!vmcs_clear(vmcs[1])); 609 memcpy(vmcs[2], vmcs[1], basic.size); 610 assert(!make_vmcs_current(vmcs[2])); 611 report("test vmclear flush (!current VMCS)", check_all_vmcs_fields(0x87)); 612 613 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 614 assert(!vmcs_clear(vmcs[i])); 615 free_page(vmcs[i]); 616 } 617 } 618 619 static void test_vmclear(void) 620 { 621 struct vmcs *tmp_root; 622 int width = cpuid_maxphyaddr(); 623 624 /* 625 * Note- The tests below do not necessarily have a 626 * valid VMCS, but that's ok since the invalid vmcs 627 * is only used for a specific test and is discarded 628 * without touching its contents 629 */ 630 631 /* Unaligned page access */ 632 tmp_root = (struct vmcs *)((intptr_t)vmcs_root + 1); 633 report("test vmclear with unaligned vmcs", 634 vmcs_clear(tmp_root) == 1); 635 636 /* gpa bits beyond physical address width are set*/ 637 tmp_root = (struct vmcs *)((intptr_t)vmcs_root | 638 ((u64)1 << (width+1))); 639 report("test vmclear with vmcs address bits set beyond physical address width", 640 vmcs_clear(tmp_root) == 1); 641 642 /* Pass VMXON region */ 643 tmp_root = (struct vmcs *)vmxon_region; 644 report("test vmclear with vmxon region", 645 vmcs_clear(tmp_root) == 1); 646 647 /* Valid VMCS */ 648 report("test vmclear with valid vmcs region", vmcs_clear(vmcs_root) == 0); 649 650 test_vmclear_flushing(); 651 } 652 653 static void __attribute__((__used__)) guest_main(void) 654 { 655 if (current->v2) 656 v2_guest_main(); 657 else 658 current->guest_main(); 659 } 660 661 /* guest_entry */ 662 asm( 663 ".align 4, 0x90\n\t" 664 ".globl entry_guest\n\t" 665 "guest_entry:\n\t" 666 " call guest_main\n\t" 667 " mov $1, %edi\n\t" 668 " call hypercall\n\t" 669 ); 670 671 /* EPT paging structure related functions */ 672 /* split_large_ept_entry: Split a 2M/1G large page into 512 smaller PTEs. 673 @ptep : large page table entry to split 674 @level : level of ptep (2 or 3) 675 */ 676 static void split_large_ept_entry(unsigned long *ptep, int level) 677 { 678 unsigned long *new_pt; 679 unsigned long gpa; 680 unsigned long pte; 681 unsigned long prototype; 682 int i; 683 684 pte = *ptep; 685 assert(pte & EPT_PRESENT); 686 assert(pte & EPT_LARGE_PAGE); 687 assert(level == 2 || level == 3); 688 689 new_pt = alloc_page(); 690 assert(new_pt); 691 memset(new_pt, 0, PAGE_SIZE); 692 693 prototype = pte & ~EPT_ADDR_MASK; 694 if (level == 2) 695 prototype &= ~EPT_LARGE_PAGE; 696 697 gpa = pte & EPT_ADDR_MASK; 698 for (i = 0; i < EPT_PGDIR_ENTRIES; i++) { 699 new_pt[i] = prototype | gpa; 700 gpa += 1ul << EPT_LEVEL_SHIFT(level - 1); 701 } 702 703 pte &= ~EPT_LARGE_PAGE; 704 pte &= ~EPT_ADDR_MASK; 705 pte |= virt_to_phys(new_pt); 706 707 *ptep = pte; 708 } 709 710 /* install_ept_entry : Install a page to a given level in EPT 711 @pml4 : addr of pml4 table 712 @pte_level : level of PTE to set 713 @guest_addr : physical address of guest 714 @pte : pte value to set 715 @pt_page : address of page table, NULL for a new page 716 */ 717 void install_ept_entry(unsigned long *pml4, 718 int pte_level, 719 unsigned long guest_addr, 720 unsigned long pte, 721 unsigned long *pt_page) 722 { 723 int level; 724 unsigned long *pt = pml4; 725 unsigned offset; 726 727 for (level = EPT_PAGE_LEVEL; level > pte_level; --level) { 728 offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) 729 & EPT_PGDIR_MASK; 730 if (!(pt[offset] & (EPT_PRESENT))) { 731 unsigned long *new_pt = pt_page; 732 if (!new_pt) 733 new_pt = alloc_page(); 734 else 735 pt_page = 0; 736 memset(new_pt, 0, PAGE_SIZE); 737 pt[offset] = virt_to_phys(new_pt) 738 | EPT_RA | EPT_WA | EPT_EA; 739 } else if (pt[offset] & EPT_LARGE_PAGE) 740 split_large_ept_entry(&pt[offset], level); 741 pt = phys_to_virt(pt[offset] & EPT_ADDR_MASK); 742 } 743 offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) & EPT_PGDIR_MASK; 744 pt[offset] = pte; 745 } 746 747 /* Map a page, @perm is the permission of the page */ 748 void install_ept(unsigned long *pml4, 749 unsigned long phys, 750 unsigned long guest_addr, 751 u64 perm) 752 { 753 install_ept_entry(pml4, 1, guest_addr, (phys & PAGE_MASK) | perm, 0); 754 } 755 756 /* Map a 1G-size page */ 757 void install_1g_ept(unsigned long *pml4, 758 unsigned long phys, 759 unsigned long guest_addr, 760 u64 perm) 761 { 762 install_ept_entry(pml4, 3, guest_addr, 763 (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 764 } 765 766 /* Map a 2M-size page */ 767 void install_2m_ept(unsigned long *pml4, 768 unsigned long phys, 769 unsigned long guest_addr, 770 u64 perm) 771 { 772 install_ept_entry(pml4, 2, guest_addr, 773 (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 774 } 775 776 /* setup_ept_range : Setup a range of 1:1 mapped page to EPT paging structure. 777 @start : start address of guest page 778 @len : length of address to be mapped 779 @map_1g : whether 1G page map is used 780 @map_2m : whether 2M page map is used 781 @perm : permission for every page 782 */ 783 void setup_ept_range(unsigned long *pml4, unsigned long start, 784 unsigned long len, int map_1g, int map_2m, u64 perm) 785 { 786 u64 phys = start; 787 u64 max = (u64)len + (u64)start; 788 789 if (map_1g) { 790 while (phys + PAGE_SIZE_1G <= max) { 791 install_1g_ept(pml4, phys, phys, perm); 792 phys += PAGE_SIZE_1G; 793 } 794 } 795 if (map_2m) { 796 while (phys + PAGE_SIZE_2M <= max) { 797 install_2m_ept(pml4, phys, phys, perm); 798 phys += PAGE_SIZE_2M; 799 } 800 } 801 while (phys + PAGE_SIZE <= max) { 802 install_ept(pml4, phys, phys, perm); 803 phys += PAGE_SIZE; 804 } 805 } 806 807 /* get_ept_pte : Get the PTE of a given level in EPT, 808 @level == 1 means get the latest level*/ 809 unsigned long get_ept_pte(unsigned long *pml4, 810 unsigned long guest_addr, int level) 811 { 812 int l; 813 unsigned long *pt = pml4, pte; 814 unsigned offset; 815 816 if (level < 1 || level > 3) 817 return -1; 818 for (l = EPT_PAGE_LEVEL; ; --l) { 819 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 820 pte = pt[offset]; 821 if (!(pte & (EPT_PRESENT))) 822 return 0; 823 if (l == level) 824 break; 825 if (l < 4 && (pte & EPT_LARGE_PAGE)) 826 return pte; 827 pt = (unsigned long *)(pte & EPT_ADDR_MASK); 828 } 829 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 830 pte = pt[offset]; 831 return pte; 832 } 833 834 static void clear_ept_ad_pte(unsigned long *pml4, unsigned long guest_addr) 835 { 836 int l; 837 unsigned long *pt = pml4; 838 u64 pte; 839 unsigned offset; 840 841 for (l = EPT_PAGE_LEVEL; ; --l) { 842 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 843 pt[offset] &= ~(EPT_ACCESS_FLAG|EPT_DIRTY_FLAG); 844 pte = pt[offset]; 845 if (l == 1 || (l < 4 && (pte & EPT_LARGE_PAGE))) 846 break; 847 pt = (unsigned long *)(pte & EPT_ADDR_MASK); 848 } 849 } 850 851 /* clear_ept_ad : Clear EPT A/D bits for the page table walk and the 852 final GPA of a guest address. */ 853 void clear_ept_ad(unsigned long *pml4, u64 guest_cr3, 854 unsigned long guest_addr) 855 { 856 int l; 857 unsigned long *pt = (unsigned long *)guest_cr3, gpa; 858 u64 pte, offset_in_page; 859 unsigned offset; 860 861 for (l = EPT_PAGE_LEVEL; ; --l) { 862 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 863 864 clear_ept_ad_pte(pml4, (u64) &pt[offset]); 865 pte = pt[offset]; 866 if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 867 break; 868 if (!(pte & PT_PRESENT_MASK)) 869 return; 870 pt = (unsigned long *)(pte & PT_ADDR_MASK); 871 } 872 873 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 874 offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 875 gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 876 clear_ept_ad_pte(pml4, gpa); 877 } 878 879 /* check_ept_ad : Check the content of EPT A/D bits for the page table 880 walk and the final GPA of a guest address. */ 881 void check_ept_ad(unsigned long *pml4, u64 guest_cr3, 882 unsigned long guest_addr, int expected_gpa_ad, 883 int expected_pt_ad) 884 { 885 int l; 886 unsigned long *pt = (unsigned long *)guest_cr3, gpa; 887 u64 ept_pte, pte, offset_in_page; 888 unsigned offset; 889 bool bad_pt_ad = false; 890 891 for (l = EPT_PAGE_LEVEL; ; --l) { 892 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 893 894 ept_pte = get_ept_pte(pml4, (u64) &pt[offset], 1); 895 if (ept_pte == 0) 896 return; 897 898 if (!bad_pt_ad) { 899 bad_pt_ad |= (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) != expected_pt_ad; 900 if (bad_pt_ad) 901 report("EPT - guest level %d page table A=%d/D=%d", 902 false, l, 903 !!(expected_pt_ad & EPT_ACCESS_FLAG), 904 !!(expected_pt_ad & EPT_DIRTY_FLAG)); 905 } 906 907 pte = pt[offset]; 908 if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 909 break; 910 if (!(pte & PT_PRESENT_MASK)) 911 return; 912 pt = (unsigned long *)(pte & PT_ADDR_MASK); 913 } 914 915 if (!bad_pt_ad) 916 report("EPT - guest page table structures A=%d/D=%d", 917 true, 918 !!(expected_pt_ad & EPT_ACCESS_FLAG), 919 !!(expected_pt_ad & EPT_DIRTY_FLAG)); 920 921 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 922 offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 923 gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 924 925 ept_pte = get_ept_pte(pml4, gpa, 1); 926 report("EPT - guest physical address A=%d/D=%d", 927 (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) == expected_gpa_ad, 928 !!(expected_gpa_ad & EPT_ACCESS_FLAG), 929 !!(expected_gpa_ad & EPT_DIRTY_FLAG)); 930 } 931 932 933 void ept_sync(int type, u64 eptp) 934 { 935 switch (type) { 936 case INVEPT_SINGLE: 937 if (ept_vpid.val & EPT_CAP_INVEPT_SINGLE) { 938 invept(INVEPT_SINGLE, eptp); 939 break; 940 } 941 /* else fall through */ 942 case INVEPT_GLOBAL: 943 if (ept_vpid.val & EPT_CAP_INVEPT_ALL) { 944 invept(INVEPT_GLOBAL, eptp); 945 break; 946 } 947 /* else fall through */ 948 default: 949 printf("WARNING: invept is not supported!\n"); 950 } 951 } 952 953 int set_ept_pte(unsigned long *pml4, unsigned long guest_addr, 954 int level, u64 pte_val) 955 { 956 int l; 957 unsigned long *pt = pml4; 958 unsigned offset; 959 960 if (level < 1 || level > 3) 961 return -1; 962 for (l = EPT_PAGE_LEVEL; ; --l) { 963 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 964 if (l == level) 965 break; 966 if (!(pt[offset] & (EPT_PRESENT))) 967 return -1; 968 pt = (unsigned long *)(pt[offset] & EPT_ADDR_MASK); 969 } 970 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 971 pt[offset] = pte_val; 972 return 0; 973 } 974 975 void vpid_sync(int type, u16 vpid) 976 { 977 switch(type) { 978 case INVVPID_SINGLE: 979 if (ept_vpid.val & VPID_CAP_INVVPID_SINGLE) { 980 invvpid(INVVPID_SINGLE, vpid, 0); 981 break; 982 } 983 case INVVPID_ALL: 984 if (ept_vpid.val & VPID_CAP_INVVPID_ALL) { 985 invvpid(INVVPID_ALL, vpid, 0); 986 break; 987 } 988 default: 989 printf("WARNING: invvpid is not supported\n"); 990 } 991 } 992 993 static void init_vmcs_ctrl(void) 994 { 995 /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 996 /* 26.2.1.1 */ 997 vmcs_write(PIN_CONTROLS, ctrl_pin); 998 /* Disable VMEXIT of IO instruction */ 999 vmcs_write(CPU_EXEC_CTRL0, ctrl_cpu[0]); 1000 if (ctrl_cpu_rev[0].set & CPU_SECONDARY) { 1001 ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) & 1002 ctrl_cpu_rev[1].clr; 1003 vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu[1]); 1004 } 1005 vmcs_write(CR3_TARGET_COUNT, 0); 1006 vmcs_write(VPID, ++vpid_cnt); 1007 } 1008 1009 static void init_vmcs_host(void) 1010 { 1011 /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 1012 /* 26.2.1.2 */ 1013 vmcs_write(HOST_EFER, rdmsr(MSR_EFER)); 1014 1015 /* 26.2.1.3 */ 1016 vmcs_write(ENT_CONTROLS, ctrl_enter); 1017 vmcs_write(EXI_CONTROLS, ctrl_exit); 1018 1019 /* 26.2.2 */ 1020 vmcs_write(HOST_CR0, read_cr0()); 1021 vmcs_write(HOST_CR3, read_cr3()); 1022 vmcs_write(HOST_CR4, read_cr4()); 1023 vmcs_write(HOST_SYSENTER_EIP, (u64)(&entry_sysenter)); 1024 vmcs_write(HOST_SYSENTER_CS, KERNEL_CS); 1025 1026 /* 26.2.3 */ 1027 vmcs_write(HOST_SEL_CS, KERNEL_CS); 1028 vmcs_write(HOST_SEL_SS, KERNEL_DS); 1029 vmcs_write(HOST_SEL_DS, KERNEL_DS); 1030 vmcs_write(HOST_SEL_ES, KERNEL_DS); 1031 vmcs_write(HOST_SEL_FS, KERNEL_DS); 1032 vmcs_write(HOST_SEL_GS, KERNEL_DS); 1033 vmcs_write(HOST_SEL_TR, TSS_MAIN); 1034 vmcs_write(HOST_BASE_TR, tss_descr.base); 1035 vmcs_write(HOST_BASE_GDTR, gdt64_desc.base); 1036 vmcs_write(HOST_BASE_IDTR, idt_descr.base); 1037 vmcs_write(HOST_BASE_FS, 0); 1038 vmcs_write(HOST_BASE_GS, 0); 1039 1040 /* Set other vmcs area */ 1041 vmcs_write(PF_ERROR_MASK, 0); 1042 vmcs_write(PF_ERROR_MATCH, 0); 1043 vmcs_write(VMCS_LINK_PTR, ~0ul); 1044 vmcs_write(VMCS_LINK_PTR_HI, ~0ul); 1045 vmcs_write(HOST_RIP, (u64)(&vmx_return)); 1046 } 1047 1048 static void init_vmcs_guest(void) 1049 { 1050 /* 26.3 CHECKING AND LOADING GUEST STATE */ 1051 ulong guest_cr0, guest_cr4, guest_cr3; 1052 /* 26.3.1.1 */ 1053 guest_cr0 = read_cr0(); 1054 guest_cr4 = read_cr4(); 1055 guest_cr3 = read_cr3(); 1056 if (ctrl_enter & ENT_GUEST_64) { 1057 guest_cr0 |= X86_CR0_PG; 1058 guest_cr4 |= X86_CR4_PAE; 1059 } 1060 if ((ctrl_enter & ENT_GUEST_64) == 0) 1061 guest_cr4 &= (~X86_CR4_PCIDE); 1062 if (guest_cr0 & X86_CR0_PG) 1063 guest_cr0 |= X86_CR0_PE; 1064 vmcs_write(GUEST_CR0, guest_cr0); 1065 vmcs_write(GUEST_CR3, guest_cr3); 1066 vmcs_write(GUEST_CR4, guest_cr4); 1067 vmcs_write(GUEST_SYSENTER_CS, KERNEL_CS); 1068 vmcs_write(GUEST_SYSENTER_ESP, 1069 (u64)(guest_syscall_stack + PAGE_SIZE - 1)); 1070 vmcs_write(GUEST_SYSENTER_EIP, (u64)(&entry_sysenter)); 1071 vmcs_write(GUEST_DR7, 0); 1072 vmcs_write(GUEST_EFER, rdmsr(MSR_EFER)); 1073 1074 /* 26.3.1.2 */ 1075 vmcs_write(GUEST_SEL_CS, KERNEL_CS); 1076 vmcs_write(GUEST_SEL_SS, KERNEL_DS); 1077 vmcs_write(GUEST_SEL_DS, KERNEL_DS); 1078 vmcs_write(GUEST_SEL_ES, KERNEL_DS); 1079 vmcs_write(GUEST_SEL_FS, KERNEL_DS); 1080 vmcs_write(GUEST_SEL_GS, KERNEL_DS); 1081 vmcs_write(GUEST_SEL_TR, TSS_MAIN); 1082 vmcs_write(GUEST_SEL_LDTR, 0); 1083 1084 vmcs_write(GUEST_BASE_CS, 0); 1085 vmcs_write(GUEST_BASE_ES, 0); 1086 vmcs_write(GUEST_BASE_SS, 0); 1087 vmcs_write(GUEST_BASE_DS, 0); 1088 vmcs_write(GUEST_BASE_FS, 0); 1089 vmcs_write(GUEST_BASE_GS, 0); 1090 vmcs_write(GUEST_BASE_TR, tss_descr.base); 1091 vmcs_write(GUEST_BASE_LDTR, 0); 1092 1093 vmcs_write(GUEST_LIMIT_CS, 0xFFFFFFFF); 1094 vmcs_write(GUEST_LIMIT_DS, 0xFFFFFFFF); 1095 vmcs_write(GUEST_LIMIT_ES, 0xFFFFFFFF); 1096 vmcs_write(GUEST_LIMIT_SS, 0xFFFFFFFF); 1097 vmcs_write(GUEST_LIMIT_FS, 0xFFFFFFFF); 1098 vmcs_write(GUEST_LIMIT_GS, 0xFFFFFFFF); 1099 vmcs_write(GUEST_LIMIT_LDTR, 0xffff); 1100 vmcs_write(GUEST_LIMIT_TR, tss_descr.limit); 1101 1102 vmcs_write(GUEST_AR_CS, 0xa09b); 1103 vmcs_write(GUEST_AR_DS, 0xc093); 1104 vmcs_write(GUEST_AR_ES, 0xc093); 1105 vmcs_write(GUEST_AR_FS, 0xc093); 1106 vmcs_write(GUEST_AR_GS, 0xc093); 1107 vmcs_write(GUEST_AR_SS, 0xc093); 1108 vmcs_write(GUEST_AR_LDTR, 0x82); 1109 vmcs_write(GUEST_AR_TR, 0x8b); 1110 1111 /* 26.3.1.3 */ 1112 vmcs_write(GUEST_BASE_GDTR, gdt64_desc.base); 1113 vmcs_write(GUEST_BASE_IDTR, idt_descr.base); 1114 vmcs_write(GUEST_LIMIT_GDTR, gdt64_desc.limit); 1115 vmcs_write(GUEST_LIMIT_IDTR, idt_descr.limit); 1116 1117 /* 26.3.1.4 */ 1118 vmcs_write(GUEST_RIP, (u64)(&guest_entry)); 1119 vmcs_write(GUEST_RSP, (u64)(guest_stack + PAGE_SIZE - 1)); 1120 vmcs_write(GUEST_RFLAGS, 0x2); 1121 1122 /* 26.3.1.5 */ 1123 vmcs_write(GUEST_ACTV_STATE, ACTV_ACTIVE); 1124 vmcs_write(GUEST_INTR_STATE, 0); 1125 } 1126 1127 static int init_vmcs(struct vmcs **vmcs) 1128 { 1129 *vmcs = alloc_page(); 1130 memset(*vmcs, 0, PAGE_SIZE); 1131 (*vmcs)->revision_id = basic.revision; 1132 /* vmclear first to init vmcs */ 1133 if (vmcs_clear(*vmcs)) { 1134 printf("%s : vmcs_clear error\n", __func__); 1135 return 1; 1136 } 1137 1138 if (make_vmcs_current(*vmcs)) { 1139 printf("%s : make_vmcs_current error\n", __func__); 1140 return 1; 1141 } 1142 1143 /* All settings to pin/exit/enter/cpu 1144 control fields should be placed here */ 1145 ctrl_pin |= PIN_EXTINT | PIN_NMI | PIN_VIRT_NMI; 1146 ctrl_exit = EXI_LOAD_EFER | EXI_HOST_64; 1147 ctrl_enter = (ENT_LOAD_EFER | ENT_GUEST_64); 1148 /* DIsable IO instruction VMEXIT now */ 1149 ctrl_cpu[0] &= (~(CPU_IO | CPU_IO_BITMAP)); 1150 ctrl_cpu[1] = 0; 1151 1152 ctrl_pin = (ctrl_pin | ctrl_pin_rev.set) & ctrl_pin_rev.clr; 1153 ctrl_enter = (ctrl_enter | ctrl_enter_rev.set) & ctrl_enter_rev.clr; 1154 ctrl_exit = (ctrl_exit | ctrl_exit_rev.set) & ctrl_exit_rev.clr; 1155 ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr; 1156 1157 init_vmcs_ctrl(); 1158 init_vmcs_host(); 1159 init_vmcs_guest(); 1160 return 0; 1161 } 1162 1163 static void init_vmx(void) 1164 { 1165 ulong fix_cr0_set, fix_cr0_clr; 1166 ulong fix_cr4_set, fix_cr4_clr; 1167 1168 vmxon_region = alloc_page(); 1169 memset(vmxon_region, 0, PAGE_SIZE); 1170 1171 fix_cr0_set = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 1172 fix_cr0_clr = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 1173 fix_cr4_set = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 1174 fix_cr4_clr = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 1175 basic.val = rdmsr(MSR_IA32_VMX_BASIC); 1176 ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PIN 1177 : MSR_IA32_VMX_PINBASED_CTLS); 1178 ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT 1179 : MSR_IA32_VMX_EXIT_CTLS); 1180 ctrl_enter_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_ENTRY 1181 : MSR_IA32_VMX_ENTRY_CTLS); 1182 ctrl_cpu_rev[0].val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PROC 1183 : MSR_IA32_VMX_PROCBASED_CTLS); 1184 if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0) 1185 ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2); 1186 else 1187 ctrl_cpu_rev[1].val = 0; 1188 if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0) 1189 ept_vpid.val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 1190 else 1191 ept_vpid.val = 0; 1192 1193 write_cr0((read_cr0() & fix_cr0_clr) | fix_cr0_set); 1194 write_cr4((read_cr4() & fix_cr4_clr) | fix_cr4_set | X86_CR4_VMXE); 1195 1196 *vmxon_region = basic.revision; 1197 1198 guest_stack = alloc_page(); 1199 memset(guest_stack, 0, PAGE_SIZE); 1200 guest_syscall_stack = alloc_page(); 1201 memset(guest_syscall_stack, 0, PAGE_SIZE); 1202 } 1203 1204 static void do_vmxon_off(void *data) 1205 { 1206 vmx_on(); 1207 vmx_off(); 1208 } 1209 1210 static void do_write_feature_control(void *data) 1211 { 1212 wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 1213 } 1214 1215 static int test_vmx_feature_control(void) 1216 { 1217 u64 ia32_feature_control; 1218 bool vmx_enabled; 1219 1220 ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); 1221 vmx_enabled = ((ia32_feature_control & 0x5) == 0x5); 1222 if ((ia32_feature_control & 0x5) == 0x5) { 1223 printf("VMX enabled and locked by BIOS\n"); 1224 return 0; 1225 } else if (ia32_feature_control & 0x1) { 1226 printf("ERROR: VMX locked out by BIOS!?\n"); 1227 return 1; 1228 } 1229 1230 wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 1231 report("test vmxon with FEATURE_CONTROL cleared", 1232 test_for_exception(GP_VECTOR, &do_vmxon_off, NULL)); 1233 1234 wrmsr(MSR_IA32_FEATURE_CONTROL, 0x4); 1235 report("test vmxon without FEATURE_CONTROL lock", 1236 test_for_exception(GP_VECTOR, &do_vmxon_off, NULL)); 1237 1238 wrmsr(MSR_IA32_FEATURE_CONTROL, 0x5); 1239 vmx_enabled = ((rdmsr(MSR_IA32_FEATURE_CONTROL) & 0x5) == 0x5); 1240 report("test enable VMX in FEATURE_CONTROL", vmx_enabled); 1241 1242 report("test FEATURE_CONTROL lock bit", 1243 test_for_exception(GP_VECTOR, &do_write_feature_control, NULL)); 1244 1245 return !vmx_enabled; 1246 } 1247 1248 static int test_vmxon(void) 1249 { 1250 int ret, ret1; 1251 u64 *tmp_region = vmxon_region; 1252 int width = cpuid_maxphyaddr(); 1253 1254 /* Unaligned page access */ 1255 vmxon_region = (u64 *)((intptr_t)vmxon_region + 1); 1256 ret1 = vmx_on(); 1257 report("test vmxon with unaligned vmxon region", ret1); 1258 if (!ret1) { 1259 ret = 1; 1260 goto out; 1261 } 1262 1263 /* gpa bits beyond physical address width are set*/ 1264 vmxon_region = (u64 *)((intptr_t)tmp_region | ((u64)1 << (width+1))); 1265 ret1 = vmx_on(); 1266 report("test vmxon with bits set beyond physical address width", ret1); 1267 if (!ret1) { 1268 ret = 1; 1269 goto out; 1270 } 1271 1272 /* invalid revision indentifier */ 1273 vmxon_region = tmp_region; 1274 *vmxon_region = 0xba9da9; 1275 ret1 = vmx_on(); 1276 report("test vmxon with invalid revision identifier", ret1); 1277 if (!ret1) { 1278 ret = 1; 1279 goto out; 1280 } 1281 1282 /* and finally a valid region */ 1283 *vmxon_region = basic.revision; 1284 ret = vmx_on(); 1285 report("test vmxon with valid vmxon region", !ret); 1286 1287 out: 1288 return ret; 1289 } 1290 1291 static void test_vmptrld(void) 1292 { 1293 struct vmcs *vmcs, *tmp_root; 1294 int width = cpuid_maxphyaddr(); 1295 1296 vmcs = alloc_page(); 1297 vmcs->revision_id = basic.revision; 1298 1299 /* Unaligned page access */ 1300 tmp_root = (struct vmcs *)((intptr_t)vmcs + 1); 1301 report("test vmptrld with unaligned vmcs", 1302 make_vmcs_current(tmp_root) == 1); 1303 1304 /* gpa bits beyond physical address width are set*/ 1305 tmp_root = (struct vmcs *)((intptr_t)vmcs | 1306 ((u64)1 << (width+1))); 1307 report("test vmptrld with vmcs address bits set beyond physical address width", 1308 make_vmcs_current(tmp_root) == 1); 1309 1310 /* Pass VMXON region */ 1311 make_vmcs_current(vmcs); 1312 tmp_root = (struct vmcs *)vmxon_region; 1313 report("test vmptrld with vmxon region", 1314 make_vmcs_current(tmp_root) == 1); 1315 report("test vmptrld with vmxon region vm-instruction error", 1316 vmcs_read(VMX_INST_ERROR) == VMXERR_VMPTRLD_VMXON_POINTER); 1317 1318 report("test vmptrld with valid vmcs region", make_vmcs_current(vmcs) == 0); 1319 } 1320 1321 static void test_vmptrst(void) 1322 { 1323 int ret; 1324 struct vmcs *vmcs1, *vmcs2; 1325 1326 vmcs1 = alloc_page(); 1327 memset(vmcs1, 0, PAGE_SIZE); 1328 init_vmcs(&vmcs1); 1329 ret = vmcs_save(&vmcs2); 1330 report("test vmptrst", (!ret) && (vmcs1 == vmcs2)); 1331 } 1332 1333 struct vmx_ctl_msr { 1334 const char *name; 1335 u32 index, true_index; 1336 u32 default1; 1337 } vmx_ctl_msr[] = { 1338 { "MSR_IA32_VMX_PINBASED_CTLS", MSR_IA32_VMX_PINBASED_CTLS, 1339 MSR_IA32_VMX_TRUE_PIN, 0x16 }, 1340 { "MSR_IA32_VMX_PROCBASED_CTLS", MSR_IA32_VMX_PROCBASED_CTLS, 1341 MSR_IA32_VMX_TRUE_PROC, 0x401e172 }, 1342 { "MSR_IA32_VMX_PROCBASED_CTLS2", MSR_IA32_VMX_PROCBASED_CTLS2, 1343 MSR_IA32_VMX_PROCBASED_CTLS2, 0 }, 1344 { "MSR_IA32_VMX_EXIT_CTLS", MSR_IA32_VMX_EXIT_CTLS, 1345 MSR_IA32_VMX_TRUE_EXIT, 0x36dff }, 1346 { "MSR_IA32_VMX_ENTRY_CTLS", MSR_IA32_VMX_ENTRY_CTLS, 1347 MSR_IA32_VMX_TRUE_ENTRY, 0x11ff }, 1348 }; 1349 1350 static void test_vmx_caps(void) 1351 { 1352 u64 val, default1, fixed0, fixed1; 1353 union vmx_ctrl_msr ctrl, true_ctrl; 1354 unsigned int n; 1355 bool ok; 1356 1357 printf("\nTest suite: VMX capability reporting\n"); 1358 1359 report("MSR_IA32_VMX_BASIC", 1360 (basic.revision & (1ul << 31)) == 0 && 1361 basic.size > 0 && basic.size <= 4096 && 1362 (basic.type == 0 || basic.type == 6) && 1363 basic.reserved1 == 0 && basic.reserved2 == 0); 1364 1365 val = rdmsr(MSR_IA32_VMX_MISC); 1366 report("MSR_IA32_VMX_MISC", 1367 (!(ctrl_cpu_rev[1].clr & CPU_URG) || val & (1ul << 5)) && 1368 ((val >> 16) & 0x1ff) <= 256 && 1369 (val & 0xc0007e00) == 0); 1370 1371 for (n = 0; n < ARRAY_SIZE(vmx_ctl_msr); n++) { 1372 ctrl.val = rdmsr(vmx_ctl_msr[n].index); 1373 default1 = vmx_ctl_msr[n].default1; 1374 ok = (ctrl.set & default1) == default1; 1375 ok = ok && (ctrl.set & ~ctrl.clr) == 0; 1376 if (ok && basic.ctrl) { 1377 true_ctrl.val = rdmsr(vmx_ctl_msr[n].true_index); 1378 ok = ctrl.clr == true_ctrl.clr; 1379 ok = ok && ctrl.set == (true_ctrl.set | default1); 1380 } 1381 report(vmx_ctl_msr[n].name, ok); 1382 } 1383 1384 fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 1385 fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 1386 report("MSR_IA32_VMX_IA32_VMX_CR0_FIXED0/1", 1387 ((fixed0 ^ fixed1) & ~fixed1) == 0); 1388 1389 fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 1390 fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 1391 report("MSR_IA32_VMX_IA32_VMX_CR4_FIXED0/1", 1392 ((fixed0 ^ fixed1) & ~fixed1) == 0); 1393 1394 val = rdmsr(MSR_IA32_VMX_VMCS_ENUM); 1395 report("MSR_IA32_VMX_VMCS_ENUM", 1396 (val & 0x3e) >= 0x2a && 1397 (val & 0xfffffffffffffc01Ull) == 0); 1398 1399 val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 1400 report("MSR_IA32_VMX_EPT_VPID_CAP", 1401 (val & 0xfffff07ef98cbebeUll) == 0); 1402 } 1403 1404 /* This function can only be called in guest */ 1405 static void __attribute__((__used__)) hypercall(u32 hypercall_no) 1406 { 1407 u64 val = 0; 1408 val = (hypercall_no & HYPERCALL_MASK) | HYPERCALL_BIT; 1409 hypercall_field = val; 1410 asm volatile("vmcall\n\t"); 1411 } 1412 1413 static bool is_hypercall() 1414 { 1415 ulong reason, hyper_bit; 1416 1417 reason = vmcs_read(EXI_REASON) & 0xff; 1418 hyper_bit = hypercall_field & HYPERCALL_BIT; 1419 if (reason == VMX_VMCALL && hyper_bit) 1420 return true; 1421 return false; 1422 } 1423 1424 static int handle_hypercall() 1425 { 1426 ulong hypercall_no; 1427 1428 hypercall_no = hypercall_field & HYPERCALL_MASK; 1429 hypercall_field = 0; 1430 switch (hypercall_no) { 1431 case HYPERCALL_VMEXIT: 1432 return VMX_TEST_VMEXIT; 1433 case HYPERCALL_VMABORT: 1434 return VMX_TEST_VMABORT; 1435 case HYPERCALL_VMSKIP: 1436 return VMX_TEST_VMSKIP; 1437 default: 1438 printf("ERROR : Invalid hypercall number : %ld\n", hypercall_no); 1439 } 1440 return VMX_TEST_EXIT; 1441 } 1442 1443 static void continue_abort(void) 1444 { 1445 assert(!in_guest); 1446 printf("Host was here when guest aborted:\n"); 1447 dump_stack(); 1448 longjmp(abort_target, 1); 1449 abort(); 1450 } 1451 1452 void __abort_test(void) 1453 { 1454 if (in_guest) 1455 hypercall(HYPERCALL_VMABORT); 1456 else 1457 longjmp(abort_target, 1); 1458 abort(); 1459 } 1460 1461 static void continue_skip(void) 1462 { 1463 assert(!in_guest); 1464 longjmp(abort_target, 1); 1465 abort(); 1466 } 1467 1468 void test_skip(const char *msg) 1469 { 1470 printf("%s skipping test: %s\n", in_guest ? "Guest" : "Host", msg); 1471 if (in_guest) 1472 hypercall(HYPERCALL_VMABORT); 1473 else 1474 longjmp(abort_target, 1); 1475 abort(); 1476 } 1477 1478 static int exit_handler() 1479 { 1480 int ret; 1481 1482 current->exits++; 1483 regs.rflags = vmcs_read(GUEST_RFLAGS); 1484 if (is_hypercall()) 1485 ret = handle_hypercall(); 1486 else 1487 ret = current->exit_handler(); 1488 vmcs_write(GUEST_RFLAGS, regs.rflags); 1489 1490 return ret; 1491 } 1492 1493 /* 1494 * Called if vmlaunch or vmresume fails. 1495 * @early - failure due to "VMX controls and host-state area" (26.2) 1496 * @vmlaunch - was this a vmlaunch or vmresume 1497 * @rflags - host rflags 1498 */ 1499 static int 1500 entry_failure_handler(struct vmentry_failure *failure) 1501 { 1502 if (current->entry_failure_handler) 1503 return current->entry_failure_handler(failure); 1504 else 1505 return VMX_TEST_EXIT; 1506 } 1507 1508 /* 1509 * Tries to enter the guest. Returns true iff entry succeeded. Otherwise, 1510 * populates @failure. 1511 */ 1512 static bool vmx_enter_guest(struct vmentry_failure *failure) 1513 { 1514 failure->early = 0; 1515 1516 in_guest = 1; 1517 asm volatile ( 1518 "mov %[HOST_RSP], %%rdi\n\t" 1519 "vmwrite %%rsp, %%rdi\n\t" 1520 LOAD_GPR_C 1521 "cmpb $0, %[launched]\n\t" 1522 "jne 1f\n\t" 1523 "vmlaunch\n\t" 1524 "jmp 2f\n\t" 1525 "1: " 1526 "vmresume\n\t" 1527 "2: " 1528 SAVE_GPR_C 1529 "pushf\n\t" 1530 "pop %%rdi\n\t" 1531 "mov %%rdi, %[failure_flags]\n\t" 1532 "movl $1, %[failure_flags]\n\t" 1533 "jmp 3f\n\t" 1534 "vmx_return:\n\t" 1535 SAVE_GPR_C 1536 "3: \n\t" 1537 : [failure_early]"+m"(failure->early), 1538 [failure_flags]"=m"(failure->flags) 1539 : [launched]"m"(launched), [HOST_RSP]"i"(HOST_RSP) 1540 : "rdi", "memory", "cc" 1541 ); 1542 in_guest = 0; 1543 1544 failure->vmlaunch = !launched; 1545 failure->instr = launched ? "vmresume" : "vmlaunch"; 1546 1547 return !failure->early && !(vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE); 1548 } 1549 1550 static int vmx_run() 1551 { 1552 while (1) { 1553 u32 ret; 1554 bool entered; 1555 struct vmentry_failure failure; 1556 1557 entered = vmx_enter_guest(&failure); 1558 1559 if (entered) { 1560 /* 1561 * VMCS isn't in "launched" state if there's been any 1562 * entry failure (early or otherwise). 1563 */ 1564 launched = 1; 1565 ret = exit_handler(); 1566 } else { 1567 ret = entry_failure_handler(&failure); 1568 } 1569 1570 switch (ret) { 1571 case VMX_TEST_RESUME: 1572 continue; 1573 case VMX_TEST_VMEXIT: 1574 guest_finished = 1; 1575 return 0; 1576 case VMX_TEST_EXIT: 1577 break; 1578 default: 1579 printf("ERROR : Invalid %s_handler return val %d.\n", 1580 entered ? "exit" : "entry_failure", 1581 ret); 1582 break; 1583 } 1584 1585 if (entered) 1586 print_vmexit_info(); 1587 else 1588 print_vmentry_failure_info(&failure); 1589 abort(); 1590 } 1591 } 1592 1593 static void run_teardown_step(struct test_teardown_step *step) 1594 { 1595 step->func(step->data); 1596 } 1597 1598 static int test_run(struct vmx_test *test) 1599 { 1600 int r; 1601 1602 /* Validate V2 interface. */ 1603 if (test->v2) { 1604 int ret = 0; 1605 if (test->init || test->guest_main || test->exit_handler || 1606 test->syscall_handler) { 1607 report("V2 test cannot specify V1 callbacks.", 0); 1608 ret = 1; 1609 } 1610 if (ret) 1611 return ret; 1612 } 1613 1614 if (test->name == NULL) 1615 test->name = "(no name)"; 1616 if (vmx_on()) { 1617 printf("%s : vmxon failed.\n", __func__); 1618 return 1; 1619 } 1620 1621 init_vmcs(&(test->vmcs)); 1622 /* Directly call test->init is ok here, init_vmcs has done 1623 vmcs init, vmclear and vmptrld*/ 1624 if (test->init && test->init(test->vmcs) != VMX_TEST_START) 1625 goto out; 1626 teardown_count = 0; 1627 v2_guest_main = NULL; 1628 test->exits = 0; 1629 current = test; 1630 regs = test->guest_regs; 1631 vmcs_write(GUEST_RFLAGS, regs.rflags | 0x2); 1632 launched = 0; 1633 guest_finished = 0; 1634 printf("\nTest suite: %s\n", test->name); 1635 1636 r = setjmp(abort_target); 1637 if (r) { 1638 assert(!in_guest); 1639 goto out; 1640 } 1641 1642 1643 if (test->v2) 1644 test->v2(); 1645 else 1646 vmx_run(); 1647 1648 while (teardown_count > 0) 1649 run_teardown_step(&teardown_steps[--teardown_count]); 1650 1651 if (launched && !guest_finished) 1652 report("Guest didn't run to completion.", 0); 1653 1654 out: 1655 if (vmx_off()) { 1656 printf("%s : vmxoff failed.\n", __func__); 1657 return 1; 1658 } 1659 return 0; 1660 } 1661 1662 /* 1663 * Add a teardown step. Executed after the test's main function returns. 1664 * Teardown steps executed in reverse order. 1665 */ 1666 void test_add_teardown(test_teardown_func func, void *data) 1667 { 1668 struct test_teardown_step *step; 1669 1670 TEST_ASSERT_MSG(teardown_count < MAX_TEST_TEARDOWN_STEPS, 1671 "There are already %d teardown steps.", 1672 teardown_count); 1673 step = &teardown_steps[teardown_count++]; 1674 step->func = func; 1675 step->data = data; 1676 } 1677 1678 /* 1679 * Set the target of the first enter_guest call. Can only be called once per 1680 * test. Must be called before first enter_guest call. 1681 */ 1682 void test_set_guest(test_guest_func func) 1683 { 1684 assert(current->v2); 1685 TEST_ASSERT_MSG(!v2_guest_main, "Already set guest func."); 1686 v2_guest_main = func; 1687 } 1688 1689 /* 1690 * Enters the guest (or launches it for the first time). Error to call once the 1691 * guest has returned (i.e., run past the end of its guest() function). Also 1692 * aborts if guest entry fails. 1693 */ 1694 void enter_guest(void) 1695 { 1696 struct vmentry_failure failure; 1697 1698 TEST_ASSERT_MSG(v2_guest_main, 1699 "Never called test_set_guest_func!"); 1700 1701 TEST_ASSERT_MSG(!guest_finished, 1702 "Called enter_guest() after guest returned."); 1703 1704 if (!vmx_enter_guest(&failure)) { 1705 print_vmentry_failure_info(&failure); 1706 abort(); 1707 } 1708 1709 launched = 1; 1710 1711 if (is_hypercall()) { 1712 int ret; 1713 1714 ret = handle_hypercall(); 1715 switch (ret) { 1716 case VMX_TEST_VMEXIT: 1717 guest_finished = 1; 1718 break; 1719 case VMX_TEST_VMABORT: 1720 continue_abort(); 1721 break; 1722 case VMX_TEST_VMSKIP: 1723 continue_skip(); 1724 break; 1725 default: 1726 printf("ERROR : Invalid handle_hypercall return %d.\n", 1727 ret); 1728 abort(); 1729 } 1730 } 1731 } 1732 1733 extern struct vmx_test vmx_tests[]; 1734 1735 static bool 1736 test_wanted(const char *name, const char *filters[], int filter_count) 1737 { 1738 int i; 1739 bool positive = false; 1740 bool match = false; 1741 char clean_name[strlen(name) + 1]; 1742 char *c; 1743 const char *n; 1744 1745 /* Replace spaces with underscores. */ 1746 n = name; 1747 c = &clean_name[0]; 1748 do *c++ = (*n == ' ') ? '_' : *n; 1749 while (*n++); 1750 1751 for (i = 0; i < filter_count; i++) { 1752 const char *filter = filters[i]; 1753 1754 if (filter[0] == '-') { 1755 if (simple_glob(clean_name, filter + 1)) 1756 return false; 1757 } else { 1758 positive = true; 1759 match |= simple_glob(clean_name, filter); 1760 } 1761 } 1762 1763 if (!positive || match) { 1764 matched++; 1765 return true; 1766 } else { 1767 return false; 1768 } 1769 } 1770 1771 int main(int argc, const char *argv[]) 1772 { 1773 int i = 0; 1774 1775 setup_vm(); 1776 setup_idt(); 1777 hypercall_field = 0; 1778 1779 argv++; 1780 argc--; 1781 1782 if (!(cpuid(1).c & (1 << 5))) { 1783 printf("WARNING: vmx not supported, add '-cpu host'\n"); 1784 goto exit; 1785 } 1786 init_vmx(); 1787 if (test_wanted("test_vmx_feature_control", argv, argc)) { 1788 /* Sets MSR_IA32_FEATURE_CONTROL to 0x5 */ 1789 if (test_vmx_feature_control() != 0) 1790 goto exit; 1791 } else { 1792 if ((rdmsr(MSR_IA32_FEATURE_CONTROL) & 0x5) != 0x5) 1793 wrmsr(MSR_IA32_FEATURE_CONTROL, 0x5); 1794 } 1795 1796 if (test_wanted("test_vmxon", argv, argc)) { 1797 /* Enables VMX */ 1798 if (test_vmxon() != 0) 1799 goto exit; 1800 } else { 1801 if (vmx_on()) { 1802 report("vmxon", 0); 1803 goto exit; 1804 } 1805 } 1806 1807 if (test_wanted("test_vmptrld", argv, argc)) 1808 test_vmptrld(); 1809 if (test_wanted("test_vmclear", argv, argc)) 1810 test_vmclear(); 1811 if (test_wanted("test_vmptrst", argv, argc)) 1812 test_vmptrst(); 1813 if (test_wanted("test_vmwrite_vmread", argv, argc)) 1814 test_vmwrite_vmread(); 1815 if (test_wanted("test_vmcs_lifecycle", argv, argc)) 1816 test_vmcs_lifecycle(); 1817 if (test_wanted("test_vmx_caps", argv, argc)) 1818 test_vmx_caps(); 1819 1820 /* Balance vmxon from test_vmxon. */ 1821 vmx_off(); 1822 1823 for (; vmx_tests[i].name != NULL; i++) { 1824 if (!test_wanted(vmx_tests[i].name, argv, argc)) 1825 continue; 1826 if (test_run(&vmx_tests[i])) 1827 goto exit; 1828 } 1829 1830 if (!matched) 1831 report("command line didn't match any tests!", matched); 1832 1833 exit: 1834 return report_summary(); 1835 } 1836