xref: /kvm-unit-tests/x86/vmx.c (revision db6f75d8ed3bad508612da5833916390aa6b1e35)
17ada359dSArthur Chunqi Li /*
27ada359dSArthur Chunqi Li  * x86/vmx.c : Framework for testing nested virtualization
37ada359dSArthur Chunqi Li  *	This is a framework to test nested VMX for KVM, which
47ada359dSArthur Chunqi Li  * 	started as a project of GSoC 2013. All test cases should
57ada359dSArthur Chunqi Li  *	be located in x86/vmx_tests.c and framework related
67ada359dSArthur Chunqi Li  *	functions should be in this file.
77ada359dSArthur Chunqi Li  *
87ada359dSArthur Chunqi Li  * How to write test cases?
97ada359dSArthur Chunqi Li  *	Add callbacks of test suite in variant "vmx_tests". You can
107ada359dSArthur Chunqi Li  *	write:
117ada359dSArthur Chunqi Li  *		1. init function used for initializing test suite
127ada359dSArthur Chunqi Li  *		2. main function for codes running in L2 guest,
137ada359dSArthur Chunqi Li  *		3. exit_handler to handle vmexit of L2 to L1
147ada359dSArthur Chunqi Li  *		4. syscall handler to handle L2 syscall vmexit
157ada359dSArthur Chunqi Li  *		5. vmenter fail handler to handle direct failure of vmenter
167ada359dSArthur Chunqi Li  *		6. guest_regs is loaded when vmenter and saved when
177ada359dSArthur Chunqi Li  *			vmexit, you can read and set it in exit_handler
187ada359dSArthur Chunqi Li  *	If no special function is needed for a test suite, use
197ada359dSArthur Chunqi Li  *	coressponding basic_* functions as callback. More handlers
207ada359dSArthur Chunqi Li  *	can be added to "vmx_tests", see details of "struct vmx_test"
217ada359dSArthur Chunqi Li  *	and function test_run().
227ada359dSArthur Chunqi Li  *
237ada359dSArthur Chunqi Li  * Currently, vmx test framework only set up one VCPU and one
247ada359dSArthur Chunqi Li  * concurrent guest test environment with same paging for L2 and
257ada359dSArthur Chunqi Li  * L1. For usage of EPT, only 1:1 mapped paging is used from VFN
267ada359dSArthur Chunqi Li  * to PFN.
277ada359dSArthur Chunqi Li  *
287ada359dSArthur Chunqi Li  * Author : Arthur Chunqi Li <yzt356@gmail.com>
297ada359dSArthur Chunqi Li  */
307ada359dSArthur Chunqi Li 
319d7eaa29SArthur Chunqi Li #include "libcflat.h"
329d7eaa29SArthur Chunqi Li #include "processor.h"
335aca024eSPaolo Bonzini #include "alloc_page.h"
349d7eaa29SArthur Chunqi Li #include "vm.h"
359d7eaa29SArthur Chunqi Li #include "desc.h"
369d7eaa29SArthur Chunqi Li #include "vmx.h"
379d7eaa29SArthur Chunqi Li #include "msr.h"
389d7eaa29SArthur Chunqi Li #include "smp.h"
397371c622SVitaly Kuznetsov #include "apic.h"
409d7eaa29SArthur Chunqi Li 
41c937d495SLiran Alon u64 *bsp_vmxon_region;
429d7eaa29SArthur Chunqi Li struct vmcs *vmcs_root;
439d7eaa29SArthur Chunqi Li u32 vpid_cnt;
449d7eaa29SArthur Chunqi Li void *guest_stack, *guest_syscall_stack;
459d7eaa29SArthur Chunqi Li u32 ctrl_pin, ctrl_enter, ctrl_exit, ctrl_cpu[2];
469d7eaa29SArthur Chunqi Li struct regs regs;
47794c67a9SPeter Feiner 
489d7eaa29SArthur Chunqi Li struct vmx_test *current;
49794c67a9SPeter Feiner 
50794c67a9SPeter Feiner #define MAX_TEST_TEARDOWN_STEPS 10
51794c67a9SPeter Feiner 
52794c67a9SPeter Feiner struct test_teardown_step {
53794c67a9SPeter Feiner 	test_teardown_func func;
54794c67a9SPeter Feiner 	void *data;
55794c67a9SPeter Feiner };
56794c67a9SPeter Feiner 
57794c67a9SPeter Feiner static int teardown_count;
58794c67a9SPeter Feiner static struct test_teardown_step teardown_steps[MAX_TEST_TEARDOWN_STEPS];
59794c67a9SPeter Feiner 
60794c67a9SPeter Feiner static test_guest_func v2_guest_main;
61794c67a9SPeter Feiner 
623ee34093SArthur Chunqi Li u64 hypercall_field;
639d7eaa29SArthur Chunqi Li bool launched;
64c04259ffSDavid Matlack static int matched;
65794c67a9SPeter Feiner static int guest_finished;
66794c67a9SPeter Feiner static int in_guest;
679d7eaa29SArthur Chunqi Li 
683ee34093SArthur Chunqi Li union vmx_basic basic;
695f18e779SJan Kiszka union vmx_ctrl_msr ctrl_pin_rev;
705f18e779SJan Kiszka union vmx_ctrl_msr ctrl_cpu_rev[2];
715f18e779SJan Kiszka union vmx_ctrl_msr ctrl_exit_rev;
725f18e779SJan Kiszka union vmx_ctrl_msr ctrl_enter_rev;
733ee34093SArthur Chunqi Li union vmx_ept_vpid  ept_vpid;
743ee34093SArthur Chunqi Li 
75337166aaSJan Kiszka extern struct descriptor_table_ptr gdt64_desc;
76337166aaSJan Kiszka extern struct descriptor_table_ptr idt_descr;
77337166aaSJan Kiszka extern struct descriptor_table_ptr tss_descr;
789d7eaa29SArthur Chunqi Li extern void *vmx_return;
799d7eaa29SArthur Chunqi Li extern void *entry_sysenter;
809d7eaa29SArthur Chunqi Li extern void *guest_entry;
819d7eaa29SArthur Chunqi Li 
82ffb1a9e0SJan Kiszka static volatile u32 stage;
83ffb1a9e0SJan Kiszka 
84794c67a9SPeter Feiner static jmp_buf abort_target;
85794c67a9SPeter Feiner 
86ecd5b431SDavid Matlack struct vmcs_field {
87ecd5b431SDavid Matlack 	u64 mask;
88ecd5b431SDavid Matlack 	u64 encoding;
89ecd5b431SDavid Matlack };
90ecd5b431SDavid Matlack 
91ecd5b431SDavid Matlack #define MASK(_bits) GENMASK_ULL((_bits) - 1, 0)
92ecd5b431SDavid Matlack #define MASK_NATURAL MASK(sizeof(unsigned long) * 8)
93ecd5b431SDavid Matlack 
94ecd5b431SDavid Matlack static struct vmcs_field vmcs_fields[] = {
95ecd5b431SDavid Matlack 	{ MASK(16), VPID },
96ecd5b431SDavid Matlack 	{ MASK(16), PINV },
97ecd5b431SDavid Matlack 	{ MASK(16), EPTP_IDX },
98ecd5b431SDavid Matlack 
99ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_ES },
100ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_CS },
101ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_SS },
102ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_DS },
103ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_FS },
104ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_GS },
105ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_LDTR },
106ecd5b431SDavid Matlack 	{ MASK(16), GUEST_SEL_TR },
107ecd5b431SDavid Matlack 	{ MASK(16), GUEST_INT_STATUS },
108ecd5b431SDavid Matlack 
109ecd5b431SDavid Matlack 	{ MASK(16), HOST_SEL_ES },
110ecd5b431SDavid Matlack 	{ MASK(16), HOST_SEL_CS },
111ecd5b431SDavid Matlack 	{ MASK(16), HOST_SEL_SS },
112ecd5b431SDavid Matlack 	{ MASK(16), HOST_SEL_DS },
113ecd5b431SDavid Matlack 	{ MASK(16), HOST_SEL_FS },
114ecd5b431SDavid Matlack 	{ MASK(16), HOST_SEL_GS },
115ecd5b431SDavid Matlack 	{ MASK(16), HOST_SEL_TR },
116ecd5b431SDavid Matlack 
117ecd5b431SDavid Matlack 	{ MASK(64), IO_BITMAP_A },
118ecd5b431SDavid Matlack 	{ MASK(64), IO_BITMAP_B },
119ecd5b431SDavid Matlack 	{ MASK(64), MSR_BITMAP },
120ecd5b431SDavid Matlack 	{ MASK(64), EXIT_MSR_ST_ADDR },
121ecd5b431SDavid Matlack 	{ MASK(64), EXIT_MSR_LD_ADDR },
122ecd5b431SDavid Matlack 	{ MASK(64), ENTER_MSR_LD_ADDR },
123ecd5b431SDavid Matlack 	{ MASK(64), VMCS_EXEC_PTR },
124ecd5b431SDavid Matlack 	{ MASK(64), TSC_OFFSET },
125ecd5b431SDavid Matlack 	{ MASK(64), APIC_VIRT_ADDR },
126ecd5b431SDavid Matlack 	{ MASK(64), APIC_ACCS_ADDR },
127ecd5b431SDavid Matlack 	{ MASK(64), EPTP },
128ecd5b431SDavid Matlack 
129faea4fc6SLiran Alon 	{ MASK(64), INFO_PHYS_ADDR },
130ecd5b431SDavid Matlack 
131ecd5b431SDavid Matlack 	{ MASK(64), VMCS_LINK_PTR },
132ecd5b431SDavid Matlack 	{ MASK(64), GUEST_DEBUGCTL },
133ecd5b431SDavid Matlack 	{ MASK(64), GUEST_EFER },
134ecd5b431SDavid Matlack 	{ MASK(64), GUEST_PAT },
135ecd5b431SDavid Matlack 	{ MASK(64), GUEST_PERF_GLOBAL_CTRL },
136ecd5b431SDavid Matlack 	{ MASK(64), GUEST_PDPTE },
137ecd5b431SDavid Matlack 
138ecd5b431SDavid Matlack 	{ MASK(64), HOST_PAT },
139ecd5b431SDavid Matlack 	{ MASK(64), HOST_EFER },
140ecd5b431SDavid Matlack 	{ MASK(64), HOST_PERF_GLOBAL_CTRL },
141ecd5b431SDavid Matlack 
142ecd5b431SDavid Matlack 	{ MASK(32), PIN_CONTROLS },
143ecd5b431SDavid Matlack 	{ MASK(32), CPU_EXEC_CTRL0 },
144ecd5b431SDavid Matlack 	{ MASK(32), EXC_BITMAP },
145ecd5b431SDavid Matlack 	{ MASK(32), PF_ERROR_MASK },
146ecd5b431SDavid Matlack 	{ MASK(32), PF_ERROR_MATCH },
147ecd5b431SDavid Matlack 	{ MASK(32), CR3_TARGET_COUNT },
148ecd5b431SDavid Matlack 	{ MASK(32), EXI_CONTROLS },
149ecd5b431SDavid Matlack 	{ MASK(32), EXI_MSR_ST_CNT },
150ecd5b431SDavid Matlack 	{ MASK(32), EXI_MSR_LD_CNT },
151ecd5b431SDavid Matlack 	{ MASK(32), ENT_CONTROLS },
152ecd5b431SDavid Matlack 	{ MASK(32), ENT_MSR_LD_CNT },
153ecd5b431SDavid Matlack 	{ MASK(32), ENT_INTR_INFO },
154ecd5b431SDavid Matlack 	{ MASK(32), ENT_INTR_ERROR },
155ecd5b431SDavid Matlack 	{ MASK(32), ENT_INST_LEN },
156ecd5b431SDavid Matlack 	{ MASK(32), TPR_THRESHOLD },
157ecd5b431SDavid Matlack 	{ MASK(32), CPU_EXEC_CTRL1 },
158ecd5b431SDavid Matlack 
159faea4fc6SLiran Alon 	{ MASK(32), VMX_INST_ERROR },
160faea4fc6SLiran Alon 	{ MASK(32), EXI_REASON },
161faea4fc6SLiran Alon 	{ MASK(32), EXI_INTR_INFO },
162faea4fc6SLiran Alon 	{ MASK(32), EXI_INTR_ERROR },
163faea4fc6SLiran Alon 	{ MASK(32), IDT_VECT_INFO },
164faea4fc6SLiran Alon 	{ MASK(32), IDT_VECT_ERROR },
165faea4fc6SLiran Alon 	{ MASK(32), EXI_INST_LEN },
166faea4fc6SLiran Alon 	{ MASK(32), EXI_INST_INFO },
167ecd5b431SDavid Matlack 
168ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_ES },
169ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_CS },
170ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_SS },
171ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_DS },
172ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_FS },
173ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_GS },
174ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_LDTR },
175ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_TR },
176ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_GDTR },
177ecd5b431SDavid Matlack 	{ MASK(32), GUEST_LIMIT_IDTR },
178ecd5b431SDavid Matlack 	{ 0x1d0ff, GUEST_AR_ES },
179ecd5b431SDavid Matlack 	{ 0x1f0ff, GUEST_AR_CS },
180ecd5b431SDavid Matlack 	{ 0x1d0ff, GUEST_AR_SS },
181ecd5b431SDavid Matlack 	{ 0x1d0ff, GUEST_AR_DS },
182ecd5b431SDavid Matlack 	{ 0x1d0ff, GUEST_AR_FS },
183ecd5b431SDavid Matlack 	{ 0x1d0ff, GUEST_AR_GS },
184ecd5b431SDavid Matlack 	{ 0x1d0ff, GUEST_AR_LDTR },
185ecd5b431SDavid Matlack 	{ 0x1d0ff, GUEST_AR_TR },
186ecd5b431SDavid Matlack 	{ MASK(32), GUEST_INTR_STATE },
187ecd5b431SDavid Matlack 	{ MASK(32), GUEST_ACTV_STATE },
188ecd5b431SDavid Matlack 	{ MASK(32), GUEST_SMBASE },
189ecd5b431SDavid Matlack 	{ MASK(32), GUEST_SYSENTER_CS },
190ecd5b431SDavid Matlack 	{ MASK(32), PREEMPT_TIMER_VALUE },
191ecd5b431SDavid Matlack 
192ecd5b431SDavid Matlack 	{ MASK(32), HOST_SYSENTER_CS },
193ecd5b431SDavid Matlack 
194ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR0_MASK },
195ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR4_MASK },
196ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR0_READ_SHADOW },
197ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR4_READ_SHADOW },
198ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR3_TARGET_0 },
199ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR3_TARGET_1 },
200ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR3_TARGET_2 },
201ecd5b431SDavid Matlack 	{ MASK_NATURAL, CR3_TARGET_3 },
202ecd5b431SDavid Matlack 
203faea4fc6SLiran Alon 	{ MASK_NATURAL, EXI_QUALIFICATION },
204faea4fc6SLiran Alon 	{ MASK_NATURAL, IO_RCX },
205faea4fc6SLiran Alon 	{ MASK_NATURAL, IO_RSI },
206faea4fc6SLiran Alon 	{ MASK_NATURAL, IO_RDI },
207faea4fc6SLiran Alon 	{ MASK_NATURAL, IO_RIP },
208faea4fc6SLiran Alon 	{ MASK_NATURAL, GUEST_LINEAR_ADDRESS },
209ecd5b431SDavid Matlack 
210ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_CR0 },
211ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_CR3 },
212ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_CR4 },
213ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_ES },
214ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_CS },
215ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_SS },
216ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_DS },
217ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_FS },
218ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_GS },
219ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_LDTR },
220ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_TR },
221ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_GDTR },
222ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_BASE_IDTR },
223ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_DR7 },
224ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_RSP },
225ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_RIP },
226ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_RFLAGS },
227ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_PENDING_DEBUG },
228ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_SYSENTER_ESP },
229ecd5b431SDavid Matlack 	{ MASK_NATURAL, GUEST_SYSENTER_EIP },
230ecd5b431SDavid Matlack 
231ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_CR0 },
232ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_CR3 },
233ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_CR4 },
234ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_BASE_FS },
235ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_BASE_GS },
236ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_BASE_TR },
237ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_BASE_GDTR },
238ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_BASE_IDTR },
239ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_SYSENTER_ESP },
240ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_SYSENTER_EIP },
241ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_RSP },
242ecd5b431SDavid Matlack 	{ MASK_NATURAL, HOST_RIP },
243ecd5b431SDavid Matlack };
244ecd5b431SDavid Matlack 
245faea4fc6SLiran Alon enum vmcs_field_type {
246faea4fc6SLiran Alon 	VMCS_FIELD_TYPE_CONTROL = 0,
247faea4fc6SLiran Alon 	VMCS_FIELD_TYPE_READ_ONLY_DATA = 1,
248faea4fc6SLiran Alon 	VMCS_FIELD_TYPE_GUEST = 2,
249faea4fc6SLiran Alon 	VMCS_FIELD_TYPE_HOST = 3,
250faea4fc6SLiran Alon 	VMCS_FIELD_TYPES,
251faea4fc6SLiran Alon };
252faea4fc6SLiran Alon 
253faea4fc6SLiran Alon static inline int vmcs_field_type(struct vmcs_field *f)
254faea4fc6SLiran Alon {
255faea4fc6SLiran Alon 	return (f->encoding >> VMCS_FIELD_TYPE_SHIFT) & 0x3;
256faea4fc6SLiran Alon }
257faea4fc6SLiran Alon 
258faea4fc6SLiran Alon static int vmcs_field_readonly(struct vmcs_field *f)
259faea4fc6SLiran Alon {
260faea4fc6SLiran Alon 	u64 ia32_vmx_misc;
261faea4fc6SLiran Alon 
262faea4fc6SLiran Alon 	ia32_vmx_misc = rdmsr(MSR_IA32_VMX_MISC);
263faea4fc6SLiran Alon 	return !(ia32_vmx_misc & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS) &&
264faea4fc6SLiran Alon 		(vmcs_field_type(f) == VMCS_FIELD_TYPE_READ_ONLY_DATA);
265faea4fc6SLiran Alon }
266faea4fc6SLiran Alon 
267ecd5b431SDavid Matlack static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie)
268ecd5b431SDavid Matlack {
269ecd5b431SDavid Matlack 	u64 value;
270ecd5b431SDavid Matlack 
271ecd5b431SDavid Matlack 	/* Incorporate the cookie and the field encoding into the value. */
272ecd5b431SDavid Matlack 	value = cookie;
273ecd5b431SDavid Matlack 	value |= (f->encoding << 8);
274ecd5b431SDavid Matlack 	value |= 0xdeadbeefull << 32;
275ecd5b431SDavid Matlack 
276ecd5b431SDavid Matlack 	return value & f->mask;
277ecd5b431SDavid Matlack }
278ecd5b431SDavid Matlack 
279ecd5b431SDavid Matlack static void set_vmcs_field(struct vmcs_field *f, u8 cookie)
280ecd5b431SDavid Matlack {
281ecd5b431SDavid Matlack 	vmcs_write(f->encoding, vmcs_field_value(f, cookie));
282ecd5b431SDavid Matlack }
283ecd5b431SDavid Matlack 
28493655697SNadav Amit static bool check_vmcs_field(struct vmcs_field *f, u8 cookie)
285ecd5b431SDavid Matlack {
286ecd5b431SDavid Matlack 	u64 expected;
287ecd5b431SDavid Matlack 	u64 actual;
288ecd5b431SDavid Matlack 	int ret;
289ecd5b431SDavid Matlack 
290faea4fc6SLiran Alon 	if (f->encoding == VMX_INST_ERROR) {
291faea4fc6SLiran Alon 		printf("Skipping volatile field %lx\n", f->encoding);
292faea4fc6SLiran Alon 		return true;
293faea4fc6SLiran Alon 	}
294faea4fc6SLiran Alon 
295ecd5b431SDavid Matlack 	ret = vmcs_read_checking(f->encoding, &actual);
296ecd5b431SDavid Matlack 	assert(!(ret & X86_EFLAGS_CF));
297ecd5b431SDavid Matlack 	/* Skip VMCS fields that aren't recognized by the CPU */
298ecd5b431SDavid Matlack 	if (ret & X86_EFLAGS_ZF)
299ecd5b431SDavid Matlack 		return true;
300ecd5b431SDavid Matlack 
30185cd1cf9SSean Christopherson 	if (vmcs_field_readonly(f)) {
30285cd1cf9SSean Christopherson 		printf("Skipping read-only field %lx\n", f->encoding);
30385cd1cf9SSean Christopherson 		return true;
30485cd1cf9SSean Christopherson 	}
30585cd1cf9SSean Christopherson 
306ecd5b431SDavid Matlack 	expected = vmcs_field_value(f, cookie);
307ecd5b431SDavid Matlack 	actual &= f->mask;
308ecd5b431SDavid Matlack 
309ecd5b431SDavid Matlack 	if (expected == actual)
310ecd5b431SDavid Matlack 		return true;
311ecd5b431SDavid Matlack 
312d4ab68adSDavid Matlack 	printf("FAIL: VMWRITE/VMREAD %lx (expected: %lx, actual: %lx)\n",
313ecd5b431SDavid Matlack 	       f->encoding, (unsigned long) expected, (unsigned long) actual);
314ecd5b431SDavid Matlack 
315ecd5b431SDavid Matlack 	return false;
316ecd5b431SDavid Matlack }
317ecd5b431SDavid Matlack 
318ecd5b431SDavid Matlack static void set_all_vmcs_fields(u8 cookie)
319ecd5b431SDavid Matlack {
320ecd5b431SDavid Matlack 	int i;
321ecd5b431SDavid Matlack 
322ecd5b431SDavid Matlack 	for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++)
323ecd5b431SDavid Matlack 		set_vmcs_field(&vmcs_fields[i], cookie);
324ecd5b431SDavid Matlack }
325ecd5b431SDavid Matlack 
32693655697SNadav Amit static bool check_all_vmcs_fields(u8 cookie)
327ecd5b431SDavid Matlack {
328ecd5b431SDavid Matlack 	bool pass = true;
329ecd5b431SDavid Matlack 	int i;
330ecd5b431SDavid Matlack 
331ecd5b431SDavid Matlack 	for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) {
33293655697SNadav Amit 		if (!check_vmcs_field(&vmcs_fields[i], cookie))
333ecd5b431SDavid Matlack 			pass = false;
334ecd5b431SDavid Matlack 	}
335ecd5b431SDavid Matlack 
336ecd5b431SDavid Matlack 	return pass;
337ecd5b431SDavid Matlack }
338ecd5b431SDavid Matlack 
3392b0418e4SNadav Amit static u32 find_vmcs_max_index(void)
3402b0418e4SNadav Amit {
3412b0418e4SNadav Amit 	u32 idx, width, type, enc;
3422b0418e4SNadav Amit 	u64 actual;
3432b0418e4SNadav Amit 	int ret;
3442b0418e4SNadav Amit 
3452b0418e4SNadav Amit 	/* scan backwards and stop when found */
3462b0418e4SNadav Amit 	for (idx = (1 << 9) - 1; idx >= 0; idx--) {
3472b0418e4SNadav Amit 
3482b0418e4SNadav Amit 		/* try all combinations of width and type */
3492b0418e4SNadav Amit 		for (type = 0; type < (1 << 2); type++) {
3502b0418e4SNadav Amit 			for (width = 0; width < (1 << 2) ; width++) {
3512b0418e4SNadav Amit 				enc = (idx << VMCS_FIELD_INDEX_SHIFT) |
3522b0418e4SNadav Amit 				      (type << VMCS_FIELD_TYPE_SHIFT) |
3532b0418e4SNadav Amit 				      (width << VMCS_FIELD_WIDTH_SHIFT);
3542b0418e4SNadav Amit 
3552b0418e4SNadav Amit 				ret = vmcs_read_checking(enc, &actual);
3562b0418e4SNadav Amit 				assert(!(ret & X86_EFLAGS_CF));
3572b0418e4SNadav Amit 				if (!(ret & X86_EFLAGS_ZF))
3582b0418e4SNadav Amit 					return idx;
3592b0418e4SNadav Amit 			}
3602b0418e4SNadav Amit 		}
3612b0418e4SNadav Amit 	}
3622b0418e4SNadav Amit 	/* some VMCS fields should exist */
3632b0418e4SNadav Amit 	assert(0);
3642b0418e4SNadav Amit 	return 0;
3652b0418e4SNadav Amit }
3662b0418e4SNadav Amit 
367b29804b8SThomas Huth static void test_vmwrite_vmread(void)
368ecd5b431SDavid Matlack {
369ecd5b431SDavid Matlack 	struct vmcs *vmcs = alloc_page();
37085cd1cf9SSean Christopherson 	u32 vmcs_enum_max, max_index = 0;
371ecd5b431SDavid Matlack 
3726c0ba6e7SLiran Alon 	vmcs->hdr.revision_id = basic.revision;
373ecd5b431SDavid Matlack 	assert(!vmcs_clear(vmcs));
374ecd5b431SDavid Matlack 	assert(!make_vmcs_current(vmcs));
375ecd5b431SDavid Matlack 
376ecd5b431SDavid Matlack 	set_all_vmcs_fields(0x42);
3772b0418e4SNadav Amit 	report(check_all_vmcs_fields(0x42), "VMWRITE/VMREAD");
37885cd1cf9SSean Christopherson 
3792b0418e4SNadav Amit 	vmcs_enum_max = (rdmsr(MSR_IA32_VMX_VMCS_ENUM) & VMCS_FIELD_INDEX_MASK)
3802b0418e4SNadav Amit 			>> VMCS_FIELD_INDEX_SHIFT;
3812b0418e4SNadav Amit 	max_index = find_vmcs_max_index();
3822b0418e4SNadav Amit 	report(vmcs_enum_max == max_index,
3832b0418e4SNadav Amit 	       "VMX_VMCS_ENUM.MAX_INDEX expected: %x, actual: %x",
384a299895bSThomas Huth 	       max_index, vmcs_enum_max);
385ecd5b431SDavid Matlack 
386ecd5b431SDavid Matlack 	assert(!vmcs_clear(vmcs));
387ecd5b431SDavid Matlack 	free_page(vmcs);
388ecd5b431SDavid Matlack }
389ecd5b431SDavid Matlack 
390b29804b8SThomas Huth static void test_vmcs_high(void)
39159161cfaSJim Mattson {
39259161cfaSJim Mattson 	struct vmcs *vmcs = alloc_page();
39359161cfaSJim Mattson 
3946c0ba6e7SLiran Alon 	vmcs->hdr.revision_id = basic.revision;
39559161cfaSJim Mattson 	assert(!vmcs_clear(vmcs));
39659161cfaSJim Mattson 	assert(!make_vmcs_current(vmcs));
39759161cfaSJim Mattson 
39859161cfaSJim Mattson 	vmcs_write(TSC_OFFSET, 0x0123456789ABCDEFull);
399a299895bSThomas Huth 	report(vmcs_read(TSC_OFFSET) == 0x0123456789ABCDEFull,
400a299895bSThomas Huth 	       "VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET");
401a299895bSThomas Huth 	report(vmcs_read(TSC_OFFSET_HI) == 0x01234567ull,
402a299895bSThomas Huth 	       "VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET");
40359161cfaSJim Mattson 	vmcs_write(TSC_OFFSET_HI, 0x76543210ul);
404a299895bSThomas Huth 	report(vmcs_read(TSC_OFFSET_HI) == 0x76543210ul,
405a299895bSThomas Huth 	       "VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET_HI");
406a299895bSThomas Huth 	report(vmcs_read(TSC_OFFSET) == 0x7654321089ABCDEFull,
407a299895bSThomas Huth 	       "VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET_HI");
40859161cfaSJim Mattson 
40959161cfaSJim Mattson 	assert(!vmcs_clear(vmcs));
41059161cfaSJim Mattson 	free_page(vmcs);
41159161cfaSJim Mattson }
41259161cfaSJim Mattson 
413b29804b8SThomas Huth static void test_vmcs_lifecycle(void)
4146b72cf76SDavid Matlack {
4156b72cf76SDavid Matlack 	struct vmcs *vmcs[2] = {};
4166b72cf76SDavid Matlack 	int i;
4176b72cf76SDavid Matlack 
4186b72cf76SDavid Matlack 	for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
4196b72cf76SDavid Matlack 		vmcs[i] = alloc_page();
4206c0ba6e7SLiran Alon 		vmcs[i]->hdr.revision_id = basic.revision;
4216b72cf76SDavid Matlack 	}
4226b72cf76SDavid Matlack 
4236b72cf76SDavid Matlack #define VMPTRLD(_i) do { \
4246b72cf76SDavid Matlack 	assert(_i < ARRAY_SIZE(vmcs)); \
4256b72cf76SDavid Matlack 	assert(!make_vmcs_current(vmcs[_i])); \
4266b72cf76SDavid Matlack 	printf("VMPTRLD VMCS%d\n", (_i)); \
4276b72cf76SDavid Matlack } while (0)
4286b72cf76SDavid Matlack 
4296b72cf76SDavid Matlack #define VMCLEAR(_i) do { \
4306b72cf76SDavid Matlack 	assert(_i < ARRAY_SIZE(vmcs)); \
4316b72cf76SDavid Matlack 	assert(!vmcs_clear(vmcs[_i])); \
4326b72cf76SDavid Matlack 	printf("VMCLEAR VMCS%d\n", (_i)); \
4336b72cf76SDavid Matlack } while (0)
4346b72cf76SDavid Matlack 
4356b72cf76SDavid Matlack 	VMCLEAR(0);
4366b72cf76SDavid Matlack 	VMPTRLD(0);
4376b72cf76SDavid Matlack 	set_all_vmcs_fields(0);
438a299895bSThomas Huth 	report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]");
4396b72cf76SDavid Matlack 
4406b72cf76SDavid Matlack 	VMCLEAR(0);
4416b72cf76SDavid Matlack 	VMPTRLD(0);
442a299895bSThomas Huth 	report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]");
4436b72cf76SDavid Matlack 
4446b72cf76SDavid Matlack 	VMCLEAR(1);
445a299895bSThomas Huth 	report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]");
4466b72cf76SDavid Matlack 
4476b72cf76SDavid Matlack 	VMPTRLD(1);
4486b72cf76SDavid Matlack 	set_all_vmcs_fields(1);
449a299895bSThomas Huth 	report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]");
4506b72cf76SDavid Matlack 
4516b72cf76SDavid Matlack 	VMPTRLD(0);
452a299895bSThomas Huth 	report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0,VCMS1]");
4536b72cf76SDavid Matlack 	VMPTRLD(1);
454a299895bSThomas Huth 	report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]");
4556b72cf76SDavid Matlack 	VMPTRLD(1);
456a299895bSThomas Huth 	report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]");
4576b72cf76SDavid Matlack 
4586b72cf76SDavid Matlack 	VMCLEAR(0);
459a299895bSThomas Huth 	report(check_all_vmcs_fields(1), "current:VMCS1 active:[VCMS1]");
4606b72cf76SDavid Matlack 
461d4ab68adSDavid Matlack 	/* VMPTRLD should not erase VMWRITEs to the current VMCS */
462d4ab68adSDavid Matlack 	set_all_vmcs_fields(2);
463d4ab68adSDavid Matlack 	VMPTRLD(1);
464a299895bSThomas Huth 	report(check_all_vmcs_fields(2), "current:VMCS1 active:[VCMS1]");
465d4ab68adSDavid Matlack 
4666b72cf76SDavid Matlack 	for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
4676b72cf76SDavid Matlack 		VMCLEAR(i);
4686b72cf76SDavid Matlack 		free_page(vmcs[i]);
4696b72cf76SDavid Matlack 	}
4706b72cf76SDavid Matlack 
4716b72cf76SDavid Matlack #undef VMPTRLD
4726b72cf76SDavid Matlack #undef VMCLEAR
4736b72cf76SDavid Matlack }
4746b72cf76SDavid Matlack 
475ffb1a9e0SJan Kiszka void vmx_set_test_stage(u32 s)
476ffb1a9e0SJan Kiszka {
477ffb1a9e0SJan Kiszka 	barrier();
478ffb1a9e0SJan Kiszka 	stage = s;
479ffb1a9e0SJan Kiszka 	barrier();
480ffb1a9e0SJan Kiszka }
481ffb1a9e0SJan Kiszka 
482ffb1a9e0SJan Kiszka u32 vmx_get_test_stage(void)
483ffb1a9e0SJan Kiszka {
484ffb1a9e0SJan Kiszka 	u32 s;
485ffb1a9e0SJan Kiszka 
486ffb1a9e0SJan Kiszka 	barrier();
487ffb1a9e0SJan Kiszka 	s = stage;
488ffb1a9e0SJan Kiszka 	barrier();
489ffb1a9e0SJan Kiszka 	return s;
490ffb1a9e0SJan Kiszka }
491ffb1a9e0SJan Kiszka 
492ffb1a9e0SJan Kiszka void vmx_inc_test_stage(void)
493ffb1a9e0SJan Kiszka {
494ffb1a9e0SJan Kiszka 	barrier();
495ffb1a9e0SJan Kiszka 	stage++;
496ffb1a9e0SJan Kiszka 	barrier();
497ffb1a9e0SJan Kiszka }
498ffb1a9e0SJan Kiszka 
4999d7eaa29SArthur Chunqi Li /* entry_sysenter */
5009d7eaa29SArthur Chunqi Li asm(
5019d7eaa29SArthur Chunqi Li 	".align	4, 0x90\n\t"
5029d7eaa29SArthur Chunqi Li 	".globl	entry_sysenter\n\t"
5039d7eaa29SArthur Chunqi Li 	"entry_sysenter:\n\t"
5049d7eaa29SArthur Chunqi Li 	SAVE_GPR
5059d7eaa29SArthur Chunqi Li 	"	and	$0xf, %rax\n\t"
5069d7eaa29SArthur Chunqi Li 	"	mov	%rax, %rdi\n\t"
5079d7eaa29SArthur Chunqi Li 	"	call	syscall_handler\n\t"
5089d7eaa29SArthur Chunqi Li 	LOAD_GPR
5099d7eaa29SArthur Chunqi Li 	"	vmresume\n\t"
5109d7eaa29SArthur Chunqi Li );
5119d7eaa29SArthur Chunqi Li 
5129d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) syscall_handler(u64 syscall_no)
5139d7eaa29SArthur Chunqi Li {
514d5315e3dSJan Kiszka 	if (current->syscall_handler)
5159d7eaa29SArthur Chunqi Li 		current->syscall_handler(syscall_no);
5169d7eaa29SArthur Chunqi Li }
5179d7eaa29SArthur Chunqi Li 
5187e207ec1SPeter Feiner static const char * const exit_reason_descriptions[] = {
5197e207ec1SPeter Feiner 	[VMX_EXC_NMI]		= "VMX_EXC_NMI",
5207e207ec1SPeter Feiner 	[VMX_EXTINT]		= "VMX_EXTINT",
5217e207ec1SPeter Feiner 	[VMX_TRIPLE_FAULT]	= "VMX_TRIPLE_FAULT",
5227e207ec1SPeter Feiner 	[VMX_INIT]		= "VMX_INIT",
5237e207ec1SPeter Feiner 	[VMX_SIPI]		= "VMX_SIPI",
5247e207ec1SPeter Feiner 	[VMX_SMI_IO]		= "VMX_SMI_IO",
5257e207ec1SPeter Feiner 	[VMX_SMI_OTHER]		= "VMX_SMI_OTHER",
5267e207ec1SPeter Feiner 	[VMX_INTR_WINDOW]	= "VMX_INTR_WINDOW",
5277e207ec1SPeter Feiner 	[VMX_NMI_WINDOW]	= "VMX_NMI_WINDOW",
5287e207ec1SPeter Feiner 	[VMX_TASK_SWITCH]	= "VMX_TASK_SWITCH",
5297e207ec1SPeter Feiner 	[VMX_CPUID]		= "VMX_CPUID",
5307e207ec1SPeter Feiner 	[VMX_GETSEC]		= "VMX_GETSEC",
5317e207ec1SPeter Feiner 	[VMX_HLT]		= "VMX_HLT",
5327e207ec1SPeter Feiner 	[VMX_INVD]		= "VMX_INVD",
5337e207ec1SPeter Feiner 	[VMX_INVLPG]		= "VMX_INVLPG",
5347e207ec1SPeter Feiner 	[VMX_RDPMC]		= "VMX_RDPMC",
5357e207ec1SPeter Feiner 	[VMX_RDTSC]		= "VMX_RDTSC",
5367e207ec1SPeter Feiner 	[VMX_RSM]		= "VMX_RSM",
5377e207ec1SPeter Feiner 	[VMX_VMCALL]		= "VMX_VMCALL",
5387e207ec1SPeter Feiner 	[VMX_VMCLEAR]		= "VMX_VMCLEAR",
5397e207ec1SPeter Feiner 	[VMX_VMLAUNCH]		= "VMX_VMLAUNCH",
5407e207ec1SPeter Feiner 	[VMX_VMPTRLD]		= "VMX_VMPTRLD",
5417e207ec1SPeter Feiner 	[VMX_VMPTRST]		= "VMX_VMPTRST",
5427e207ec1SPeter Feiner 	[VMX_VMREAD]		= "VMX_VMREAD",
5437e207ec1SPeter Feiner 	[VMX_VMRESUME]		= "VMX_VMRESUME",
5447e207ec1SPeter Feiner 	[VMX_VMWRITE]		= "VMX_VMWRITE",
5457e207ec1SPeter Feiner 	[VMX_VMXOFF]		= "VMX_VMXOFF",
5467e207ec1SPeter Feiner 	[VMX_VMXON]		= "VMX_VMXON",
5477e207ec1SPeter Feiner 	[VMX_CR]		= "VMX_CR",
5487e207ec1SPeter Feiner 	[VMX_DR]		= "VMX_DR",
5497e207ec1SPeter Feiner 	[VMX_IO]		= "VMX_IO",
5507e207ec1SPeter Feiner 	[VMX_RDMSR]		= "VMX_RDMSR",
5517e207ec1SPeter Feiner 	[VMX_WRMSR]		= "VMX_WRMSR",
5527e207ec1SPeter Feiner 	[VMX_FAIL_STATE]	= "VMX_FAIL_STATE",
5537e207ec1SPeter Feiner 	[VMX_FAIL_MSR]		= "VMX_FAIL_MSR",
5547e207ec1SPeter Feiner 	[VMX_MWAIT]		= "VMX_MWAIT",
5557e207ec1SPeter Feiner 	[VMX_MTF]		= "VMX_MTF",
5567e207ec1SPeter Feiner 	[VMX_MONITOR]		= "VMX_MONITOR",
5577e207ec1SPeter Feiner 	[VMX_PAUSE]		= "VMX_PAUSE",
5587e207ec1SPeter Feiner 	[VMX_FAIL_MCHECK]	= "VMX_FAIL_MCHECK",
5597e207ec1SPeter Feiner 	[VMX_TPR_THRESHOLD]	= "VMX_TPR_THRESHOLD",
5607e207ec1SPeter Feiner 	[VMX_APIC_ACCESS]	= "VMX_APIC_ACCESS",
56167fdc49eSArbel Moshe 	[VMX_EOI_INDUCED]	= "VMX_EOI_INDUCED",
5627e207ec1SPeter Feiner 	[VMX_GDTR_IDTR]		= "VMX_GDTR_IDTR",
5637e207ec1SPeter Feiner 	[VMX_LDTR_TR]		= "VMX_LDTR_TR",
5647e207ec1SPeter Feiner 	[VMX_EPT_VIOLATION]	= "VMX_EPT_VIOLATION",
5657e207ec1SPeter Feiner 	[VMX_EPT_MISCONFIG]	= "VMX_EPT_MISCONFIG",
5667e207ec1SPeter Feiner 	[VMX_INVEPT]		= "VMX_INVEPT",
5677e207ec1SPeter Feiner 	[VMX_PREEMPT]		= "VMX_PREEMPT",
5687e207ec1SPeter Feiner 	[VMX_INVVPID]		= "VMX_INVVPID",
5697e207ec1SPeter Feiner 	[VMX_WBINVD]		= "VMX_WBINVD",
5707e207ec1SPeter Feiner 	[VMX_XSETBV]		= "VMX_XSETBV",
5717e207ec1SPeter Feiner 	[VMX_APIC_WRITE]	= "VMX_APIC_WRITE",
5727e207ec1SPeter Feiner 	[VMX_RDRAND]		= "VMX_RDRAND",
5737e207ec1SPeter Feiner 	[VMX_INVPCID]		= "VMX_INVPCID",
5747e207ec1SPeter Feiner 	[VMX_VMFUNC]		= "VMX_VMFUNC",
5757e207ec1SPeter Feiner 	[VMX_RDSEED]		= "VMX_RDSEED",
5767e207ec1SPeter Feiner 	[VMX_PML_FULL]		= "VMX_PML_FULL",
5777e207ec1SPeter Feiner 	[VMX_XSAVES]		= "VMX_XSAVES",
5787e207ec1SPeter Feiner 	[VMX_XRSTORS]		= "VMX_XRSTORS",
5797e207ec1SPeter Feiner };
5807e207ec1SPeter Feiner 
5817e207ec1SPeter Feiner const char *exit_reason_description(u64 reason)
5827e207ec1SPeter Feiner {
5837e207ec1SPeter Feiner 	if (reason >= ARRAY_SIZE(exit_reason_descriptions))
5847e207ec1SPeter Feiner 		return "(unknown)";
5857e207ec1SPeter Feiner 	return exit_reason_descriptions[reason] ? : "(unused)";
5867e207ec1SPeter Feiner }
5877e207ec1SPeter Feiner 
5883ee34093SArthur Chunqi Li void print_vmexit_info()
5899d7eaa29SArthur Chunqi Li {
5909d7eaa29SArthur Chunqi Li 	u64 guest_rip, guest_rsp;
5919d7eaa29SArthur Chunqi Li 	ulong reason = vmcs_read(EXI_REASON) & 0xff;
5929d7eaa29SArthur Chunqi Li 	ulong exit_qual = vmcs_read(EXI_QUALIFICATION);
5939d7eaa29SArthur Chunqi Li 	guest_rip = vmcs_read(GUEST_RIP);
5949d7eaa29SArthur Chunqi Li 	guest_rsp = vmcs_read(GUEST_RSP);
5959d7eaa29SArthur Chunqi Li 	printf("VMEXIT info:\n");
596b006d7ebSAndrew Jones 	printf("\tvmexit reason = %ld\n", reason);
597fd6aada0SRadim Krčmář 	printf("\texit qualification = %#lx\n", exit_qual);
598b006d7ebSAndrew Jones 	printf("\tBit 31 of reason = %lx\n", (vmcs_read(EXI_REASON) >> 31) & 1);
599fd6aada0SRadim Krčmář 	printf("\tguest_rip = %#lx\n", guest_rip);
600fd6aada0SRadim Krčmář 	printf("\tRAX=%#lx    RBX=%#lx    RCX=%#lx    RDX=%#lx\n",
6019d7eaa29SArthur Chunqi Li 		regs.rax, regs.rbx, regs.rcx, regs.rdx);
602fd6aada0SRadim Krčmář 	printf("\tRSP=%#lx    RBP=%#lx    RSI=%#lx    RDI=%#lx\n",
6039d7eaa29SArthur Chunqi Li 		guest_rsp, regs.rbp, regs.rsi, regs.rdi);
604fd6aada0SRadim Krčmář 	printf("\tR8 =%#lx    R9 =%#lx    R10=%#lx    R11=%#lx\n",
6059d7eaa29SArthur Chunqi Li 		regs.r8, regs.r9, regs.r10, regs.r11);
606fd6aada0SRadim Krčmář 	printf("\tR12=%#lx    R13=%#lx    R14=%#lx    R15=%#lx\n",
6079d7eaa29SArthur Chunqi Li 		regs.r12, regs.r13, regs.r14, regs.r15);
6089d7eaa29SArthur Chunqi Li }
6099d7eaa29SArthur Chunqi Li 
6103b50efe3SPeter Feiner void
6113b50efe3SPeter Feiner print_vmentry_failure_info(struct vmentry_failure *failure) {
6123b50efe3SPeter Feiner 	if (failure->early) {
6133b50efe3SPeter Feiner 		printf("Early %s failure: ", failure->instr);
6143b50efe3SPeter Feiner 		switch (failure->flags & VMX_ENTRY_FLAGS) {
615ce154ba8SPaolo Bonzini 		case X86_EFLAGS_CF:
6163b50efe3SPeter Feiner 			printf("current-VMCS pointer is not valid.\n");
6173b50efe3SPeter Feiner 			break;
618ce154ba8SPaolo Bonzini 		case X86_EFLAGS_ZF:
6193b50efe3SPeter Feiner 			printf("error number is %ld. See Intel 30.4.\n",
6203b50efe3SPeter Feiner 			       vmcs_read(VMX_INST_ERROR));
6213b50efe3SPeter Feiner 			break;
6223b50efe3SPeter Feiner 		default:
6233b50efe3SPeter Feiner 			printf("unexpected flags %lx!\n", failure->flags);
6243b50efe3SPeter Feiner 		}
6253b50efe3SPeter Feiner 	} else {
6263b50efe3SPeter Feiner 		u64 reason = vmcs_read(EXI_REASON);
6273b50efe3SPeter Feiner 		u64 qual = vmcs_read(EXI_QUALIFICATION);
6283b50efe3SPeter Feiner 
629fd6aada0SRadim Krčmář 		printf("Non-early %s failure (reason=%#lx, qual=%#lx): ",
6303b50efe3SPeter Feiner 			failure->instr, reason, qual);
6313b50efe3SPeter Feiner 
6323b50efe3SPeter Feiner 		switch (reason & 0xff) {
6333b50efe3SPeter Feiner 		case VMX_FAIL_STATE:
6343b50efe3SPeter Feiner 			printf("invalid guest state\n");
6353b50efe3SPeter Feiner 			break;
6363b50efe3SPeter Feiner 		case VMX_FAIL_MSR:
6373b50efe3SPeter Feiner 			printf("MSR loading\n");
6383b50efe3SPeter Feiner 			break;
6393b50efe3SPeter Feiner 		case VMX_FAIL_MCHECK:
6403b50efe3SPeter Feiner 			printf("machine-check event\n");
6413b50efe3SPeter Feiner 			break;
6423b50efe3SPeter Feiner 		default:
6433b50efe3SPeter Feiner 			printf("unexpected basic exit reason %ld\n",
6443b50efe3SPeter Feiner 			       reason & 0xff);
6453b50efe3SPeter Feiner 		}
6463b50efe3SPeter Feiner 
6473b50efe3SPeter Feiner 		if (!(reason & VMX_ENTRY_FAILURE))
6483b50efe3SPeter Feiner 			printf("\tVMX_ENTRY_FAILURE BIT NOT SET!\n");
6493b50efe3SPeter Feiner 
6503b50efe3SPeter Feiner 		if (reason & 0x7fff0000)
6513b50efe3SPeter Feiner 			printf("\tRESERVED BITS SET!\n");
6523b50efe3SPeter Feiner 	}
6533b50efe3SPeter Feiner }
6543b50efe3SPeter Feiner 
6552f6828d7SDavid Matlack /*
6562f6828d7SDavid Matlack  * VMCLEAR should ensures all VMCS state is flushed to the VMCS
6572f6828d7SDavid Matlack  * region in memory.
6582f6828d7SDavid Matlack  */
6592f6828d7SDavid Matlack static void test_vmclear_flushing(void)
6602f6828d7SDavid Matlack {
6612f6828d7SDavid Matlack 	struct vmcs *vmcs[3] = {};
6622f6828d7SDavid Matlack 	int i;
6632f6828d7SDavid Matlack 
6642f6828d7SDavid Matlack 	for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
6652f6828d7SDavid Matlack 		vmcs[i] = alloc_page();
6662f6828d7SDavid Matlack 	}
6672f6828d7SDavid Matlack 
6686c0ba6e7SLiran Alon 	vmcs[0]->hdr.revision_id = basic.revision;
6692f6828d7SDavid Matlack 	assert(!vmcs_clear(vmcs[0]));
6702f6828d7SDavid Matlack 	assert(!make_vmcs_current(vmcs[0]));
6712f6828d7SDavid Matlack 	set_all_vmcs_fields(0x86);
6722f6828d7SDavid Matlack 
6732f6828d7SDavid Matlack 	assert(!vmcs_clear(vmcs[0]));
6742f6828d7SDavid Matlack 	memcpy(vmcs[1], vmcs[0], basic.size);
6752f6828d7SDavid Matlack 	assert(!make_vmcs_current(vmcs[1]));
676a299895bSThomas Huth 	report(check_all_vmcs_fields(0x86),
677a299895bSThomas Huth 	       "test vmclear flush (current VMCS)");
6782f6828d7SDavid Matlack 
6792f6828d7SDavid Matlack 	set_all_vmcs_fields(0x87);
6802f6828d7SDavid Matlack 	assert(!make_vmcs_current(vmcs[0]));
6812f6828d7SDavid Matlack 	assert(!vmcs_clear(vmcs[1]));
6822f6828d7SDavid Matlack 	memcpy(vmcs[2], vmcs[1], basic.size);
6832f6828d7SDavid Matlack 	assert(!make_vmcs_current(vmcs[2]));
684a299895bSThomas Huth 	report(check_all_vmcs_fields(0x87),
685a299895bSThomas Huth 	       "test vmclear flush (!current VMCS)");
6862f6828d7SDavid Matlack 
6872f6828d7SDavid Matlack 	for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
6882f6828d7SDavid Matlack 		assert(!vmcs_clear(vmcs[i]));
6892f6828d7SDavid Matlack 		free_page(vmcs[i]);
6902f6828d7SDavid Matlack 	}
6912f6828d7SDavid Matlack }
6923b50efe3SPeter Feiner 
6939d7eaa29SArthur Chunqi Li static void test_vmclear(void)
6949d7eaa29SArthur Chunqi Li {
695daeec979SBandan Das 	struct vmcs *tmp_root;
696e2cf1c9dSEduardo Habkost 	int width = cpuid_maxphyaddr();
697daeec979SBandan Das 
698daeec979SBandan Das 	/*
699daeec979SBandan Das 	 * Note- The tests below do not necessarily have a
700daeec979SBandan Das 	 * valid VMCS, but that's ok since the invalid vmcs
701daeec979SBandan Das 	 * is only used for a specific test and is discarded
702daeec979SBandan Das 	 * without touching its contents
703daeec979SBandan Das 	 */
704daeec979SBandan Das 
705daeec979SBandan Das 	/* Unaligned page access */
706daeec979SBandan Das 	tmp_root = (struct vmcs *)((intptr_t)vmcs_root + 1);
707a299895bSThomas Huth 	report(vmcs_clear(tmp_root) == 1, "test vmclear with unaligned vmcs");
708daeec979SBandan Das 
709daeec979SBandan Das 	/* gpa bits beyond physical address width are set*/
710daeec979SBandan Das 	tmp_root = (struct vmcs *)((intptr_t)vmcs_root |
711daeec979SBandan Das 				   ((u64)1 << (width+1)));
712a299895bSThomas Huth 	report(vmcs_clear(tmp_root) == 1,
713a299895bSThomas Huth 	       "test vmclear with vmcs address bits set beyond physical address width");
714daeec979SBandan Das 
715daeec979SBandan Das 	/* Pass VMXON region */
716c937d495SLiran Alon 	tmp_root = (struct vmcs *)bsp_vmxon_region;
717a299895bSThomas Huth 	report(vmcs_clear(tmp_root) == 1, "test vmclear with vmxon region");
718daeec979SBandan Das 
719daeec979SBandan Das 	/* Valid VMCS */
720a299895bSThomas Huth 	report(vmcs_clear(vmcs_root) == 0,
721a299895bSThomas Huth 	       "test vmclear with valid vmcs region");
722daeec979SBandan Das 
7232f6828d7SDavid Matlack 	test_vmclear_flushing();
7249d7eaa29SArthur Chunqi Li }
7259d7eaa29SArthur Chunqi Li 
7269d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) guest_main(void)
7279d7eaa29SArthur Chunqi Li {
728794c67a9SPeter Feiner 	if (current->v2)
729794c67a9SPeter Feiner 		v2_guest_main();
730794c67a9SPeter Feiner 	else
7319d7eaa29SArthur Chunqi Li 		current->guest_main();
7329d7eaa29SArthur Chunqi Li }
7339d7eaa29SArthur Chunqi Li 
7349d7eaa29SArthur Chunqi Li /* guest_entry */
7359d7eaa29SArthur Chunqi Li asm(
7369d7eaa29SArthur Chunqi Li 	".align	4, 0x90\n\t"
7379d7eaa29SArthur Chunqi Li 	".globl	entry_guest\n\t"
7389d7eaa29SArthur Chunqi Li 	"guest_entry:\n\t"
7399d7eaa29SArthur Chunqi Li 	"	call guest_main\n\t"
7409d7eaa29SArthur Chunqi Li 	"	mov $1, %edi\n\t"
7419d7eaa29SArthur Chunqi Li 	"	call hypercall\n\t"
7429d7eaa29SArthur Chunqi Li );
7439d7eaa29SArthur Chunqi Li 
7446884af61SArthur Chunqi Li /* EPT paging structure related functions */
74569c531c8SPeter Feiner /* split_large_ept_entry: Split a 2M/1G large page into 512 smaller PTEs.
74669c531c8SPeter Feiner 		@ptep : large page table entry to split
74769c531c8SPeter Feiner 		@level : level of ptep (2 or 3)
74869c531c8SPeter Feiner  */
74969c531c8SPeter Feiner static void split_large_ept_entry(unsigned long *ptep, int level)
75069c531c8SPeter Feiner {
75169c531c8SPeter Feiner 	unsigned long *new_pt;
75269c531c8SPeter Feiner 	unsigned long gpa;
75369c531c8SPeter Feiner 	unsigned long pte;
75469c531c8SPeter Feiner 	unsigned long prototype;
75569c531c8SPeter Feiner 	int i;
75669c531c8SPeter Feiner 
75769c531c8SPeter Feiner 	pte = *ptep;
75869c531c8SPeter Feiner 	assert(pte & EPT_PRESENT);
75969c531c8SPeter Feiner 	assert(pte & EPT_LARGE_PAGE);
76069c531c8SPeter Feiner 	assert(level == 2 || level == 3);
76169c531c8SPeter Feiner 
76269c531c8SPeter Feiner 	new_pt = alloc_page();
76369c531c8SPeter Feiner 	assert(new_pt);
76469c531c8SPeter Feiner 
76569c531c8SPeter Feiner 	prototype = pte & ~EPT_ADDR_MASK;
76669c531c8SPeter Feiner 	if (level == 2)
76769c531c8SPeter Feiner 		prototype &= ~EPT_LARGE_PAGE;
76869c531c8SPeter Feiner 
76969c531c8SPeter Feiner 	gpa = pte & EPT_ADDR_MASK;
77069c531c8SPeter Feiner 	for (i = 0; i < EPT_PGDIR_ENTRIES; i++) {
77169c531c8SPeter Feiner 		new_pt[i] = prototype | gpa;
77269c531c8SPeter Feiner 		gpa += 1ul << EPT_LEVEL_SHIFT(level - 1);
77369c531c8SPeter Feiner 	}
77469c531c8SPeter Feiner 
77569c531c8SPeter Feiner 	pte &= ~EPT_LARGE_PAGE;
77669c531c8SPeter Feiner 	pte &= ~EPT_ADDR_MASK;
77769c531c8SPeter Feiner 	pte |= virt_to_phys(new_pt);
77869c531c8SPeter Feiner 
77969c531c8SPeter Feiner 	*ptep = pte;
78069c531c8SPeter Feiner }
78169c531c8SPeter Feiner 
7826884af61SArthur Chunqi Li /* install_ept_entry : Install a page to a given level in EPT
7836884af61SArthur Chunqi Li 		@pml4 : addr of pml4 table
7846884af61SArthur Chunqi Li 		@pte_level : level of PTE to set
7856884af61SArthur Chunqi Li 		@guest_addr : physical address of guest
7866884af61SArthur Chunqi Li 		@pte : pte value to set
7876884af61SArthur Chunqi Li 		@pt_page : address of page table, NULL for a new page
7886884af61SArthur Chunqi Li  */
7896884af61SArthur Chunqi Li void install_ept_entry(unsigned long *pml4,
7906884af61SArthur Chunqi Li 		int pte_level,
7916884af61SArthur Chunqi Li 		unsigned long guest_addr,
7926884af61SArthur Chunqi Li 		unsigned long pte,
7936884af61SArthur Chunqi Li 		unsigned long *pt_page)
7946884af61SArthur Chunqi Li {
7956884af61SArthur Chunqi Li 	int level;
7966884af61SArthur Chunqi Li 	unsigned long *pt = pml4;
7976884af61SArthur Chunqi Li 	unsigned offset;
7986884af61SArthur Chunqi Li 
799dff740c0SPeter Feiner 	/* EPT only uses 48 bits of GPA. */
800dff740c0SPeter Feiner 	assert(guest_addr < (1ul << 48));
801dff740c0SPeter Feiner 
8026884af61SArthur Chunqi Li 	for (level = EPT_PAGE_LEVEL; level > pte_level; --level) {
803a969e087SPeter Feiner 		offset = (guest_addr >> EPT_LEVEL_SHIFT(level))
8046884af61SArthur Chunqi Li 				& EPT_PGDIR_MASK;
8056884af61SArthur Chunqi Li 		if (!(pt[offset] & (EPT_PRESENT))) {
8066884af61SArthur Chunqi Li 			unsigned long *new_pt = pt_page;
8076884af61SArthur Chunqi Li 			if (!new_pt)
8086884af61SArthur Chunqi Li 				new_pt = alloc_page();
8096884af61SArthur Chunqi Li 			else
8106884af61SArthur Chunqi Li 				pt_page = 0;
8116884af61SArthur Chunqi Li 			memset(new_pt, 0, PAGE_SIZE);
8126884af61SArthur Chunqi Li 			pt[offset] = virt_to_phys(new_pt)
8136884af61SArthur Chunqi Li 					| EPT_RA | EPT_WA | EPT_EA;
81469c531c8SPeter Feiner 		} else if (pt[offset] & EPT_LARGE_PAGE)
81569c531c8SPeter Feiner 			split_large_ept_entry(&pt[offset], level);
81600b5c590SPeter Feiner 		pt = phys_to_virt(pt[offset] & EPT_ADDR_MASK);
8176884af61SArthur Chunqi Li 	}
818a969e087SPeter Feiner 	offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) & EPT_PGDIR_MASK;
8196884af61SArthur Chunqi Li 	pt[offset] = pte;
8206884af61SArthur Chunqi Li }
8216884af61SArthur Chunqi Li 
8226884af61SArthur Chunqi Li /* Map a page, @perm is the permission of the page */
8236884af61SArthur Chunqi Li void install_ept(unsigned long *pml4,
8246884af61SArthur Chunqi Li 		unsigned long phys,
8256884af61SArthur Chunqi Li 		unsigned long guest_addr,
8266884af61SArthur Chunqi Li 		u64 perm)
8276884af61SArthur Chunqi Li {
8286884af61SArthur Chunqi Li 	install_ept_entry(pml4, 1, guest_addr, (phys & PAGE_MASK) | perm, 0);
8296884af61SArthur Chunqi Li }
8306884af61SArthur Chunqi Li 
8316884af61SArthur Chunqi Li /* Map a 1G-size page */
8326884af61SArthur Chunqi Li void install_1g_ept(unsigned long *pml4,
8336884af61SArthur Chunqi Li 		unsigned long phys,
8346884af61SArthur Chunqi Li 		unsigned long guest_addr,
8356884af61SArthur Chunqi Li 		u64 perm)
8366884af61SArthur Chunqi Li {
8376884af61SArthur Chunqi Li 	install_ept_entry(pml4, 3, guest_addr,
8386884af61SArthur Chunqi Li 			(phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0);
8396884af61SArthur Chunqi Li }
8406884af61SArthur Chunqi Li 
8416884af61SArthur Chunqi Li /* Map a 2M-size page */
8426884af61SArthur Chunqi Li void install_2m_ept(unsigned long *pml4,
8436884af61SArthur Chunqi Li 		unsigned long phys,
8446884af61SArthur Chunqi Li 		unsigned long guest_addr,
8456884af61SArthur Chunqi Li 		u64 perm)
8466884af61SArthur Chunqi Li {
8476884af61SArthur Chunqi Li 	install_ept_entry(pml4, 2, guest_addr,
8486884af61SArthur Chunqi Li 			(phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0);
8496884af61SArthur Chunqi Li }
8506884af61SArthur Chunqi Li 
8516884af61SArthur Chunqi Li /* setup_ept_range : Setup a range of 1:1 mapped page to EPT paging structure.
8526884af61SArthur Chunqi Li 		@start : start address of guest page
8536884af61SArthur Chunqi Li 		@len : length of address to be mapped
8546884af61SArthur Chunqi Li 		@map_1g : whether 1G page map is used
8556884af61SArthur Chunqi Li 		@map_2m : whether 2M page map is used
8566884af61SArthur Chunqi Li 		@perm : permission for every page
8576884af61SArthur Chunqi Li  */
858b947e241SJan Kiszka void setup_ept_range(unsigned long *pml4, unsigned long start,
8596884af61SArthur Chunqi Li 		     unsigned long len, int map_1g, int map_2m, u64 perm)
8606884af61SArthur Chunqi Li {
8616884af61SArthur Chunqi Li 	u64 phys = start;
8626884af61SArthur Chunqi Li 	u64 max = (u64)len + (u64)start;
8636884af61SArthur Chunqi Li 
8646884af61SArthur Chunqi Li 	if (map_1g) {
8656884af61SArthur Chunqi Li 		while (phys + PAGE_SIZE_1G <= max) {
8666884af61SArthur Chunqi Li 			install_1g_ept(pml4, phys, phys, perm);
8676884af61SArthur Chunqi Li 			phys += PAGE_SIZE_1G;
8686884af61SArthur Chunqi Li 		}
8696884af61SArthur Chunqi Li 	}
8706884af61SArthur Chunqi Li 	if (map_2m) {
8716884af61SArthur Chunqi Li 		while (phys + PAGE_SIZE_2M <= max) {
8726884af61SArthur Chunqi Li 			install_2m_ept(pml4, phys, phys, perm);
8736884af61SArthur Chunqi Li 			phys += PAGE_SIZE_2M;
8746884af61SArthur Chunqi Li 		}
8756884af61SArthur Chunqi Li 	}
8766884af61SArthur Chunqi Li 	while (phys + PAGE_SIZE <= max) {
8776884af61SArthur Chunqi Li 		install_ept(pml4, phys, phys, perm);
8786884af61SArthur Chunqi Li 		phys += PAGE_SIZE;
8796884af61SArthur Chunqi Li 	}
8806884af61SArthur Chunqi Li }
8816884af61SArthur Chunqi Li 
8826884af61SArthur Chunqi Li /* get_ept_pte : Get the PTE of a given level in EPT,
8836884af61SArthur Chunqi Li     @level == 1 means get the latest level*/
884b4a405c3SRadim Krčmář bool get_ept_pte(unsigned long *pml4, unsigned long guest_addr, int level,
885b4a405c3SRadim Krčmář 		unsigned long *pte)
8866884af61SArthur Chunqi Li {
8876884af61SArthur Chunqi Li 	int l;
888b4a405c3SRadim Krčmář 	unsigned long *pt = pml4, iter_pte;
8896884af61SArthur Chunqi Li 	unsigned offset;
8906884af61SArthur Chunqi Li 
891dff740c0SPeter Feiner 	assert(level >= 1 && level <= 4);
892dff740c0SPeter Feiner 
8932ca6f1f3SPaolo Bonzini 	for (l = EPT_PAGE_LEVEL; ; --l) {
894a969e087SPeter Feiner 		offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
895b4a405c3SRadim Krčmář 		iter_pte = pt[offset];
8966884af61SArthur Chunqi Li 		if (l == level)
8972ca6f1f3SPaolo Bonzini 			break;
898b4a405c3SRadim Krčmář 		if (l < 4 && (iter_pte & EPT_LARGE_PAGE))
899b4a405c3SRadim Krčmář 			return false;
9008922f1fbSRadim Krčmář 		if (!(iter_pte & (EPT_PRESENT)))
9018922f1fbSRadim Krčmář 			return false;
902b4a405c3SRadim Krčmář 		pt = (unsigned long *)(iter_pte & EPT_ADDR_MASK);
9036884af61SArthur Chunqi Li 	}
904a969e087SPeter Feiner 	offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
905b4a405c3SRadim Krčmář 	if (pte)
906b4a405c3SRadim Krčmář 		*pte = pt[offset];
907b4a405c3SRadim Krčmář 	return true;
9086884af61SArthur Chunqi Li }
9096884af61SArthur Chunqi Li 
910521820dbSPaolo Bonzini static void clear_ept_ad_pte(unsigned long *pml4, unsigned long guest_addr)
911521820dbSPaolo Bonzini {
912521820dbSPaolo Bonzini 	int l;
913521820dbSPaolo Bonzini 	unsigned long *pt = pml4;
914521820dbSPaolo Bonzini 	u64 pte;
915521820dbSPaolo Bonzini 	unsigned offset;
916521820dbSPaolo Bonzini 
917521820dbSPaolo Bonzini 	for (l = EPT_PAGE_LEVEL; ; --l) {
918521820dbSPaolo Bonzini 		offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
919521820dbSPaolo Bonzini 		pt[offset] &= ~(EPT_ACCESS_FLAG|EPT_DIRTY_FLAG);
920521820dbSPaolo Bonzini 		pte = pt[offset];
921521820dbSPaolo Bonzini 		if (l == 1 || (l < 4 && (pte & EPT_LARGE_PAGE)))
922521820dbSPaolo Bonzini 			break;
923521820dbSPaolo Bonzini 		pt = (unsigned long *)(pte & EPT_ADDR_MASK);
924521820dbSPaolo Bonzini 	}
925521820dbSPaolo Bonzini }
926521820dbSPaolo Bonzini 
927521820dbSPaolo Bonzini /* clear_ept_ad : Clear EPT A/D bits for the page table walk and the
928521820dbSPaolo Bonzini    final GPA of a guest address.  */
929521820dbSPaolo Bonzini void clear_ept_ad(unsigned long *pml4, u64 guest_cr3,
930521820dbSPaolo Bonzini 		  unsigned long guest_addr)
931521820dbSPaolo Bonzini {
932521820dbSPaolo Bonzini 	int l;
933521820dbSPaolo Bonzini 	unsigned long *pt = (unsigned long *)guest_cr3, gpa;
934521820dbSPaolo Bonzini 	u64 pte, offset_in_page;
935521820dbSPaolo Bonzini 	unsigned offset;
936521820dbSPaolo Bonzini 
937521820dbSPaolo Bonzini 	for (l = EPT_PAGE_LEVEL; ; --l) {
938521820dbSPaolo Bonzini 		offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
939521820dbSPaolo Bonzini 
940521820dbSPaolo Bonzini 		clear_ept_ad_pte(pml4, (u64) &pt[offset]);
941521820dbSPaolo Bonzini 		pte = pt[offset];
942521820dbSPaolo Bonzini 		if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK)))
943521820dbSPaolo Bonzini 			break;
944521820dbSPaolo Bonzini 		if (!(pte & PT_PRESENT_MASK))
945521820dbSPaolo Bonzini 			return;
946521820dbSPaolo Bonzini 		pt = (unsigned long *)(pte & PT_ADDR_MASK);
947521820dbSPaolo Bonzini 	}
948521820dbSPaolo Bonzini 
949521820dbSPaolo Bonzini 	offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
950521820dbSPaolo Bonzini 	offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1);
951521820dbSPaolo Bonzini 	gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page);
952521820dbSPaolo Bonzini 	clear_ept_ad_pte(pml4, gpa);
953521820dbSPaolo Bonzini }
954521820dbSPaolo Bonzini 
955521820dbSPaolo Bonzini /* check_ept_ad : Check the content of EPT A/D bits for the page table
956521820dbSPaolo Bonzini    walk and the final GPA of a guest address.  */
957521820dbSPaolo Bonzini void check_ept_ad(unsigned long *pml4, u64 guest_cr3,
958521820dbSPaolo Bonzini 		  unsigned long guest_addr, int expected_gpa_ad,
959521820dbSPaolo Bonzini 		  int expected_pt_ad)
960521820dbSPaolo Bonzini {
961521820dbSPaolo Bonzini 	int l;
962521820dbSPaolo Bonzini 	unsigned long *pt = (unsigned long *)guest_cr3, gpa;
963521820dbSPaolo Bonzini 	u64 ept_pte, pte, offset_in_page;
964521820dbSPaolo Bonzini 	unsigned offset;
965521820dbSPaolo Bonzini 	bool bad_pt_ad = false;
966521820dbSPaolo Bonzini 
967521820dbSPaolo Bonzini 	for (l = EPT_PAGE_LEVEL; ; --l) {
968521820dbSPaolo Bonzini 		offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
969521820dbSPaolo Bonzini 
970b4a405c3SRadim Krčmář 		if (!get_ept_pte(pml4, (u64) &pt[offset], 1, &ept_pte)) {
971b4a405c3SRadim Krčmář 			printf("EPT - guest level %d page table is not mapped.\n", l);
972521820dbSPaolo Bonzini 			return;
973b4a405c3SRadim Krčmář 		}
974521820dbSPaolo Bonzini 
975521820dbSPaolo Bonzini 		if (!bad_pt_ad) {
976521820dbSPaolo Bonzini 			bad_pt_ad |= (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) != expected_pt_ad;
977521820dbSPaolo Bonzini 			if (bad_pt_ad)
978a299895bSThomas Huth 				report(false,
979a299895bSThomas Huth 				       "EPT - guest level %d page table A=%d/D=%d",
980a299895bSThomas Huth 				       l,
981521820dbSPaolo Bonzini 				       !!(expected_pt_ad & EPT_ACCESS_FLAG),
982521820dbSPaolo Bonzini 				       !!(expected_pt_ad & EPT_DIRTY_FLAG));
983521820dbSPaolo Bonzini 		}
984521820dbSPaolo Bonzini 
985521820dbSPaolo Bonzini 		pte = pt[offset];
986521820dbSPaolo Bonzini 		if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK)))
987521820dbSPaolo Bonzini 			break;
988521820dbSPaolo Bonzini 		if (!(pte & PT_PRESENT_MASK))
989521820dbSPaolo Bonzini 			return;
990521820dbSPaolo Bonzini 		pt = (unsigned long *)(pte & PT_ADDR_MASK);
991521820dbSPaolo Bonzini 	}
992521820dbSPaolo Bonzini 
993521820dbSPaolo Bonzini 	if (!bad_pt_ad)
994a299895bSThomas Huth 		report(true, "EPT - guest page table structures A=%d/D=%d",
995521820dbSPaolo Bonzini 		       !!(expected_pt_ad & EPT_ACCESS_FLAG),
996521820dbSPaolo Bonzini 		       !!(expected_pt_ad & EPT_DIRTY_FLAG));
997521820dbSPaolo Bonzini 
998521820dbSPaolo Bonzini 	offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
999521820dbSPaolo Bonzini 	offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1);
1000521820dbSPaolo Bonzini 	gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page);
1001521820dbSPaolo Bonzini 
1002b4a405c3SRadim Krčmář 	if (!get_ept_pte(pml4, gpa, 1, &ept_pte)) {
1003a299895bSThomas Huth 		report(false, "EPT - guest physical address is not mapped");
1004b4a405c3SRadim Krčmář 		return;
1005b4a405c3SRadim Krčmář 	}
1006a299895bSThomas Huth 	report((ept_pte & (EPT_ACCESS_FLAG | EPT_DIRTY_FLAG)) == expected_gpa_ad,
1007a299895bSThomas Huth 	       "EPT - guest physical address A=%d/D=%d",
1008521820dbSPaolo Bonzini 	       !!(expected_gpa_ad & EPT_ACCESS_FLAG),
1009521820dbSPaolo Bonzini 	       !!(expected_gpa_ad & EPT_DIRTY_FLAG));
1010521820dbSPaolo Bonzini }
1011521820dbSPaolo Bonzini 
1012521820dbSPaolo Bonzini 
10132f888fccSBandan Das void ept_sync(int type, u64 eptp)
10142f888fccSBandan Das {
10152f888fccSBandan Das 	switch (type) {
10162f888fccSBandan Das 	case INVEPT_SINGLE:
10172f888fccSBandan Das 		if (ept_vpid.val & EPT_CAP_INVEPT_SINGLE) {
10182f888fccSBandan Das 			invept(INVEPT_SINGLE, eptp);
10192f888fccSBandan Das 			break;
10202f888fccSBandan Das 		}
10212f888fccSBandan Das 		/* else fall through */
10222f888fccSBandan Das 	case INVEPT_GLOBAL:
10232f888fccSBandan Das 		if (ept_vpid.val & EPT_CAP_INVEPT_ALL) {
10242f888fccSBandan Das 			invept(INVEPT_GLOBAL, eptp);
10252f888fccSBandan Das 			break;
10262f888fccSBandan Das 		}
10272f888fccSBandan Das 		/* else fall through */
10282f888fccSBandan Das 	default:
10292f888fccSBandan Das 		printf("WARNING: invept is not supported!\n");
10302f888fccSBandan Das 	}
10312f888fccSBandan Das }
10322f888fccSBandan Das 
1033dff740c0SPeter Feiner void set_ept_pte(unsigned long *pml4, unsigned long guest_addr,
10346884af61SArthur Chunqi Li 		 int level, u64 pte_val)
10356884af61SArthur Chunqi Li {
10366884af61SArthur Chunqi Li 	int l;
10376884af61SArthur Chunqi Li 	unsigned long *pt = pml4;
10386884af61SArthur Chunqi Li 	unsigned offset;
10396884af61SArthur Chunqi Li 
1040dff740c0SPeter Feiner 	assert(level >= 1 && level <= 4);
1041dff740c0SPeter Feiner 
10422ca6f1f3SPaolo Bonzini 	for (l = EPT_PAGE_LEVEL; ; --l) {
1043a969e087SPeter Feiner 		offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
10442ca6f1f3SPaolo Bonzini 		if (l == level)
10452ca6f1f3SPaolo Bonzini 			break;
1046dff740c0SPeter Feiner 		assert(pt[offset] & EPT_PRESENT);
104700b5c590SPeter Feiner 		pt = (unsigned long *)(pt[offset] & EPT_ADDR_MASK);
10486884af61SArthur Chunqi Li 	}
1049a969e087SPeter Feiner 	offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
10506884af61SArthur Chunqi Li 	pt[offset] = pte_val;
10516884af61SArthur Chunqi Li }
10526884af61SArthur Chunqi Li 
10538ab53b95SPeter Feiner bool ept_2m_supported(void)
10548ab53b95SPeter Feiner {
10558ab53b95SPeter Feiner 	return ept_vpid.val & EPT_CAP_2M_PAGE;
10568ab53b95SPeter Feiner }
10578ab53b95SPeter Feiner 
10588ab53b95SPeter Feiner bool ept_1g_supported(void)
10598ab53b95SPeter Feiner {
10608ab53b95SPeter Feiner 	return ept_vpid.val & EPT_CAP_1G_PAGE;
10618ab53b95SPeter Feiner }
10628ab53b95SPeter Feiner 
10638ab53b95SPeter Feiner bool ept_huge_pages_supported(int level)
10648ab53b95SPeter Feiner {
10658ab53b95SPeter Feiner 	if (level == 2)
10668ab53b95SPeter Feiner 		return ept_2m_supported();
10678ab53b95SPeter Feiner 	else if (level == 3)
10688ab53b95SPeter Feiner 		return ept_1g_supported();
10698ab53b95SPeter Feiner 	else
10708ab53b95SPeter Feiner 		return false;
10718ab53b95SPeter Feiner }
10728ab53b95SPeter Feiner 
10738ab53b95SPeter Feiner bool ept_execute_only_supported(void)
10748ab53b95SPeter Feiner {
10758ab53b95SPeter Feiner 	return ept_vpid.val & EPT_CAP_WT;
10768ab53b95SPeter Feiner }
10778ab53b95SPeter Feiner 
10788ab53b95SPeter Feiner bool ept_ad_bits_supported(void)
10798ab53b95SPeter Feiner {
10808ab53b95SPeter Feiner 	return ept_vpid.val & EPT_CAP_AD_FLAG;
10818ab53b95SPeter Feiner }
10828ab53b95SPeter Feiner 
1083b093c6ceSWanpeng Li void vpid_sync(int type, u16 vpid)
1084b093c6ceSWanpeng Li {
1085b093c6ceSWanpeng Li 	switch(type) {
1086aedfd771SJim Mattson 	case INVVPID_CONTEXT_GLOBAL:
1087aedfd771SJim Mattson 		if (ept_vpid.val & VPID_CAP_INVVPID_CXTGLB) {
1088aedfd771SJim Mattson 			invvpid(INVVPID_CONTEXT_GLOBAL, vpid, 0);
1089b093c6ceSWanpeng Li 			break;
1090b093c6ceSWanpeng Li 		}
1091b093c6ceSWanpeng Li 	case INVVPID_ALL:
1092b093c6ceSWanpeng Li 		if (ept_vpid.val & VPID_CAP_INVVPID_ALL) {
1093b093c6ceSWanpeng Li 			invvpid(INVVPID_ALL, vpid, 0);
1094b093c6ceSWanpeng Li 			break;
1095b093c6ceSWanpeng Li 		}
1096b093c6ceSWanpeng Li 	default:
1097b093c6ceSWanpeng Li 		printf("WARNING: invvpid is not supported\n");
1098b093c6ceSWanpeng Li 	}
1099b093c6ceSWanpeng Li }
11006884af61SArthur Chunqi Li 
11019d7eaa29SArthur Chunqi Li static void init_vmcs_ctrl(void)
11029d7eaa29SArthur Chunqi Li {
11039d7eaa29SArthur Chunqi Li 	/* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */
11049d7eaa29SArthur Chunqi Li 	/* 26.2.1.1 */
11059d7eaa29SArthur Chunqi Li 	vmcs_write(PIN_CONTROLS, ctrl_pin);
11069d7eaa29SArthur Chunqi Li 	/* Disable VMEXIT of IO instruction */
11079d7eaa29SArthur Chunqi Li 	vmcs_write(CPU_EXEC_CTRL0, ctrl_cpu[0]);
11089d7eaa29SArthur Chunqi Li 	if (ctrl_cpu_rev[0].set & CPU_SECONDARY) {
11096884af61SArthur Chunqi Li 		ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) &
11106884af61SArthur Chunqi Li 			ctrl_cpu_rev[1].clr;
11119d7eaa29SArthur Chunqi Li 		vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu[1]);
11129d7eaa29SArthur Chunqi Li 	}
11139d7eaa29SArthur Chunqi Li 	vmcs_write(CR3_TARGET_COUNT, 0);
11149d7eaa29SArthur Chunqi Li 	vmcs_write(VPID, ++vpid_cnt);
11159d7eaa29SArthur Chunqi Li }
11169d7eaa29SArthur Chunqi Li 
11179d7eaa29SArthur Chunqi Li static void init_vmcs_host(void)
11189d7eaa29SArthur Chunqi Li {
11199d7eaa29SArthur Chunqi Li 	/* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */
11209d7eaa29SArthur Chunqi Li 	/* 26.2.1.2 */
11219d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_EFER, rdmsr(MSR_EFER));
11229d7eaa29SArthur Chunqi Li 
11239d7eaa29SArthur Chunqi Li 	/* 26.2.1.3 */
11249d7eaa29SArthur Chunqi Li 	vmcs_write(ENT_CONTROLS, ctrl_enter);
11259d7eaa29SArthur Chunqi Li 	vmcs_write(EXI_CONTROLS, ctrl_exit);
11269d7eaa29SArthur Chunqi Li 
11279d7eaa29SArthur Chunqi Li 	/* 26.2.2 */
11289d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_CR0, read_cr0());
11299d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_CR3, read_cr3());
11309d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_CR4, read_cr4());
11319d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_SYSENTER_EIP, (u64)(&entry_sysenter));
113269d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SYSENTER_CS,  KERNEL_CS);
11339d7eaa29SArthur Chunqi Li 
11349d7eaa29SArthur Chunqi Li 	/* 26.2.3 */
113569d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SEL_CS, KERNEL_CS);
113669d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SEL_SS, KERNEL_DS);
113769d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SEL_DS, KERNEL_DS);
113869d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SEL_ES, KERNEL_DS);
113969d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SEL_FS, KERNEL_DS);
114069d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SEL_GS, KERNEL_DS);
114169d8fe0eSPaolo Bonzini 	vmcs_write(HOST_SEL_TR, TSS_MAIN);
1142337166aaSJan Kiszka 	vmcs_write(HOST_BASE_TR, tss_descr.base);
1143337166aaSJan Kiszka 	vmcs_write(HOST_BASE_GDTR, gdt64_desc.base);
1144337166aaSJan Kiszka 	vmcs_write(HOST_BASE_IDTR, idt_descr.base);
11459d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_BASE_FS, 0);
11469d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_BASE_GS, 0);
11479d7eaa29SArthur Chunqi Li 
11489d7eaa29SArthur Chunqi Li 	/* Set other vmcs area */
11499d7eaa29SArthur Chunqi Li 	vmcs_write(PF_ERROR_MASK, 0);
11509d7eaa29SArthur Chunqi Li 	vmcs_write(PF_ERROR_MATCH, 0);
11519d7eaa29SArthur Chunqi Li 	vmcs_write(VMCS_LINK_PTR, ~0ul);
11529d7eaa29SArthur Chunqi Li 	vmcs_write(VMCS_LINK_PTR_HI, ~0ul);
11539d7eaa29SArthur Chunqi Li 	vmcs_write(HOST_RIP, (u64)(&vmx_return));
11549d7eaa29SArthur Chunqi Li }
11559d7eaa29SArthur Chunqi Li 
11569d7eaa29SArthur Chunqi Li static void init_vmcs_guest(void)
11579d7eaa29SArthur Chunqi Li {
11589d7eaa29SArthur Chunqi Li 	/* 26.3 CHECKING AND LOADING GUEST STATE */
11599d7eaa29SArthur Chunqi Li 	ulong guest_cr0, guest_cr4, guest_cr3;
11609d7eaa29SArthur Chunqi Li 	/* 26.3.1.1 */
11619d7eaa29SArthur Chunqi Li 	guest_cr0 = read_cr0();
11629d7eaa29SArthur Chunqi Li 	guest_cr4 = read_cr4();
11639d7eaa29SArthur Chunqi Li 	guest_cr3 = read_cr3();
11649d7eaa29SArthur Chunqi Li 	if (ctrl_enter & ENT_GUEST_64) {
11659d7eaa29SArthur Chunqi Li 		guest_cr0 |= X86_CR0_PG;
11669d7eaa29SArthur Chunqi Li 		guest_cr4 |= X86_CR4_PAE;
11679d7eaa29SArthur Chunqi Li 	}
11689d7eaa29SArthur Chunqi Li 	if ((ctrl_enter & ENT_GUEST_64) == 0)
11699d7eaa29SArthur Chunqi Li 		guest_cr4 &= (~X86_CR4_PCIDE);
11709d7eaa29SArthur Chunqi Li 	if (guest_cr0 & X86_CR0_PG)
11719d7eaa29SArthur Chunqi Li 		guest_cr0 |= X86_CR0_PE;
11729d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_CR0, guest_cr0);
11739d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_CR3, guest_cr3);
11749d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_CR4, guest_cr4);
117569d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SYSENTER_CS,  KERNEL_CS);
11769d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_SYSENTER_ESP,
11779d7eaa29SArthur Chunqi Li 		(u64)(guest_syscall_stack + PAGE_SIZE - 1));
11789d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_SYSENTER_EIP, (u64)(&entry_sysenter));
11799d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_DR7, 0);
11809d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_EFER, rdmsr(MSR_EFER));
11819d7eaa29SArthur Chunqi Li 
11829d7eaa29SArthur Chunqi Li 	/* 26.3.1.2 */
118369d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SEL_CS, KERNEL_CS);
118469d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SEL_SS, KERNEL_DS);
118569d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SEL_DS, KERNEL_DS);
118669d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SEL_ES, KERNEL_DS);
118769d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SEL_FS, KERNEL_DS);
118869d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SEL_GS, KERNEL_DS);
118969d8fe0eSPaolo Bonzini 	vmcs_write(GUEST_SEL_TR, TSS_MAIN);
11909d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_SEL_LDTR, 0);
11919d7eaa29SArthur Chunqi Li 
11929d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_BASE_CS, 0);
11939d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_BASE_ES, 0);
11949d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_BASE_SS, 0);
11959d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_BASE_DS, 0);
11969d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_BASE_FS, 0);
11979d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_BASE_GS, 0);
1198337166aaSJan Kiszka 	vmcs_write(GUEST_BASE_TR, tss_descr.base);
11999d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_BASE_LDTR, 0);
12009d7eaa29SArthur Chunqi Li 
12019d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_LIMIT_CS, 0xFFFFFFFF);
12029d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_LIMIT_DS, 0xFFFFFFFF);
12039d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_LIMIT_ES, 0xFFFFFFFF);
12049d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_LIMIT_SS, 0xFFFFFFFF);
12059d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_LIMIT_FS, 0xFFFFFFFF);
12069d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_LIMIT_GS, 0xFFFFFFFF);
12079d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_LIMIT_LDTR, 0xffff);
1208337166aaSJan Kiszka 	vmcs_write(GUEST_LIMIT_TR, tss_descr.limit);
12099d7eaa29SArthur Chunqi Li 
12109d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_CS, 0xa09b);
12119d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_DS, 0xc093);
12129d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_ES, 0xc093);
12139d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_FS, 0xc093);
12149d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_GS, 0xc093);
12159d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_SS, 0xc093);
12169d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_LDTR, 0x82);
12179d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_AR_TR, 0x8b);
12189d7eaa29SArthur Chunqi Li 
12199d7eaa29SArthur Chunqi Li 	/* 26.3.1.3 */
1220337166aaSJan Kiszka 	vmcs_write(GUEST_BASE_GDTR, gdt64_desc.base);
1221337166aaSJan Kiszka 	vmcs_write(GUEST_BASE_IDTR, idt_descr.base);
1222337166aaSJan Kiszka 	vmcs_write(GUEST_LIMIT_GDTR, gdt64_desc.limit);
1223337166aaSJan Kiszka 	vmcs_write(GUEST_LIMIT_IDTR, idt_descr.limit);
12249d7eaa29SArthur Chunqi Li 
12259d7eaa29SArthur Chunqi Li 	/* 26.3.1.4 */
12269d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_RIP, (u64)(&guest_entry));
12279d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_RSP, (u64)(guest_stack + PAGE_SIZE - 1));
1228a12e1d61SKrish Sadhukhan 	vmcs_write(GUEST_RFLAGS, X86_EFLAGS_FIXED);
12299d7eaa29SArthur Chunqi Li 
12309d7eaa29SArthur Chunqi Li 	/* 26.3.1.5 */
123117ba0dd0SJan Kiszka 	vmcs_write(GUEST_ACTV_STATE, ACTV_ACTIVE);
12329d7eaa29SArthur Chunqi Li 	vmcs_write(GUEST_INTR_STATE, 0);
12339d7eaa29SArthur Chunqi Li }
12349d7eaa29SArthur Chunqi Li 
12359d7eaa29SArthur Chunqi Li static int init_vmcs(struct vmcs **vmcs)
12369d7eaa29SArthur Chunqi Li {
12379d7eaa29SArthur Chunqi Li 	*vmcs = alloc_page();
12386c0ba6e7SLiran Alon 	(*vmcs)->hdr.revision_id = basic.revision;
12399d7eaa29SArthur Chunqi Li 	/* vmclear first to init vmcs */
12409d7eaa29SArthur Chunqi Li 	if (vmcs_clear(*vmcs)) {
12419d7eaa29SArthur Chunqi Li 		printf("%s : vmcs_clear error\n", __func__);
12429d7eaa29SArthur Chunqi Li 		return 1;
12439d7eaa29SArthur Chunqi Li 	}
12449d7eaa29SArthur Chunqi Li 
12459d7eaa29SArthur Chunqi Li 	if (make_vmcs_current(*vmcs)) {
12469d7eaa29SArthur Chunqi Li 		printf("%s : make_vmcs_current error\n", __func__);
12479d7eaa29SArthur Chunqi Li 		return 1;
12489d7eaa29SArthur Chunqi Li 	}
12499d7eaa29SArthur Chunqi Li 
12509d7eaa29SArthur Chunqi Li 	/* All settings to pin/exit/enter/cpu
12519d7eaa29SArthur Chunqi Li 	   control fields should be placed here */
12529d7eaa29SArthur Chunqi Li 	ctrl_pin |= PIN_EXTINT | PIN_NMI | PIN_VIRT_NMI;
12539d7eaa29SArthur Chunqi Li 	ctrl_exit = EXI_LOAD_EFER | EXI_HOST_64;
12549d7eaa29SArthur Chunqi Li 	ctrl_enter = (ENT_LOAD_EFER | ENT_GUEST_64);
12559d7eaa29SArthur Chunqi Li 	/* DIsable IO instruction VMEXIT now */
12569d7eaa29SArthur Chunqi Li 	ctrl_cpu[0] &= (~(CPU_IO | CPU_IO_BITMAP));
12579d7eaa29SArthur Chunqi Li 	ctrl_cpu[1] = 0;
12589d7eaa29SArthur Chunqi Li 
12599d7eaa29SArthur Chunqi Li 	ctrl_pin = (ctrl_pin | ctrl_pin_rev.set) & ctrl_pin_rev.clr;
12609d7eaa29SArthur Chunqi Li 	ctrl_enter = (ctrl_enter | ctrl_enter_rev.set) & ctrl_enter_rev.clr;
12619d7eaa29SArthur Chunqi Li 	ctrl_exit = (ctrl_exit | ctrl_exit_rev.set) & ctrl_exit_rev.clr;
12629d7eaa29SArthur Chunqi Li 	ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr;
12639d7eaa29SArthur Chunqi Li 
12649d7eaa29SArthur Chunqi Li 	init_vmcs_ctrl();
12659d7eaa29SArthur Chunqi Li 	init_vmcs_host();
12669d7eaa29SArthur Chunqi Li 	init_vmcs_guest();
12679d7eaa29SArthur Chunqi Li 	return 0;
12689d7eaa29SArthur Chunqi Li }
12699d7eaa29SArthur Chunqi Li 
1270883f3fccSLiran Alon void enable_vmx(void)
1271883f3fccSLiran Alon {
1272883f3fccSLiran Alon 	bool vmx_enabled =
1273883f3fccSLiran Alon 		rdmsr(MSR_IA32_FEATURE_CONTROL) &
1274883f3fccSLiran Alon 		FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
1275883f3fccSLiran Alon 
1276883f3fccSLiran Alon 	if (!vmx_enabled) {
1277883f3fccSLiran Alon 		wrmsr(MSR_IA32_FEATURE_CONTROL,
1278883f3fccSLiran Alon 				FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX |
1279883f3fccSLiran Alon 				FEATURE_CONTROL_LOCKED);
1280883f3fccSLiran Alon 	}
1281883f3fccSLiran Alon }
1282883f3fccSLiran Alon 
1283e836e27cSLiran Alon static void init_vmx_caps(void)
12849d7eaa29SArthur Chunqi Li {
12859d7eaa29SArthur Chunqi Li 	basic.val = rdmsr(MSR_IA32_VMX_BASIC);
12869d7eaa29SArthur Chunqi Li 	ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PIN
12879d7eaa29SArthur Chunqi Li 			: MSR_IA32_VMX_PINBASED_CTLS);
12889d7eaa29SArthur Chunqi Li 	ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT
12899d7eaa29SArthur Chunqi Li 			: MSR_IA32_VMX_EXIT_CTLS);
12909d7eaa29SArthur Chunqi Li 	ctrl_enter_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_ENTRY
12919d7eaa29SArthur Chunqi Li 			: MSR_IA32_VMX_ENTRY_CTLS);
12929d7eaa29SArthur Chunqi Li 	ctrl_cpu_rev[0].val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PROC
12939d7eaa29SArthur Chunqi Li 			: MSR_IA32_VMX_PROCBASED_CTLS);
12946884af61SArthur Chunqi Li 	if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0)
12959d7eaa29SArthur Chunqi Li 		ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2);
12966884af61SArthur Chunqi Li 	else
12976884af61SArthur Chunqi Li 		ctrl_cpu_rev[1].val = 0;
12986884af61SArthur Chunqi Li 	if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0)
12999d7eaa29SArthur Chunqi Li 		ept_vpid.val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP);
13006884af61SArthur Chunqi Li 	else
13016884af61SArthur Chunqi Li 		ept_vpid.val = 0;
1302e836e27cSLiran Alon }
1303e836e27cSLiran Alon 
13044f18f5deSLiran Alon void init_vmx(u64 *vmxon_region)
1305e836e27cSLiran Alon {
1306e836e27cSLiran Alon 	ulong fix_cr0_set, fix_cr0_clr;
1307e836e27cSLiran Alon 	ulong fix_cr4_set, fix_cr4_clr;
1308e836e27cSLiran Alon 
1309e836e27cSLiran Alon 	fix_cr0_set =  rdmsr(MSR_IA32_VMX_CR0_FIXED0);
1310e836e27cSLiran Alon 	fix_cr0_clr =  rdmsr(MSR_IA32_VMX_CR0_FIXED1);
1311e836e27cSLiran Alon 	fix_cr4_set =  rdmsr(MSR_IA32_VMX_CR4_FIXED0);
1312e836e27cSLiran Alon 	fix_cr4_clr = rdmsr(MSR_IA32_VMX_CR4_FIXED1);
1313e836e27cSLiran Alon 
13149d7eaa29SArthur Chunqi Li 	write_cr0((read_cr0() & fix_cr0_clr) | fix_cr0_set);
13159d7eaa29SArthur Chunqi Li 	write_cr4((read_cr4() & fix_cr4_clr) | fix_cr4_set | X86_CR4_VMXE);
13169d7eaa29SArthur Chunqi Li 
13179d7eaa29SArthur Chunqi Li 	*vmxon_region = basic.revision;
131893f10d6fSLiran Alon }
13199d7eaa29SArthur Chunqi Li 
132093f10d6fSLiran Alon static void alloc_bsp_vmx_pages(void)
132193f10d6fSLiran Alon {
1322c937d495SLiran Alon 	bsp_vmxon_region = alloc_page();
13239d7eaa29SArthur Chunqi Li 	guest_stack = alloc_page();
13249d7eaa29SArthur Chunqi Li 	guest_syscall_stack = alloc_page();
132593f10d6fSLiran Alon 	vmcs_root = alloc_page();
132693f10d6fSLiran Alon }
132793f10d6fSLiran Alon 
132893f10d6fSLiran Alon static void init_bsp_vmx(void)
132993f10d6fSLiran Alon {
133093f10d6fSLiran Alon 	init_vmx_caps();
133193f10d6fSLiran Alon 	alloc_bsp_vmx_pages();
1332c937d495SLiran Alon 	init_vmx(bsp_vmxon_region);
13339d7eaa29SArthur Chunqi Li }
13349d7eaa29SArthur Chunqi Li 
1335e3f363c4SJan Kiszka static void do_vmxon_off(void *data)
13369d7eaa29SArthur Chunqi Li {
13373b127446SJan Kiszka 	vmx_on();
13383b127446SJan Kiszka 	vmx_off();
133903f37ef2SPaolo Bonzini }
13403b127446SJan Kiszka 
1341e3f363c4SJan Kiszka static void do_write_feature_control(void *data)
13423b127446SJan Kiszka {
13433b127446SJan Kiszka 	wrmsr(MSR_IA32_FEATURE_CONTROL, 0);
134403f37ef2SPaolo Bonzini }
13453b127446SJan Kiszka 
13463b127446SJan Kiszka static int test_vmx_feature_control(void)
13473b127446SJan Kiszka {
13483b127446SJan Kiszka 	u64 ia32_feature_control;
13493b127446SJan Kiszka 	bool vmx_enabled;
13504e38e9dfSLiran Alon 	bool feature_control_locked;
13513b127446SJan Kiszka 
13523b127446SJan Kiszka 	ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL);
13534e38e9dfSLiran Alon 	vmx_enabled =
13544e38e9dfSLiran Alon 		ia32_feature_control & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
13554e38e9dfSLiran Alon 	feature_control_locked =
13564e38e9dfSLiran Alon 		ia32_feature_control & FEATURE_CONTROL_LOCKED;
13574e38e9dfSLiran Alon 
13584e38e9dfSLiran Alon 	if (vmx_enabled && feature_control_locked) {
13593b127446SJan Kiszka 		printf("VMX enabled and locked by BIOS\n");
13603b127446SJan Kiszka 		return 0;
13614e38e9dfSLiran Alon 	} else if (feature_control_locked) {
13623b127446SJan Kiszka 		printf("ERROR: VMX locked out by BIOS!?\n");
13633b127446SJan Kiszka 		return 1;
13643b127446SJan Kiszka 	}
13653b127446SJan Kiszka 
13663b127446SJan Kiszka 	wrmsr(MSR_IA32_FEATURE_CONTROL, 0);
1367a299895bSThomas Huth 	report(test_for_exception(GP_VECTOR, &do_vmxon_off, NULL),
1368a299895bSThomas Huth 	       "test vmxon with FEATURE_CONTROL cleared");
13693b127446SJan Kiszka 
13704e38e9dfSLiran Alon 	wrmsr(MSR_IA32_FEATURE_CONTROL, FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX);
1371a299895bSThomas Huth 	report(test_for_exception(GP_VECTOR, &do_vmxon_off, NULL),
1372a299895bSThomas Huth 	       "test vmxon without FEATURE_CONTROL lock");
13733b127446SJan Kiszka 
13744e38e9dfSLiran Alon 	wrmsr(MSR_IA32_FEATURE_CONTROL,
13754e38e9dfSLiran Alon 		  FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX |
13764e38e9dfSLiran Alon 		  FEATURE_CONTROL_LOCKED);
13774e38e9dfSLiran Alon 
13784e38e9dfSLiran Alon 	ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL);
13794e38e9dfSLiran Alon 	vmx_enabled =
13804e38e9dfSLiran Alon 		ia32_feature_control & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
1381a299895bSThomas Huth 	report(vmx_enabled, "test enable VMX in FEATURE_CONTROL");
13823b127446SJan Kiszka 
1383a299895bSThomas Huth 	report(test_for_exception(GP_VECTOR, &do_write_feature_control, NULL),
1384a299895bSThomas Huth 	       "test FEATURE_CONTROL lock bit");
13853b127446SJan Kiszka 
13863b127446SJan Kiszka 	return !vmx_enabled;
13879d7eaa29SArthur Chunqi Li }
13889d7eaa29SArthur Chunqi Li 
13899d7eaa29SArthur Chunqi Li static int test_vmxon(void)
13909d7eaa29SArthur Chunqi Li {
1391ce21d809SBandan Das 	int ret, ret1;
1392c937d495SLiran Alon 	u64 *vmxon_region;
1393e2cf1c9dSEduardo Habkost 	int width = cpuid_maxphyaddr();
13949d7eaa29SArthur Chunqi Li 
1395ce21d809SBandan Das 	/* Unaligned page access */
1396c937d495SLiran Alon 	vmxon_region = (u64 *)((intptr_t)bsp_vmxon_region + 1);
1397c937d495SLiran Alon 	ret1 = _vmx_on(vmxon_region);
1398a299895bSThomas Huth 	report(ret1, "test vmxon with unaligned vmxon region");
1399ce21d809SBandan Das 	if (!ret1) {
1400ce21d809SBandan Das 		ret = 1;
1401ce21d809SBandan Das 		goto out;
1402ce21d809SBandan Das 	}
1403ce21d809SBandan Das 
1404ce21d809SBandan Das 	/* gpa bits beyond physical address width are set*/
1405c937d495SLiran Alon 	vmxon_region = (u64 *)((intptr_t)bsp_vmxon_region | ((u64)1 << (width+1)));
1406c937d495SLiran Alon 	ret1 = _vmx_on(vmxon_region);
1407a299895bSThomas Huth 	report(ret1, "test vmxon with bits set beyond physical address width");
1408ce21d809SBandan Das 	if (!ret1) {
1409ce21d809SBandan Das 		ret = 1;
1410ce21d809SBandan Das 		goto out;
1411ce21d809SBandan Das 	}
1412ce21d809SBandan Das 
1413ce21d809SBandan Das 	/* invalid revision indentifier */
1414c937d495SLiran Alon 	*bsp_vmxon_region = 0xba9da9;
1415ce21d809SBandan Das 	ret1 = vmx_on();
1416a299895bSThomas Huth 	report(ret1, "test vmxon with invalid revision identifier");
1417ce21d809SBandan Das 	if (!ret1) {
1418ce21d809SBandan Das 		ret = 1;
1419ce21d809SBandan Das 		goto out;
1420ce21d809SBandan Das 	}
1421ce21d809SBandan Das 
1422ce21d809SBandan Das 	/* and finally a valid region */
1423c937d495SLiran Alon 	*bsp_vmxon_region = basic.revision;
14249d7eaa29SArthur Chunqi Li 	ret = vmx_on();
1425a299895bSThomas Huth 	report(!ret, "test vmxon with valid vmxon region");
1426ce21d809SBandan Das 
1427ce21d809SBandan Das out:
14289d7eaa29SArthur Chunqi Li 	return ret;
14299d7eaa29SArthur Chunqi Li }
14309d7eaa29SArthur Chunqi Li 
14319d7eaa29SArthur Chunqi Li static void test_vmptrld(void)
14329d7eaa29SArthur Chunqi Li {
1433daeec979SBandan Das 	struct vmcs *vmcs, *tmp_root;
1434e2cf1c9dSEduardo Habkost 	int width = cpuid_maxphyaddr();
14359d7eaa29SArthur Chunqi Li 
14369d7eaa29SArthur Chunqi Li 	vmcs = alloc_page();
14376c0ba6e7SLiran Alon 	vmcs->hdr.revision_id = basic.revision;
1438daeec979SBandan Das 
1439daeec979SBandan Das 	/* Unaligned page access */
1440daeec979SBandan Das 	tmp_root = (struct vmcs *)((intptr_t)vmcs + 1);
1441a299895bSThomas Huth 	report(make_vmcs_current(tmp_root) == 1,
1442a299895bSThomas Huth 	       "test vmptrld with unaligned vmcs");
1443daeec979SBandan Das 
1444daeec979SBandan Das 	/* gpa bits beyond physical address width are set*/
1445daeec979SBandan Das 	tmp_root = (struct vmcs *)((intptr_t)vmcs |
1446daeec979SBandan Das 				   ((u64)1 << (width+1)));
1447a299895bSThomas Huth 	report(make_vmcs_current(tmp_root) == 1,
1448a299895bSThomas Huth 	       "test vmptrld with vmcs address bits set beyond physical address width");
1449daeec979SBandan Das 
1450daeec979SBandan Das 	/* Pass VMXON region */
14511c90aec0SJim Mattson 	assert(!vmcs_clear(vmcs));
14521c90aec0SJim Mattson 	assert(!make_vmcs_current(vmcs));
1453c937d495SLiran Alon 	tmp_root = (struct vmcs *)bsp_vmxon_region;
1454a299895bSThomas Huth 	report(make_vmcs_current(tmp_root) == 1,
1455a299895bSThomas Huth 	       "test vmptrld with vmxon region");
1456a299895bSThomas Huth 	report(vmcs_read(VMX_INST_ERROR) == VMXERR_VMPTRLD_VMXON_POINTER,
1457a299895bSThomas Huth 	       "test vmptrld with vmxon region vm-instruction error");
1458daeec979SBandan Das 
1459a299895bSThomas Huth 	report(make_vmcs_current(vmcs) == 0,
1460a299895bSThomas Huth 	       "test vmptrld with valid vmcs region");
14619d7eaa29SArthur Chunqi Li }
14629d7eaa29SArthur Chunqi Li 
14639d7eaa29SArthur Chunqi Li static void test_vmptrst(void)
14649d7eaa29SArthur Chunqi Li {
14659d7eaa29SArthur Chunqi Li 	int ret;
14669d7eaa29SArthur Chunqi Li 	struct vmcs *vmcs1, *vmcs2;
14679d7eaa29SArthur Chunqi Li 
14689d7eaa29SArthur Chunqi Li 	vmcs1 = alloc_page();
14699d7eaa29SArthur Chunqi Li 	init_vmcs(&vmcs1);
14709d7eaa29SArthur Chunqi Li 	ret = vmcs_save(&vmcs2);
1471a299895bSThomas Huth 	report((!ret) && (vmcs1 == vmcs2), "test vmptrst");
14729d7eaa29SArthur Chunqi Li }
14739d7eaa29SArthur Chunqi Li 
147469c8d31cSJan Kiszka struct vmx_ctl_msr {
147569c8d31cSJan Kiszka 	const char *name;
147669c8d31cSJan Kiszka 	u32 index, true_index;
147769c8d31cSJan Kiszka 	u32 default1;
147869c8d31cSJan Kiszka } vmx_ctl_msr[] = {
147969c8d31cSJan Kiszka 	{ "MSR_IA32_VMX_PINBASED_CTLS", MSR_IA32_VMX_PINBASED_CTLS,
148069c8d31cSJan Kiszka 	  MSR_IA32_VMX_TRUE_PIN, 0x16 },
148169c8d31cSJan Kiszka 	{ "MSR_IA32_VMX_PROCBASED_CTLS", MSR_IA32_VMX_PROCBASED_CTLS,
148269c8d31cSJan Kiszka 	  MSR_IA32_VMX_TRUE_PROC, 0x401e172 },
148369c8d31cSJan Kiszka 	{ "MSR_IA32_VMX_PROCBASED_CTLS2", MSR_IA32_VMX_PROCBASED_CTLS2,
148469c8d31cSJan Kiszka 	  MSR_IA32_VMX_PROCBASED_CTLS2, 0 },
148569c8d31cSJan Kiszka 	{ "MSR_IA32_VMX_EXIT_CTLS", MSR_IA32_VMX_EXIT_CTLS,
148669c8d31cSJan Kiszka 	  MSR_IA32_VMX_TRUE_EXIT, 0x36dff },
148769c8d31cSJan Kiszka 	{ "MSR_IA32_VMX_ENTRY_CTLS", MSR_IA32_VMX_ENTRY_CTLS,
148869c8d31cSJan Kiszka 	  MSR_IA32_VMX_TRUE_ENTRY, 0x11ff },
148969c8d31cSJan Kiszka };
149069c8d31cSJan Kiszka 
149169c8d31cSJan Kiszka static void test_vmx_caps(void)
149269c8d31cSJan Kiszka {
149369c8d31cSJan Kiszka 	u64 val, default1, fixed0, fixed1;
149469c8d31cSJan Kiszka 	union vmx_ctrl_msr ctrl, true_ctrl;
149569c8d31cSJan Kiszka 	unsigned int n;
149669c8d31cSJan Kiszka 	bool ok;
149769c8d31cSJan Kiszka 
149869c8d31cSJan Kiszka 	printf("\nTest suite: VMX capability reporting\n");
149969c8d31cSJan Kiszka 
1500a299895bSThomas Huth 	report((basic.revision & (1ul << 31)) == 0 &&
150169c8d31cSJan Kiszka 	       basic.size > 0 && basic.size <= 4096 &&
150269c8d31cSJan Kiszka 	       (basic.type == 0 || basic.type == 6) &&
1503a299895bSThomas Huth 	       basic.reserved1 == 0 && basic.reserved2 == 0,
1504a299895bSThomas Huth 	       "MSR_IA32_VMX_BASIC");
150569c8d31cSJan Kiszka 
150669c8d31cSJan Kiszka 	val = rdmsr(MSR_IA32_VMX_MISC);
1507a299895bSThomas Huth 	report((!(ctrl_cpu_rev[1].clr & CPU_URG) || val & (1ul << 5)) &&
150869c8d31cSJan Kiszka 	       ((val >> 16) & 0x1ff) <= 256 &&
1509a299895bSThomas Huth 	       (val & 0x80007e00) == 0,
1510a299895bSThomas Huth 	       "MSR_IA32_VMX_MISC");
151169c8d31cSJan Kiszka 
151269c8d31cSJan Kiszka 	for (n = 0; n < ARRAY_SIZE(vmx_ctl_msr); n++) {
151369c8d31cSJan Kiszka 		ctrl.val = rdmsr(vmx_ctl_msr[n].index);
151469c8d31cSJan Kiszka 		default1 = vmx_ctl_msr[n].default1;
151569c8d31cSJan Kiszka 		ok = (ctrl.set & default1) == default1;
151669c8d31cSJan Kiszka 		ok = ok && (ctrl.set & ~ctrl.clr) == 0;
151769c8d31cSJan Kiszka 		if (ok && basic.ctrl) {
151869c8d31cSJan Kiszka 			true_ctrl.val = rdmsr(vmx_ctl_msr[n].true_index);
151969c8d31cSJan Kiszka 			ok = ctrl.clr == true_ctrl.clr;
152069c8d31cSJan Kiszka 			ok = ok && ctrl.set == (true_ctrl.set | default1);
152169c8d31cSJan Kiszka 		}
1522a299895bSThomas Huth 		report(ok, "%s", vmx_ctl_msr[n].name);
152369c8d31cSJan Kiszka 	}
152469c8d31cSJan Kiszka 
152569c8d31cSJan Kiszka 	fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0);
152669c8d31cSJan Kiszka 	fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1);
1527a299895bSThomas Huth 	report(((fixed0 ^ fixed1) & ~fixed1) == 0,
1528a299895bSThomas Huth 	       "MSR_IA32_VMX_IA32_VMX_CR0_FIXED0/1");
152969c8d31cSJan Kiszka 
153069c8d31cSJan Kiszka 	fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0);
153169c8d31cSJan Kiszka 	fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1);
1532a299895bSThomas Huth 	report(((fixed0 ^ fixed1) & ~fixed1) == 0,
1533a299895bSThomas Huth 	       "MSR_IA32_VMX_IA32_VMX_CR4_FIXED0/1");
153469c8d31cSJan Kiszka 
153569c8d31cSJan Kiszka 	val = rdmsr(MSR_IA32_VMX_VMCS_ENUM);
1536a299895bSThomas Huth 	report((val & VMCS_FIELD_INDEX_MASK) >= 0x2a &&
1537a299895bSThomas Huth 	       (val & 0xfffffffffffffc01Ull) == 0,
1538a299895bSThomas Huth 	       "MSR_IA32_VMX_VMCS_ENUM");
153969c8d31cSJan Kiszka 
154069c8d31cSJan Kiszka 	val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP);
1541a299895bSThomas Huth 	report((val & 0xfffff07ef98cbebeUll) == 0,
1542a299895bSThomas Huth 	       "MSR_IA32_VMX_EPT_VPID_CAP");
154369c8d31cSJan Kiszka }
154469c8d31cSJan Kiszka 
15459d7eaa29SArthur Chunqi Li /* This function can only be called in guest */
15469d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) hypercall(u32 hypercall_no)
15479d7eaa29SArthur Chunqi Li {
15489d7eaa29SArthur Chunqi Li 	u64 val = 0;
15499d7eaa29SArthur Chunqi Li 	val = (hypercall_no & HYPERCALL_MASK) | HYPERCALL_BIT;
15509d7eaa29SArthur Chunqi Li 	hypercall_field = val;
15519d7eaa29SArthur Chunqi Li 	asm volatile("vmcall\n\t");
15529d7eaa29SArthur Chunqi Li }
15539d7eaa29SArthur Chunqi Li 
15547db17e21SThomas Huth static bool is_hypercall(void)
15559d7eaa29SArthur Chunqi Li {
15569d7eaa29SArthur Chunqi Li 	ulong reason, hyper_bit;
15579d7eaa29SArthur Chunqi Li 
15589d7eaa29SArthur Chunqi Li 	reason = vmcs_read(EXI_REASON) & 0xff;
15599d7eaa29SArthur Chunqi Li 	hyper_bit = hypercall_field & HYPERCALL_BIT;
15609d7eaa29SArthur Chunqi Li 	if (reason == VMX_VMCALL && hyper_bit)
15619d7eaa29SArthur Chunqi Li 		return true;
15629d7eaa29SArthur Chunqi Li 	return false;
15639d7eaa29SArthur Chunqi Li }
15649d7eaa29SArthur Chunqi Li 
15657db17e21SThomas Huth static int handle_hypercall(void)
15669d7eaa29SArthur Chunqi Li {
15679d7eaa29SArthur Chunqi Li 	ulong hypercall_no;
15689d7eaa29SArthur Chunqi Li 
15699d7eaa29SArthur Chunqi Li 	hypercall_no = hypercall_field & HYPERCALL_MASK;
15709d7eaa29SArthur Chunqi Li 	hypercall_field = 0;
15719d7eaa29SArthur Chunqi Li 	switch (hypercall_no) {
15729d7eaa29SArthur Chunqi Li 	case HYPERCALL_VMEXIT:
15739d7eaa29SArthur Chunqi Li 		return VMX_TEST_VMEXIT;
1574794c67a9SPeter Feiner 	case HYPERCALL_VMABORT:
1575794c67a9SPeter Feiner 		return VMX_TEST_VMABORT;
1576794c67a9SPeter Feiner 	case HYPERCALL_VMSKIP:
1577794c67a9SPeter Feiner 		return VMX_TEST_VMSKIP;
15789d7eaa29SArthur Chunqi Li 	default:
1579b006d7ebSAndrew Jones 		printf("ERROR : Invalid hypercall number : %ld\n", hypercall_no);
15809d7eaa29SArthur Chunqi Li 	}
15819d7eaa29SArthur Chunqi Li 	return VMX_TEST_EXIT;
15829d7eaa29SArthur Chunqi Li }
15839d7eaa29SArthur Chunqi Li 
1584794c67a9SPeter Feiner static void continue_abort(void)
1585794c67a9SPeter Feiner {
1586794c67a9SPeter Feiner 	assert(!in_guest);
1587794c67a9SPeter Feiner 	printf("Host was here when guest aborted:\n");
1588794c67a9SPeter Feiner 	dump_stack();
1589794c67a9SPeter Feiner 	longjmp(abort_target, 1);
1590794c67a9SPeter Feiner 	abort();
1591794c67a9SPeter Feiner }
1592794c67a9SPeter Feiner 
1593794c67a9SPeter Feiner void __abort_test(void)
1594794c67a9SPeter Feiner {
1595794c67a9SPeter Feiner 	if (in_guest)
1596794c67a9SPeter Feiner 		hypercall(HYPERCALL_VMABORT);
1597794c67a9SPeter Feiner 	else
1598794c67a9SPeter Feiner 		longjmp(abort_target, 1);
1599794c67a9SPeter Feiner 	abort();
1600794c67a9SPeter Feiner }
1601794c67a9SPeter Feiner 
1602794c67a9SPeter Feiner static void continue_skip(void)
1603794c67a9SPeter Feiner {
1604794c67a9SPeter Feiner 	assert(!in_guest);
1605794c67a9SPeter Feiner 	longjmp(abort_target, 1);
1606794c67a9SPeter Feiner 	abort();
1607794c67a9SPeter Feiner }
1608794c67a9SPeter Feiner 
1609794c67a9SPeter Feiner void test_skip(const char *msg)
1610794c67a9SPeter Feiner {
1611794c67a9SPeter Feiner 	printf("%s skipping test: %s\n", in_guest ? "Guest" : "Host", msg);
1612794c67a9SPeter Feiner 	if (in_guest)
1613794c67a9SPeter Feiner 		hypercall(HYPERCALL_VMABORT);
1614794c67a9SPeter Feiner 	else
1615794c67a9SPeter Feiner 		longjmp(abort_target, 1);
1616794c67a9SPeter Feiner 	abort();
1617794c67a9SPeter Feiner }
1618794c67a9SPeter Feiner 
16197db17e21SThomas Huth static int exit_handler(void)
16209d7eaa29SArthur Chunqi Li {
16219d7eaa29SArthur Chunqi Li 	int ret;
16229d7eaa29SArthur Chunqi Li 
16239d7eaa29SArthur Chunqi Li 	current->exits++;
16241d9284d0SArthur Chunqi Li 	regs.rflags = vmcs_read(GUEST_RFLAGS);
16259d7eaa29SArthur Chunqi Li 	if (is_hypercall())
16269d7eaa29SArthur Chunqi Li 		ret = handle_hypercall();
16279d7eaa29SArthur Chunqi Li 	else
16289d7eaa29SArthur Chunqi Li 		ret = current->exit_handler();
16291d9284d0SArthur Chunqi Li 	vmcs_write(GUEST_RFLAGS, regs.rflags);
16303b50efe3SPeter Feiner 
16319d7eaa29SArthur Chunqi Li 	return ret;
16329d7eaa29SArthur Chunqi Li }
16333b50efe3SPeter Feiner 
16343b50efe3SPeter Feiner /*
163574f7e9b2SKrish Sadhukhan  * Tries to enter the guest. Returns true if entry succeeded. Otherwise,
1636c76ddf06SPeter Feiner  * populates @failure.
1637c76ddf06SPeter Feiner  */
163874f7e9b2SKrish Sadhukhan static void vmx_enter_guest(struct vmentry_failure *failure)
16399d7eaa29SArthur Chunqi Li {
1640c76ddf06SPeter Feiner 	failure->early = 0;
16414e809db5SPeter Feiner 
1642794c67a9SPeter Feiner 	in_guest = 1;
16439d7eaa29SArthur Chunqi Li 	asm volatile (
1644897d8365SPeter Feiner 		"mov %[HOST_RSP], %%rdi\n\t"
1645897d8365SPeter Feiner 		"vmwrite %%rsp, %%rdi\n\t"
16469d7eaa29SArthur Chunqi Li 		LOAD_GPR_C
164744417388SPaolo Bonzini 		"cmpb $0, %[launched]\n\t"
16489d7eaa29SArthur Chunqi Li 		"jne 1f\n\t"
16499d7eaa29SArthur Chunqi Li 		"vmlaunch\n\t"
16509d7eaa29SArthur Chunqi Li 		"jmp 2f\n\t"
16519d7eaa29SArthur Chunqi Li 		"1: "
16529d7eaa29SArthur Chunqi Li 		"vmresume\n\t"
16539d7eaa29SArthur Chunqi Li 		"2: "
1654f37cf4e2SPeter Feiner 		SAVE_GPR_C
1655897d8365SPeter Feiner 		"pushf\n\t"
1656897d8365SPeter Feiner 		"pop %%rdi\n\t"
1657c76ddf06SPeter Feiner 		"mov %%rdi, %[failure_flags]\n\t"
1658e5adf54bSPaolo Bonzini 		"movl $1, %[failure_early]\n\t"
1659f37cf4e2SPeter Feiner 		"jmp 3f\n\t"
16609d7eaa29SArthur Chunqi Li 		"vmx_return:\n\t"
16619d7eaa29SArthur Chunqi Li 		SAVE_GPR_C
1662f37cf4e2SPeter Feiner 		"3: \n\t"
1663c76ddf06SPeter Feiner 		: [failure_early]"+m"(failure->early),
1664c76ddf06SPeter Feiner 		  [failure_flags]"=m"(failure->flags)
1665897d8365SPeter Feiner 		: [launched]"m"(launched), [HOST_RSP]"i"(HOST_RSP)
1666897d8365SPeter Feiner 		: "rdi", "memory", "cc"
16679d7eaa29SArthur Chunqi Li 	);
1668794c67a9SPeter Feiner 	in_guest = 0;
16693b50efe3SPeter Feiner 
1670c76ddf06SPeter Feiner 	failure->vmlaunch = !launched;
1671c76ddf06SPeter Feiner 	failure->instr = launched ? "vmresume" : "vmlaunch";
1672c76ddf06SPeter Feiner }
1673c76ddf06SPeter Feiner 
16747db17e21SThomas Huth static int vmx_run(void)
1675c76ddf06SPeter Feiner {
1676c76ddf06SPeter Feiner 	while (1) {
1677c76ddf06SPeter Feiner 		u32 ret;
1678c76ddf06SPeter Feiner 		bool entered;
1679c76ddf06SPeter Feiner 		struct vmentry_failure failure;
1680c76ddf06SPeter Feiner 
168174f7e9b2SKrish Sadhukhan 		vmx_enter_guest(&failure);
168274f7e9b2SKrish Sadhukhan 		entered = !failure.early &&
168374f7e9b2SKrish Sadhukhan 			  !(vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE);
16843b50efe3SPeter Feiner 
16853b50efe3SPeter Feiner 		if (entered) {
16863b50efe3SPeter Feiner 			/*
16873b50efe3SPeter Feiner 			 * VMCS isn't in "launched" state if there's been any
16883b50efe3SPeter Feiner 			 * entry failure (early or otherwise).
16893b50efe3SPeter Feiner 			 */
16909d7eaa29SArthur Chunqi Li 			launched = 1;
16919d7eaa29SArthur Chunqi Li 			ret = exit_handler();
1692*db6f75d8SSean Christopherson 		} else if (current->entry_failure_handler) {
1693*db6f75d8SSean Christopherson 			ret = current->entry_failure_handler(failure);
16943b50efe3SPeter Feiner 		} else {
1695*db6f75d8SSean Christopherson 			ret = VMX_TEST_EXIT;
16969d7eaa29SArthur Chunqi Li 		}
16973b50efe3SPeter Feiner 
16989d7eaa29SArthur Chunqi Li 		switch (ret) {
16993b50efe3SPeter Feiner 		case VMX_TEST_RESUME:
17003b50efe3SPeter Feiner 			continue;
17019d7eaa29SArthur Chunqi Li 		case VMX_TEST_VMEXIT:
1702794c67a9SPeter Feiner 			guest_finished = 1;
17039d7eaa29SArthur Chunqi Li 			return 0;
17043b50efe3SPeter Feiner 		case VMX_TEST_EXIT:
17059d7eaa29SArthur Chunqi Li 			break;
17069d7eaa29SArthur Chunqi Li 		default:
17073b50efe3SPeter Feiner 			printf("ERROR : Invalid %s_handler return val %d.\n",
17083b50efe3SPeter Feiner 			       entered ? "exit" : "entry_failure",
17093b50efe3SPeter Feiner 			       ret);
17109d7eaa29SArthur Chunqi Li 			break;
17119d7eaa29SArthur Chunqi Li 		}
17123b50efe3SPeter Feiner 
17133b50efe3SPeter Feiner 		if (entered)
17143b50efe3SPeter Feiner 			print_vmexit_info();
17153b50efe3SPeter Feiner 		else
17163b50efe3SPeter Feiner 			print_vmentry_failure_info(&failure);
17173b50efe3SPeter Feiner 		abort();
17183b50efe3SPeter Feiner 	}
17199d7eaa29SArthur Chunqi Li }
17209d7eaa29SArthur Chunqi Li 
1721794c67a9SPeter Feiner static void run_teardown_step(struct test_teardown_step *step)
1722794c67a9SPeter Feiner {
1723794c67a9SPeter Feiner 	step->func(step->data);
1724794c67a9SPeter Feiner }
1725794c67a9SPeter Feiner 
17269d7eaa29SArthur Chunqi Li static int test_run(struct vmx_test *test)
17279d7eaa29SArthur Chunqi Li {
1728794c67a9SPeter Feiner 	int r;
1729794c67a9SPeter Feiner 
1730794c67a9SPeter Feiner 	/* Validate V2 interface. */
1731794c67a9SPeter Feiner 	if (test->v2) {
1732794c67a9SPeter Feiner 		int ret = 0;
1733794c67a9SPeter Feiner 		if (test->init || test->guest_main || test->exit_handler ||
1734794c67a9SPeter Feiner 		    test->syscall_handler) {
1735a299895bSThomas Huth 			report(0, "V2 test cannot specify V1 callbacks.");
1736794c67a9SPeter Feiner 			ret = 1;
1737794c67a9SPeter Feiner 		}
1738794c67a9SPeter Feiner 		if (ret)
1739794c67a9SPeter Feiner 			return ret;
1740794c67a9SPeter Feiner 	}
1741794c67a9SPeter Feiner 
17429d7eaa29SArthur Chunqi Li 	if (test->name == NULL)
17439d7eaa29SArthur Chunqi Li 		test->name = "(no name)";
17449d7eaa29SArthur Chunqi Li 	if (vmx_on()) {
17459d7eaa29SArthur Chunqi Li 		printf("%s : vmxon failed.\n", __func__);
17469d7eaa29SArthur Chunqi Li 		return 1;
17479d7eaa29SArthur Chunqi Li 	}
1748794c67a9SPeter Feiner 
17499d7eaa29SArthur Chunqi Li 	init_vmcs(&(test->vmcs));
17509d7eaa29SArthur Chunqi Li 	/* Directly call test->init is ok here, init_vmcs has done
17519d7eaa29SArthur Chunqi Li 	   vmcs init, vmclear and vmptrld*/
1752c592c151SJan Kiszka 	if (test->init && test->init(test->vmcs) != VMX_TEST_START)
1753a0e30e71SPaolo Bonzini 		goto out;
1754794c67a9SPeter Feiner 	teardown_count = 0;
1755794c67a9SPeter Feiner 	v2_guest_main = NULL;
17569d7eaa29SArthur Chunqi Li 	test->exits = 0;
17579d7eaa29SArthur Chunqi Li 	current = test;
17589d7eaa29SArthur Chunqi Li 	regs = test->guest_regs;
1759a12e1d61SKrish Sadhukhan 	vmcs_write(GUEST_RFLAGS, regs.rflags | X86_EFLAGS_FIXED);
17609d7eaa29SArthur Chunqi Li 	launched = 0;
1761794c67a9SPeter Feiner 	guest_finished = 0;
17629d7eaa29SArthur Chunqi Li 	printf("\nTest suite: %s\n", test->name);
1763794c67a9SPeter Feiner 
1764794c67a9SPeter Feiner 	r = setjmp(abort_target);
1765794c67a9SPeter Feiner 	if (r) {
1766794c67a9SPeter Feiner 		assert(!in_guest);
1767794c67a9SPeter Feiner 		goto out;
1768794c67a9SPeter Feiner 	}
1769794c67a9SPeter Feiner 
1770794c67a9SPeter Feiner 
1771794c67a9SPeter Feiner 	if (test->v2)
1772794c67a9SPeter Feiner 		test->v2();
1773794c67a9SPeter Feiner 	else
17749d7eaa29SArthur Chunqi Li 		vmx_run();
1775794c67a9SPeter Feiner 
1776794c67a9SPeter Feiner 	while (teardown_count > 0)
1777794c67a9SPeter Feiner 		run_teardown_step(&teardown_steps[--teardown_count]);
1778794c67a9SPeter Feiner 
1779794c67a9SPeter Feiner 	if (launched && !guest_finished)
1780a299895bSThomas Huth 		report(0, "Guest didn't run to completion.");
1781794c67a9SPeter Feiner 
1782a0e30e71SPaolo Bonzini out:
17839d7eaa29SArthur Chunqi Li 	if (vmx_off()) {
17849d7eaa29SArthur Chunqi Li 		printf("%s : vmxoff failed.\n", __func__);
17859d7eaa29SArthur Chunqi Li 		return 1;
17869d7eaa29SArthur Chunqi Li 	}
17879d7eaa29SArthur Chunqi Li 	return 0;
17889d7eaa29SArthur Chunqi Li }
17899d7eaa29SArthur Chunqi Li 
1790794c67a9SPeter Feiner /*
1791794c67a9SPeter Feiner  * Add a teardown step. Executed after the test's main function returns.
1792794c67a9SPeter Feiner  * Teardown steps executed in reverse order.
1793794c67a9SPeter Feiner  */
1794794c67a9SPeter Feiner void test_add_teardown(test_teardown_func func, void *data)
1795794c67a9SPeter Feiner {
1796794c67a9SPeter Feiner 	struct test_teardown_step *step;
1797794c67a9SPeter Feiner 
1798794c67a9SPeter Feiner 	TEST_ASSERT_MSG(teardown_count < MAX_TEST_TEARDOWN_STEPS,
1799794c67a9SPeter Feiner 			"There are already %d teardown steps.",
1800794c67a9SPeter Feiner 			teardown_count);
1801794c67a9SPeter Feiner 	step = &teardown_steps[teardown_count++];
1802794c67a9SPeter Feiner 	step->func = func;
1803794c67a9SPeter Feiner 	step->data = data;
1804794c67a9SPeter Feiner }
1805794c67a9SPeter Feiner 
1806794c67a9SPeter Feiner /*
1807794c67a9SPeter Feiner  * Set the target of the first enter_guest call. Can only be called once per
1808794c67a9SPeter Feiner  * test. Must be called before first enter_guest call.
1809794c67a9SPeter Feiner  */
1810794c67a9SPeter Feiner void test_set_guest(test_guest_func func)
1811794c67a9SPeter Feiner {
1812794c67a9SPeter Feiner 	assert(current->v2);
1813794c67a9SPeter Feiner 	TEST_ASSERT_MSG(!v2_guest_main, "Already set guest func.");
1814794c67a9SPeter Feiner 	v2_guest_main = func;
1815794c67a9SPeter Feiner }
1816794c67a9SPeter Feiner 
18174ce739beSMarc Orr static void check_for_guest_termination(void)
18184ce739beSMarc Orr {
18194ce739beSMarc Orr 	if (is_hypercall()) {
18204ce739beSMarc Orr 		int ret;
18214ce739beSMarc Orr 
18224ce739beSMarc Orr 		ret = handle_hypercall();
18234ce739beSMarc Orr 		switch (ret) {
18244ce739beSMarc Orr 		case VMX_TEST_VMEXIT:
18254ce739beSMarc Orr 			guest_finished = 1;
18264ce739beSMarc Orr 			break;
18274ce739beSMarc Orr 		case VMX_TEST_VMABORT:
18284ce739beSMarc Orr 			continue_abort();
18294ce739beSMarc Orr 			break;
18304ce739beSMarc Orr 		case VMX_TEST_VMSKIP:
18314ce739beSMarc Orr 			continue_skip();
18324ce739beSMarc Orr 			break;
18334ce739beSMarc Orr 		default:
18344ce739beSMarc Orr 			printf("ERROR : Invalid handle_hypercall return %d.\n",
18354ce739beSMarc Orr 			       ret);
18364ce739beSMarc Orr 			abort();
18374ce739beSMarc Orr 		}
18384ce739beSMarc Orr 	}
18394ce739beSMarc Orr }
18404ce739beSMarc Orr 
184174f7e9b2SKrish Sadhukhan #define        ABORT_ON_EARLY_VMENTRY_FAIL     0x1
184274f7e9b2SKrish Sadhukhan #define        ABORT_ON_INVALID_GUEST_STATE    0x2
184374f7e9b2SKrish Sadhukhan 
1844794c67a9SPeter Feiner /*
1845794c67a9SPeter Feiner  * Enters the guest (or launches it for the first time). Error to call once the
184674f7e9b2SKrish Sadhukhan  * guest has returned (i.e., run past the end of its guest() function).
1847794c67a9SPeter Feiner  */
184874f7e9b2SKrish Sadhukhan static void __enter_guest(u8 abort_flag, struct vmentry_failure *failure)
1849794c67a9SPeter Feiner {
1850794c67a9SPeter Feiner 	TEST_ASSERT_MSG(v2_guest_main,
1851794c67a9SPeter Feiner 			"Never called test_set_guest_func!");
1852794c67a9SPeter Feiner 
1853794c67a9SPeter Feiner 	TEST_ASSERT_MSG(!guest_finished,
1854794c67a9SPeter Feiner 			"Called enter_guest() after guest returned.");
1855794c67a9SPeter Feiner 
185674f7e9b2SKrish Sadhukhan 	vmx_enter_guest(failure);
185774f7e9b2SKrish Sadhukhan 	if ((abort_flag & ABORT_ON_EARLY_VMENTRY_FAIL && failure->early) ||
185874f7e9b2SKrish Sadhukhan 	    (abort_flag & ABORT_ON_INVALID_GUEST_STATE &&
185974f7e9b2SKrish Sadhukhan 	    vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE)) {
186074f7e9b2SKrish Sadhukhan 
186174f7e9b2SKrish Sadhukhan 		print_vmentry_failure_info(failure);
1862794c67a9SPeter Feiner 		abort();
1863794c67a9SPeter Feiner 	}
1864794c67a9SPeter Feiner 
1865e9554497SMarc Orr 	if (!failure->early && !(vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE)) {
1866794c67a9SPeter Feiner 		launched = 1;
18674ce739beSMarc Orr 		check_for_guest_termination();
18684ce739beSMarc Orr 	}
186974f7e9b2SKrish Sadhukhan }
1870794c67a9SPeter Feiner 
18714ce739beSMarc Orr void enter_guest_with_bad_controls(void)
18724ce739beSMarc Orr {
187374f7e9b2SKrish Sadhukhan 	struct vmentry_failure failure = {0};
18744ce739beSMarc Orr 
18754ce739beSMarc Orr 	TEST_ASSERT_MSG(v2_guest_main,
18764ce739beSMarc Orr 			"Never called test_set_guest_func!");
18774ce739beSMarc Orr 
18784ce739beSMarc Orr 	TEST_ASSERT_MSG(!guest_finished,
18794ce739beSMarc Orr 			"Called enter_guest() after guest returned.");
18804ce739beSMarc Orr 
188174f7e9b2SKrish Sadhukhan 	__enter_guest(ABORT_ON_INVALID_GUEST_STATE, &failure);
1882a299895bSThomas Huth 	report(failure.early, "failure occurred early");
1883a299895bSThomas Huth 	report((failure.flags & VMX_ENTRY_FLAGS) == X86_EFLAGS_ZF,
1884a299895bSThomas Huth                "FLAGS set correctly");
1885a299895bSThomas Huth 	report(vmcs_read(VMX_INST_ERROR) == VMXERR_ENTRY_INVALID_CONTROL_FIELD,
1886a299895bSThomas Huth 	       "VM-Inst Error # is %d (VM entry with invalid control field(s))",
18874ce739beSMarc Orr 	       VMXERR_ENTRY_INVALID_CONTROL_FIELD);
18884ce739beSMarc Orr 
18894ce739beSMarc Orr 	/*
18904ce739beSMarc Orr 	 * This if statement shouldn't fire, as the entire premise of this
18914ce739beSMarc Orr 	 * function is that VM entry is expected to fail, rather than succeed
18924ce739beSMarc Orr 	 * and execute to termination. However, if the VM entry does
18934ce739beSMarc Orr 	 * unexpectedly succeed, it's nice to check whether the guest has
18944ce739beSMarc Orr 	 * terminated, to reduce the number of error messages.
18954ce739beSMarc Orr 	 */
189674f7e9b2SKrish Sadhukhan 	if (!failure.early)
18974ce739beSMarc Orr 		check_for_guest_termination();
1898794c67a9SPeter Feiner }
1899794c67a9SPeter Feiner 
190074f7e9b2SKrish Sadhukhan void enter_guest(void)
190174f7e9b2SKrish Sadhukhan {
190274f7e9b2SKrish Sadhukhan 	struct vmentry_failure failure = {0};
190374f7e9b2SKrish Sadhukhan 
190474f7e9b2SKrish Sadhukhan 	__enter_guest(ABORT_ON_EARLY_VMENTRY_FAIL |
190574f7e9b2SKrish Sadhukhan 		      ABORT_ON_INVALID_GUEST_STATE, &failure);
190674f7e9b2SKrish Sadhukhan }
190774f7e9b2SKrish Sadhukhan 
190874f7e9b2SKrish Sadhukhan void enter_guest_with_invalid_guest_state(void)
190974f7e9b2SKrish Sadhukhan {
191074f7e9b2SKrish Sadhukhan 	struct vmentry_failure failure = {0};
191174f7e9b2SKrish Sadhukhan 
191274f7e9b2SKrish Sadhukhan 	__enter_guest(ABORT_ON_EARLY_VMENTRY_FAIL, &failure);
191374f7e9b2SKrish Sadhukhan }
191474f7e9b2SKrish Sadhukhan 
19153ee34093SArthur Chunqi Li extern struct vmx_test vmx_tests[];
19169d7eaa29SArthur Chunqi Li 
1917875b97b3SPeter Feiner static bool
1918875b97b3SPeter Feiner test_wanted(const char *name, const char *filters[], int filter_count)
19198029cac7SPeter Feiner {
1920875b97b3SPeter Feiner 	int i;
1921875b97b3SPeter Feiner 	bool positive = false;
1922875b97b3SPeter Feiner 	bool match = false;
1923875b97b3SPeter Feiner 	char clean_name[strlen(name) + 1];
1924875b97b3SPeter Feiner 	char *c;
19258029cac7SPeter Feiner 	const char *n;
19268029cac7SPeter Feiner 
1927875b97b3SPeter Feiner 	/* Replace spaces with underscores. */
1928875b97b3SPeter Feiner 	n = name;
1929875b97b3SPeter Feiner 	c = &clean_name[0];
1930875b97b3SPeter Feiner 	do *c++ = (*n == ' ') ? '_' : *n;
1931875b97b3SPeter Feiner 	while (*n++);
1932875b97b3SPeter Feiner 
1933875b97b3SPeter Feiner 	for (i = 0; i < filter_count; i++) {
1934875b97b3SPeter Feiner 		const char *filter = filters[i];
1935875b97b3SPeter Feiner 
1936875b97b3SPeter Feiner 		if (filter[0] == '-') {
1937875b97b3SPeter Feiner 			if (simple_glob(clean_name, filter + 1))
1938875b97b3SPeter Feiner 				return false;
1939875b97b3SPeter Feiner 		} else {
1940875b97b3SPeter Feiner 			positive = true;
1941875b97b3SPeter Feiner 			match |= simple_glob(clean_name, filter);
1942875b97b3SPeter Feiner 		}
1943875b97b3SPeter Feiner 	}
1944875b97b3SPeter Feiner 
1945875b97b3SPeter Feiner 	if (!positive || match) {
1946875b97b3SPeter Feiner 		matched++;
1947875b97b3SPeter Feiner 		return true;
1948875b97b3SPeter Feiner 	} else {
19498029cac7SPeter Feiner 		return false;
19508029cac7SPeter Feiner 	}
19518029cac7SPeter Feiner }
19528029cac7SPeter Feiner 
1953875b97b3SPeter Feiner int main(int argc, const char *argv[])
19549d7eaa29SArthur Chunqi Li {
19553ee34093SArthur Chunqi Li 	int i = 0;
19569d7eaa29SArthur Chunqi Li 
19579d7eaa29SArthur Chunqi Li 	setup_vm();
1958706cad23SArbel Moshe 	smp_init();
19593ee34093SArthur Chunqi Li 	hypercall_field = 0;
19609d7eaa29SArthur Chunqi Li 
19617371c622SVitaly Kuznetsov 	/* We want xAPIC mode to test MMIO passthrough from L1 (us) to L2.  */
19627371c622SVitaly Kuznetsov 	reset_apic();
19637371c622SVitaly Kuznetsov 
1964c04259ffSDavid Matlack 	argv++;
1965c04259ffSDavid Matlack 	argc--;
1966c04259ffSDavid Matlack 
1967badc98caSKrish Sadhukhan 	if (!this_cpu_has(X86_FEATURE_VMX)) {
19683b127446SJan Kiszka 		printf("WARNING: vmx not supported, add '-cpu host'\n");
19699d7eaa29SArthur Chunqi Li 		goto exit;
19709d7eaa29SArthur Chunqi Li 	}
197193f10d6fSLiran Alon 	init_bsp_vmx();
1972c04259ffSDavid Matlack 	if (test_wanted("test_vmx_feature_control", argv, argc)) {
1973c04259ffSDavid Matlack 		/* Sets MSR_IA32_FEATURE_CONTROL to 0x5 */
19743b127446SJan Kiszka 		if (test_vmx_feature_control() != 0)
19753b127446SJan Kiszka 			goto exit;
1976c04259ffSDavid Matlack 	} else {
1977883f3fccSLiran Alon 		enable_vmx();
1978c04259ffSDavid Matlack 	}
1979c04259ffSDavid Matlack 
1980c04259ffSDavid Matlack 	if (test_wanted("test_vmxon", argv, argc)) {
1981c04259ffSDavid Matlack 		/* Enables VMX */
19829d7eaa29SArthur Chunqi Li 		if (test_vmxon() != 0)
19839d7eaa29SArthur Chunqi Li 			goto exit;
1984c04259ffSDavid Matlack 	} else {
1985c04259ffSDavid Matlack 		if (vmx_on()) {
1986a299895bSThomas Huth 			report(0, "vmxon");
1987c04259ffSDavid Matlack 			goto exit;
1988c04259ffSDavid Matlack 		}
1989c04259ffSDavid Matlack 	}
1990c04259ffSDavid Matlack 
1991c04259ffSDavid Matlack 	if (test_wanted("test_vmptrld", argv, argc))
19929d7eaa29SArthur Chunqi Li 		test_vmptrld();
1993c04259ffSDavid Matlack 	if (test_wanted("test_vmclear", argv, argc))
19949d7eaa29SArthur Chunqi Li 		test_vmclear();
1995c04259ffSDavid Matlack 	if (test_wanted("test_vmptrst", argv, argc))
19969d7eaa29SArthur Chunqi Li 		test_vmptrst();
1997ecd5b431SDavid Matlack 	if (test_wanted("test_vmwrite_vmread", argv, argc))
1998ecd5b431SDavid Matlack 		test_vmwrite_vmread();
199959161cfaSJim Mattson 	if (test_wanted("test_vmcs_high", argv, argc))
200059161cfaSJim Mattson 		test_vmcs_high();
20016b72cf76SDavid Matlack 	if (test_wanted("test_vmcs_lifecycle", argv, argc))
20026b72cf76SDavid Matlack 		test_vmcs_lifecycle();
2003c04259ffSDavid Matlack 	if (test_wanted("test_vmx_caps", argv, argc))
200469c8d31cSJan Kiszka 		test_vmx_caps();
20059d7eaa29SArthur Chunqi Li 
200634439b1aSPeter Feiner 	/* Balance vmxon from test_vmxon. */
200734439b1aSPeter Feiner 	vmx_off();
200834439b1aSPeter Feiner 
200934439b1aSPeter Feiner 	for (; vmx_tests[i].name != NULL; i++) {
2010c04259ffSDavid Matlack 		if (!test_wanted(vmx_tests[i].name, argv, argc))
20118029cac7SPeter Feiner 			continue;
20129d7eaa29SArthur Chunqi Li 		if (test_run(&vmx_tests[i]))
20139d7eaa29SArthur Chunqi Li 			goto exit;
20148029cac7SPeter Feiner 	}
20158029cac7SPeter Feiner 
20168029cac7SPeter Feiner 	if (!matched)
2017a299895bSThomas Huth 		report(matched, "command line didn't match any tests!");
20189d7eaa29SArthur Chunqi Li 
20199d7eaa29SArthur Chunqi Li exit:
2020f3cdd159SJan Kiszka 	return report_summary();
20219d7eaa29SArthur Chunqi Li }
2022