17ada359dSArthur Chunqi Li /* 27ada359dSArthur Chunqi Li * x86/vmx.c : Framework for testing nested virtualization 37ada359dSArthur Chunqi Li * This is a framework to test nested VMX for KVM, which 47ada359dSArthur Chunqi Li * started as a project of GSoC 2013. All test cases should 57ada359dSArthur Chunqi Li * be located in x86/vmx_tests.c and framework related 67ada359dSArthur Chunqi Li * functions should be in this file. 77ada359dSArthur Chunqi Li * 87ada359dSArthur Chunqi Li * How to write test cases? 97ada359dSArthur Chunqi Li * Add callbacks of test suite in variant "vmx_tests". You can 107ada359dSArthur Chunqi Li * write: 117ada359dSArthur Chunqi Li * 1. init function used for initializing test suite 127ada359dSArthur Chunqi Li * 2. main function for codes running in L2 guest, 137ada359dSArthur Chunqi Li * 3. exit_handler to handle vmexit of L2 to L1 147ada359dSArthur Chunqi Li * 4. syscall handler to handle L2 syscall vmexit 157ada359dSArthur Chunqi Li * 5. vmenter fail handler to handle direct failure of vmenter 167ada359dSArthur Chunqi Li * 6. guest_regs is loaded when vmenter and saved when 177ada359dSArthur Chunqi Li * vmexit, you can read and set it in exit_handler 187ada359dSArthur Chunqi Li * If no special function is needed for a test suite, use 197ada359dSArthur Chunqi Li * coressponding basic_* functions as callback. More handlers 207ada359dSArthur Chunqi Li * can be added to "vmx_tests", see details of "struct vmx_test" 217ada359dSArthur Chunqi Li * and function test_run(). 227ada359dSArthur Chunqi Li * 237ada359dSArthur Chunqi Li * Currently, vmx test framework only set up one VCPU and one 247ada359dSArthur Chunqi Li * concurrent guest test environment with same paging for L2 and 257ada359dSArthur Chunqi Li * L1. For usage of EPT, only 1:1 mapped paging is used from VFN 267ada359dSArthur Chunqi Li * to PFN. 277ada359dSArthur Chunqi Li * 287ada359dSArthur Chunqi Li * Author : Arthur Chunqi Li <yzt356@gmail.com> 297ada359dSArthur Chunqi Li */ 307ada359dSArthur Chunqi Li 319d7eaa29SArthur Chunqi Li #include "libcflat.h" 329d7eaa29SArthur Chunqi Li #include "processor.h" 335aca024eSPaolo Bonzini #include "alloc_page.h" 349d7eaa29SArthur Chunqi Li #include "vm.h" 359d7eaa29SArthur Chunqi Li #include "desc.h" 369d7eaa29SArthur Chunqi Li #include "vmx.h" 379d7eaa29SArthur Chunqi Li #include "msr.h" 389d7eaa29SArthur Chunqi Li #include "smp.h" 399d7eaa29SArthur Chunqi Li 40ce21d809SBandan Das u64 *vmxon_region; 419d7eaa29SArthur Chunqi Li struct vmcs *vmcs_root; 429d7eaa29SArthur Chunqi Li u32 vpid_cnt; 439d7eaa29SArthur Chunqi Li void *guest_stack, *guest_syscall_stack; 449d7eaa29SArthur Chunqi Li u32 ctrl_pin, ctrl_enter, ctrl_exit, ctrl_cpu[2]; 459d7eaa29SArthur Chunqi Li struct regs regs; 46794c67a9SPeter Feiner 479d7eaa29SArthur Chunqi Li struct vmx_test *current; 48794c67a9SPeter Feiner 49794c67a9SPeter Feiner #define MAX_TEST_TEARDOWN_STEPS 10 50794c67a9SPeter Feiner 51794c67a9SPeter Feiner struct test_teardown_step { 52794c67a9SPeter Feiner test_teardown_func func; 53794c67a9SPeter Feiner void *data; 54794c67a9SPeter Feiner }; 55794c67a9SPeter Feiner 56794c67a9SPeter Feiner static int teardown_count; 57794c67a9SPeter Feiner static struct test_teardown_step teardown_steps[MAX_TEST_TEARDOWN_STEPS]; 58794c67a9SPeter Feiner 59794c67a9SPeter Feiner static test_guest_func v2_guest_main; 60794c67a9SPeter Feiner 613ee34093SArthur Chunqi Li u64 hypercall_field; 629d7eaa29SArthur Chunqi Li bool launched; 63c04259ffSDavid Matlack static int matched; 64794c67a9SPeter Feiner static int guest_finished; 65794c67a9SPeter Feiner static int in_guest; 669d7eaa29SArthur Chunqi Li 673ee34093SArthur Chunqi Li union vmx_basic basic; 685f18e779SJan Kiszka union vmx_ctrl_msr ctrl_pin_rev; 695f18e779SJan Kiszka union vmx_ctrl_msr ctrl_cpu_rev[2]; 705f18e779SJan Kiszka union vmx_ctrl_msr ctrl_exit_rev; 715f18e779SJan Kiszka union vmx_ctrl_msr ctrl_enter_rev; 723ee34093SArthur Chunqi Li union vmx_ept_vpid ept_vpid; 733ee34093SArthur Chunqi Li 74337166aaSJan Kiszka extern struct descriptor_table_ptr gdt64_desc; 75337166aaSJan Kiszka extern struct descriptor_table_ptr idt_descr; 76337166aaSJan Kiszka extern struct descriptor_table_ptr tss_descr; 779d7eaa29SArthur Chunqi Li extern void *vmx_return; 789d7eaa29SArthur Chunqi Li extern void *entry_sysenter; 799d7eaa29SArthur Chunqi Li extern void *guest_entry; 809d7eaa29SArthur Chunqi Li 81ffb1a9e0SJan Kiszka static volatile u32 stage; 82ffb1a9e0SJan Kiszka 83794c67a9SPeter Feiner static jmp_buf abort_target; 84794c67a9SPeter Feiner 85ecd5b431SDavid Matlack struct vmcs_field { 86ecd5b431SDavid Matlack u64 mask; 87ecd5b431SDavid Matlack u64 encoding; 88ecd5b431SDavid Matlack }; 89ecd5b431SDavid Matlack 90ecd5b431SDavid Matlack #define MASK(_bits) GENMASK_ULL((_bits) - 1, 0) 91ecd5b431SDavid Matlack #define MASK_NATURAL MASK(sizeof(unsigned long) * 8) 92ecd5b431SDavid Matlack 93ecd5b431SDavid Matlack static struct vmcs_field vmcs_fields[] = { 94ecd5b431SDavid Matlack { MASK(16), VPID }, 95ecd5b431SDavid Matlack { MASK(16), PINV }, 96ecd5b431SDavid Matlack { MASK(16), EPTP_IDX }, 97ecd5b431SDavid Matlack 98ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_ES }, 99ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_CS }, 100ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_SS }, 101ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_DS }, 102ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_FS }, 103ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_GS }, 104ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_LDTR }, 105ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_TR }, 106ecd5b431SDavid Matlack { MASK(16), GUEST_INT_STATUS }, 107ecd5b431SDavid Matlack 108ecd5b431SDavid Matlack { MASK(16), HOST_SEL_ES }, 109ecd5b431SDavid Matlack { MASK(16), HOST_SEL_CS }, 110ecd5b431SDavid Matlack { MASK(16), HOST_SEL_SS }, 111ecd5b431SDavid Matlack { MASK(16), HOST_SEL_DS }, 112ecd5b431SDavid Matlack { MASK(16), HOST_SEL_FS }, 113ecd5b431SDavid Matlack { MASK(16), HOST_SEL_GS }, 114ecd5b431SDavid Matlack { MASK(16), HOST_SEL_TR }, 115ecd5b431SDavid Matlack 116ecd5b431SDavid Matlack { MASK(64), IO_BITMAP_A }, 117ecd5b431SDavid Matlack { MASK(64), IO_BITMAP_B }, 118ecd5b431SDavid Matlack { MASK(64), MSR_BITMAP }, 119ecd5b431SDavid Matlack { MASK(64), EXIT_MSR_ST_ADDR }, 120ecd5b431SDavid Matlack { MASK(64), EXIT_MSR_LD_ADDR }, 121ecd5b431SDavid Matlack { MASK(64), ENTER_MSR_LD_ADDR }, 122ecd5b431SDavid Matlack { MASK(64), VMCS_EXEC_PTR }, 123ecd5b431SDavid Matlack { MASK(64), TSC_OFFSET }, 124ecd5b431SDavid Matlack { MASK(64), APIC_VIRT_ADDR }, 125ecd5b431SDavid Matlack { MASK(64), APIC_ACCS_ADDR }, 126ecd5b431SDavid Matlack { MASK(64), EPTP }, 127ecd5b431SDavid Matlack 128faea4fc6SLiran Alon { MASK(64), INFO_PHYS_ADDR }, 129ecd5b431SDavid Matlack 130ecd5b431SDavid Matlack { MASK(64), VMCS_LINK_PTR }, 131ecd5b431SDavid Matlack { MASK(64), GUEST_DEBUGCTL }, 132ecd5b431SDavid Matlack { MASK(64), GUEST_EFER }, 133ecd5b431SDavid Matlack { MASK(64), GUEST_PAT }, 134ecd5b431SDavid Matlack { MASK(64), GUEST_PERF_GLOBAL_CTRL }, 135ecd5b431SDavid Matlack { MASK(64), GUEST_PDPTE }, 136ecd5b431SDavid Matlack 137ecd5b431SDavid Matlack { MASK(64), HOST_PAT }, 138ecd5b431SDavid Matlack { MASK(64), HOST_EFER }, 139ecd5b431SDavid Matlack { MASK(64), HOST_PERF_GLOBAL_CTRL }, 140ecd5b431SDavid Matlack 141ecd5b431SDavid Matlack { MASK(32), PIN_CONTROLS }, 142ecd5b431SDavid Matlack { MASK(32), CPU_EXEC_CTRL0 }, 143ecd5b431SDavid Matlack { MASK(32), EXC_BITMAP }, 144ecd5b431SDavid Matlack { MASK(32), PF_ERROR_MASK }, 145ecd5b431SDavid Matlack { MASK(32), PF_ERROR_MATCH }, 146ecd5b431SDavid Matlack { MASK(32), CR3_TARGET_COUNT }, 147ecd5b431SDavid Matlack { MASK(32), EXI_CONTROLS }, 148ecd5b431SDavid Matlack { MASK(32), EXI_MSR_ST_CNT }, 149ecd5b431SDavid Matlack { MASK(32), EXI_MSR_LD_CNT }, 150ecd5b431SDavid Matlack { MASK(32), ENT_CONTROLS }, 151ecd5b431SDavid Matlack { MASK(32), ENT_MSR_LD_CNT }, 152ecd5b431SDavid Matlack { MASK(32), ENT_INTR_INFO }, 153ecd5b431SDavid Matlack { MASK(32), ENT_INTR_ERROR }, 154ecd5b431SDavid Matlack { MASK(32), ENT_INST_LEN }, 155ecd5b431SDavid Matlack { MASK(32), TPR_THRESHOLD }, 156ecd5b431SDavid Matlack { MASK(32), CPU_EXEC_CTRL1 }, 157ecd5b431SDavid Matlack 158faea4fc6SLiran Alon { MASK(32), VMX_INST_ERROR }, 159faea4fc6SLiran Alon { MASK(32), EXI_REASON }, 160faea4fc6SLiran Alon { MASK(32), EXI_INTR_INFO }, 161faea4fc6SLiran Alon { MASK(32), EXI_INTR_ERROR }, 162faea4fc6SLiran Alon { MASK(32), IDT_VECT_INFO }, 163faea4fc6SLiran Alon { MASK(32), IDT_VECT_ERROR }, 164faea4fc6SLiran Alon { MASK(32), EXI_INST_LEN }, 165faea4fc6SLiran Alon { MASK(32), EXI_INST_INFO }, 166ecd5b431SDavid Matlack 167ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_ES }, 168ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_CS }, 169ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_SS }, 170ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_DS }, 171ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_FS }, 172ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_GS }, 173ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_LDTR }, 174ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_TR }, 175ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_GDTR }, 176ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_IDTR }, 177ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_ES }, 178ecd5b431SDavid Matlack { 0x1f0ff, GUEST_AR_CS }, 179ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_SS }, 180ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_DS }, 181ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_FS }, 182ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_GS }, 183ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_LDTR }, 184ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_TR }, 185ecd5b431SDavid Matlack { MASK(32), GUEST_INTR_STATE }, 186ecd5b431SDavid Matlack { MASK(32), GUEST_ACTV_STATE }, 187ecd5b431SDavid Matlack { MASK(32), GUEST_SMBASE }, 188ecd5b431SDavid Matlack { MASK(32), GUEST_SYSENTER_CS }, 189ecd5b431SDavid Matlack { MASK(32), PREEMPT_TIMER_VALUE }, 190ecd5b431SDavid Matlack 191ecd5b431SDavid Matlack { MASK(32), HOST_SYSENTER_CS }, 192ecd5b431SDavid Matlack 193ecd5b431SDavid Matlack { MASK_NATURAL, CR0_MASK }, 194ecd5b431SDavid Matlack { MASK_NATURAL, CR4_MASK }, 195ecd5b431SDavid Matlack { MASK_NATURAL, CR0_READ_SHADOW }, 196ecd5b431SDavid Matlack { MASK_NATURAL, CR4_READ_SHADOW }, 197ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_0 }, 198ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_1 }, 199ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_2 }, 200ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_3 }, 201ecd5b431SDavid Matlack 202faea4fc6SLiran Alon { MASK_NATURAL, EXI_QUALIFICATION }, 203faea4fc6SLiran Alon { MASK_NATURAL, IO_RCX }, 204faea4fc6SLiran Alon { MASK_NATURAL, IO_RSI }, 205faea4fc6SLiran Alon { MASK_NATURAL, IO_RDI }, 206faea4fc6SLiran Alon { MASK_NATURAL, IO_RIP }, 207faea4fc6SLiran Alon { MASK_NATURAL, GUEST_LINEAR_ADDRESS }, 208ecd5b431SDavid Matlack 209ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_CR0 }, 210ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_CR3 }, 211ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_CR4 }, 212ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_ES }, 213ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_CS }, 214ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_SS }, 215ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_DS }, 216ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_FS }, 217ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_GS }, 218ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_LDTR }, 219ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_TR }, 220ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_GDTR }, 221ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_IDTR }, 222ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_DR7 }, 223ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_RSP }, 224ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_RIP }, 225ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_RFLAGS }, 226ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_PENDING_DEBUG }, 227ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_SYSENTER_ESP }, 228ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_SYSENTER_EIP }, 229ecd5b431SDavid Matlack 230ecd5b431SDavid Matlack { MASK_NATURAL, HOST_CR0 }, 231ecd5b431SDavid Matlack { MASK_NATURAL, HOST_CR3 }, 232ecd5b431SDavid Matlack { MASK_NATURAL, HOST_CR4 }, 233ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_FS }, 234ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_GS }, 235ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_TR }, 236ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_GDTR }, 237ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_IDTR }, 238ecd5b431SDavid Matlack { MASK_NATURAL, HOST_SYSENTER_ESP }, 239ecd5b431SDavid Matlack { MASK_NATURAL, HOST_SYSENTER_EIP }, 240ecd5b431SDavid Matlack { MASK_NATURAL, HOST_RSP }, 241ecd5b431SDavid Matlack { MASK_NATURAL, HOST_RIP }, 242ecd5b431SDavid Matlack }; 243ecd5b431SDavid Matlack 244faea4fc6SLiran Alon enum vmcs_field_type { 245faea4fc6SLiran Alon VMCS_FIELD_TYPE_CONTROL = 0, 246faea4fc6SLiran Alon VMCS_FIELD_TYPE_READ_ONLY_DATA = 1, 247faea4fc6SLiran Alon VMCS_FIELD_TYPE_GUEST = 2, 248faea4fc6SLiran Alon VMCS_FIELD_TYPE_HOST = 3, 249faea4fc6SLiran Alon VMCS_FIELD_TYPES, 250faea4fc6SLiran Alon }; 251faea4fc6SLiran Alon 252faea4fc6SLiran Alon static inline int vmcs_field_type(struct vmcs_field *f) 253faea4fc6SLiran Alon { 254faea4fc6SLiran Alon return (f->encoding >> VMCS_FIELD_TYPE_SHIFT) & 0x3; 255faea4fc6SLiran Alon } 256faea4fc6SLiran Alon 257faea4fc6SLiran Alon static int vmcs_field_readonly(struct vmcs_field *f) 258faea4fc6SLiran Alon { 259faea4fc6SLiran Alon u64 ia32_vmx_misc; 260faea4fc6SLiran Alon 261faea4fc6SLiran Alon ia32_vmx_misc = rdmsr(MSR_IA32_VMX_MISC); 262faea4fc6SLiran Alon return !(ia32_vmx_misc & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS) && 263faea4fc6SLiran Alon (vmcs_field_type(f) == VMCS_FIELD_TYPE_READ_ONLY_DATA); 264faea4fc6SLiran Alon } 265faea4fc6SLiran Alon 266ecd5b431SDavid Matlack static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie) 267ecd5b431SDavid Matlack { 268ecd5b431SDavid Matlack u64 value; 269ecd5b431SDavid Matlack 270ecd5b431SDavid Matlack /* Incorporate the cookie and the field encoding into the value. */ 271ecd5b431SDavid Matlack value = cookie; 272ecd5b431SDavid Matlack value |= (f->encoding << 8); 273ecd5b431SDavid Matlack value |= 0xdeadbeefull << 32; 274ecd5b431SDavid Matlack 275ecd5b431SDavid Matlack return value & f->mask; 276ecd5b431SDavid Matlack } 277ecd5b431SDavid Matlack 278ecd5b431SDavid Matlack static void set_vmcs_field(struct vmcs_field *f, u8 cookie) 279ecd5b431SDavid Matlack { 280ecd5b431SDavid Matlack vmcs_write(f->encoding, vmcs_field_value(f, cookie)); 281ecd5b431SDavid Matlack } 282ecd5b431SDavid Matlack 283ecd5b431SDavid Matlack static bool check_vmcs_field(struct vmcs_field *f, u8 cookie) 284ecd5b431SDavid Matlack { 285ecd5b431SDavid Matlack u64 expected; 286ecd5b431SDavid Matlack u64 actual; 287ecd5b431SDavid Matlack int ret; 288ecd5b431SDavid Matlack 289faea4fc6SLiran Alon if (f->encoding == VMX_INST_ERROR) { 290faea4fc6SLiran Alon printf("Skipping volatile field %lx\n", f->encoding); 291faea4fc6SLiran Alon return true; 292faea4fc6SLiran Alon } 293faea4fc6SLiran Alon 294faea4fc6SLiran Alon if (vmcs_field_readonly(f)) { 295faea4fc6SLiran Alon printf("Skipping read-only field %lx\n", f->encoding); 296faea4fc6SLiran Alon return true; 297faea4fc6SLiran Alon } 298faea4fc6SLiran Alon 299ecd5b431SDavid Matlack ret = vmcs_read_checking(f->encoding, &actual); 300ecd5b431SDavid Matlack assert(!(ret & X86_EFLAGS_CF)); 301ecd5b431SDavid Matlack /* Skip VMCS fields that aren't recognized by the CPU */ 302ecd5b431SDavid Matlack if (ret & X86_EFLAGS_ZF) 303ecd5b431SDavid Matlack return true; 304ecd5b431SDavid Matlack 305ecd5b431SDavid Matlack expected = vmcs_field_value(f, cookie); 306ecd5b431SDavid Matlack actual &= f->mask; 307ecd5b431SDavid Matlack 308ecd5b431SDavid Matlack if (expected == actual) 309ecd5b431SDavid Matlack return true; 310ecd5b431SDavid Matlack 311d4ab68adSDavid Matlack printf("FAIL: VMWRITE/VMREAD %lx (expected: %lx, actual: %lx)\n", 312ecd5b431SDavid Matlack f->encoding, (unsigned long) expected, (unsigned long) actual); 313ecd5b431SDavid Matlack 314ecd5b431SDavid Matlack return false; 315ecd5b431SDavid Matlack } 316ecd5b431SDavid Matlack 317ecd5b431SDavid Matlack static void set_all_vmcs_fields(u8 cookie) 318ecd5b431SDavid Matlack { 319ecd5b431SDavid Matlack int i; 320ecd5b431SDavid Matlack 321ecd5b431SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) 322ecd5b431SDavid Matlack set_vmcs_field(&vmcs_fields[i], cookie); 323ecd5b431SDavid Matlack } 324ecd5b431SDavid Matlack 325ecd5b431SDavid Matlack static bool check_all_vmcs_fields(u8 cookie) 326ecd5b431SDavid Matlack { 327ecd5b431SDavid Matlack bool pass = true; 328ecd5b431SDavid Matlack int i; 329ecd5b431SDavid Matlack 330ecd5b431SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) { 331ecd5b431SDavid Matlack if (!check_vmcs_field(&vmcs_fields[i], cookie)) 332ecd5b431SDavid Matlack pass = false; 333ecd5b431SDavid Matlack } 334ecd5b431SDavid Matlack 335ecd5b431SDavid Matlack return pass; 336ecd5b431SDavid Matlack } 337ecd5b431SDavid Matlack 338ecd5b431SDavid Matlack void test_vmwrite_vmread(void) 339ecd5b431SDavid Matlack { 340ecd5b431SDavid Matlack struct vmcs *vmcs = alloc_page(); 341ecd5b431SDavid Matlack 342ecd5b431SDavid Matlack memset(vmcs, 0, PAGE_SIZE); 343*6c0ba6e7SLiran Alon vmcs->hdr.revision_id = basic.revision; 344ecd5b431SDavid Matlack assert(!vmcs_clear(vmcs)); 345ecd5b431SDavid Matlack assert(!make_vmcs_current(vmcs)); 346ecd5b431SDavid Matlack 347ecd5b431SDavid Matlack set_all_vmcs_fields(0x42); 348ecd5b431SDavid Matlack report("VMWRITE/VMREAD", check_all_vmcs_fields(0x42)); 349ecd5b431SDavid Matlack 350ecd5b431SDavid Matlack assert(!vmcs_clear(vmcs)); 351ecd5b431SDavid Matlack free_page(vmcs); 352ecd5b431SDavid Matlack } 353ecd5b431SDavid Matlack 35459161cfaSJim Mattson void test_vmcs_high(void) 35559161cfaSJim Mattson { 35659161cfaSJim Mattson struct vmcs *vmcs = alloc_page(); 35759161cfaSJim Mattson 35859161cfaSJim Mattson memset(vmcs, 0, PAGE_SIZE); 359*6c0ba6e7SLiran Alon vmcs->hdr.revision_id = basic.revision; 36059161cfaSJim Mattson assert(!vmcs_clear(vmcs)); 36159161cfaSJim Mattson assert(!make_vmcs_current(vmcs)); 36259161cfaSJim Mattson 36359161cfaSJim Mattson vmcs_write(TSC_OFFSET, 0x0123456789ABCDEFull); 36459161cfaSJim Mattson report("VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET", 36559161cfaSJim Mattson vmcs_read(TSC_OFFSET) == 0x0123456789ABCDEFull); 36659161cfaSJim Mattson report("VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET", 36759161cfaSJim Mattson vmcs_read(TSC_OFFSET_HI) == 0x01234567ull); 36859161cfaSJim Mattson vmcs_write(TSC_OFFSET_HI, 0x76543210ul); 36959161cfaSJim Mattson report("VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET_HI", 37059161cfaSJim Mattson vmcs_read(TSC_OFFSET_HI) == 0x76543210ul); 37159161cfaSJim Mattson report("VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET_HI", 37259161cfaSJim Mattson vmcs_read(TSC_OFFSET) == 0x7654321089ABCDEFull); 37359161cfaSJim Mattson 37459161cfaSJim Mattson assert(!vmcs_clear(vmcs)); 37559161cfaSJim Mattson free_page(vmcs); 37659161cfaSJim Mattson } 37759161cfaSJim Mattson 3786b72cf76SDavid Matlack void test_vmcs_lifecycle(void) 3796b72cf76SDavid Matlack { 3806b72cf76SDavid Matlack struct vmcs *vmcs[2] = {}; 3816b72cf76SDavid Matlack int i; 3826b72cf76SDavid Matlack 3836b72cf76SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 3846b72cf76SDavid Matlack vmcs[i] = alloc_page(); 3856b72cf76SDavid Matlack memset(vmcs[i], 0, PAGE_SIZE); 386*6c0ba6e7SLiran Alon vmcs[i]->hdr.revision_id = basic.revision; 3876b72cf76SDavid Matlack } 3886b72cf76SDavid Matlack 3896b72cf76SDavid Matlack #define VMPTRLD(_i) do { \ 3906b72cf76SDavid Matlack assert(_i < ARRAY_SIZE(vmcs)); \ 3916b72cf76SDavid Matlack assert(!make_vmcs_current(vmcs[_i])); \ 3926b72cf76SDavid Matlack printf("VMPTRLD VMCS%d\n", (_i)); \ 3936b72cf76SDavid Matlack } while (0) 3946b72cf76SDavid Matlack 3956b72cf76SDavid Matlack #define VMCLEAR(_i) do { \ 3966b72cf76SDavid Matlack assert(_i < ARRAY_SIZE(vmcs)); \ 3976b72cf76SDavid Matlack assert(!vmcs_clear(vmcs[_i])); \ 3986b72cf76SDavid Matlack printf("VMCLEAR VMCS%d\n", (_i)); \ 3996b72cf76SDavid Matlack } while (0) 4006b72cf76SDavid Matlack 4016b72cf76SDavid Matlack VMCLEAR(0); 4026b72cf76SDavid Matlack VMPTRLD(0); 4036b72cf76SDavid Matlack set_all_vmcs_fields(0); 4046b72cf76SDavid Matlack report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0)); 4056b72cf76SDavid Matlack 4066b72cf76SDavid Matlack VMCLEAR(0); 4076b72cf76SDavid Matlack VMPTRLD(0); 4086b72cf76SDavid Matlack report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0)); 4096b72cf76SDavid Matlack 4106b72cf76SDavid Matlack VMCLEAR(1); 4116b72cf76SDavid Matlack report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0)); 4126b72cf76SDavid Matlack 4136b72cf76SDavid Matlack VMPTRLD(1); 4146b72cf76SDavid Matlack set_all_vmcs_fields(1); 4156b72cf76SDavid Matlack report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1)); 4166b72cf76SDavid Matlack 4176b72cf76SDavid Matlack VMPTRLD(0); 4186b72cf76SDavid Matlack report("current:VMCS0 active:[VMCS0,VCMS1]", check_all_vmcs_fields(0)); 4196b72cf76SDavid Matlack VMPTRLD(1); 4206b72cf76SDavid Matlack report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1)); 4216b72cf76SDavid Matlack VMPTRLD(1); 4226b72cf76SDavid Matlack report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1)); 4236b72cf76SDavid Matlack 4246b72cf76SDavid Matlack VMCLEAR(0); 4256b72cf76SDavid Matlack report("current:VMCS1 active:[VCMS1]", check_all_vmcs_fields(1)); 4266b72cf76SDavid Matlack 427d4ab68adSDavid Matlack /* VMPTRLD should not erase VMWRITEs to the current VMCS */ 428d4ab68adSDavid Matlack set_all_vmcs_fields(2); 429d4ab68adSDavid Matlack VMPTRLD(1); 430d4ab68adSDavid Matlack report("current:VMCS1 active:[VCMS1]", check_all_vmcs_fields(2)); 431d4ab68adSDavid Matlack 4326b72cf76SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 4336b72cf76SDavid Matlack VMCLEAR(i); 4346b72cf76SDavid Matlack free_page(vmcs[i]); 4356b72cf76SDavid Matlack } 4366b72cf76SDavid Matlack 4376b72cf76SDavid Matlack #undef VMPTRLD 4386b72cf76SDavid Matlack #undef VMCLEAR 4396b72cf76SDavid Matlack } 4406b72cf76SDavid Matlack 441ffb1a9e0SJan Kiszka void vmx_set_test_stage(u32 s) 442ffb1a9e0SJan Kiszka { 443ffb1a9e0SJan Kiszka barrier(); 444ffb1a9e0SJan Kiszka stage = s; 445ffb1a9e0SJan Kiszka barrier(); 446ffb1a9e0SJan Kiszka } 447ffb1a9e0SJan Kiszka 448ffb1a9e0SJan Kiszka u32 vmx_get_test_stage(void) 449ffb1a9e0SJan Kiszka { 450ffb1a9e0SJan Kiszka u32 s; 451ffb1a9e0SJan Kiszka 452ffb1a9e0SJan Kiszka barrier(); 453ffb1a9e0SJan Kiszka s = stage; 454ffb1a9e0SJan Kiszka barrier(); 455ffb1a9e0SJan Kiszka return s; 456ffb1a9e0SJan Kiszka } 457ffb1a9e0SJan Kiszka 458ffb1a9e0SJan Kiszka void vmx_inc_test_stage(void) 459ffb1a9e0SJan Kiszka { 460ffb1a9e0SJan Kiszka barrier(); 461ffb1a9e0SJan Kiszka stage++; 462ffb1a9e0SJan Kiszka barrier(); 463ffb1a9e0SJan Kiszka } 464ffb1a9e0SJan Kiszka 4659d7eaa29SArthur Chunqi Li /* entry_sysenter */ 4669d7eaa29SArthur Chunqi Li asm( 4679d7eaa29SArthur Chunqi Li ".align 4, 0x90\n\t" 4689d7eaa29SArthur Chunqi Li ".globl entry_sysenter\n\t" 4699d7eaa29SArthur Chunqi Li "entry_sysenter:\n\t" 4709d7eaa29SArthur Chunqi Li SAVE_GPR 4719d7eaa29SArthur Chunqi Li " and $0xf, %rax\n\t" 4729d7eaa29SArthur Chunqi Li " mov %rax, %rdi\n\t" 4739d7eaa29SArthur Chunqi Li " call syscall_handler\n\t" 4749d7eaa29SArthur Chunqi Li LOAD_GPR 4759d7eaa29SArthur Chunqi Li " vmresume\n\t" 4769d7eaa29SArthur Chunqi Li ); 4779d7eaa29SArthur Chunqi Li 4789d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) syscall_handler(u64 syscall_no) 4799d7eaa29SArthur Chunqi Li { 480d5315e3dSJan Kiszka if (current->syscall_handler) 4819d7eaa29SArthur Chunqi Li current->syscall_handler(syscall_no); 4829d7eaa29SArthur Chunqi Li } 4839d7eaa29SArthur Chunqi Li 4847e207ec1SPeter Feiner static const char * const exit_reason_descriptions[] = { 4857e207ec1SPeter Feiner [VMX_EXC_NMI] = "VMX_EXC_NMI", 4867e207ec1SPeter Feiner [VMX_EXTINT] = "VMX_EXTINT", 4877e207ec1SPeter Feiner [VMX_TRIPLE_FAULT] = "VMX_TRIPLE_FAULT", 4887e207ec1SPeter Feiner [VMX_INIT] = "VMX_INIT", 4897e207ec1SPeter Feiner [VMX_SIPI] = "VMX_SIPI", 4907e207ec1SPeter Feiner [VMX_SMI_IO] = "VMX_SMI_IO", 4917e207ec1SPeter Feiner [VMX_SMI_OTHER] = "VMX_SMI_OTHER", 4927e207ec1SPeter Feiner [VMX_INTR_WINDOW] = "VMX_INTR_WINDOW", 4937e207ec1SPeter Feiner [VMX_NMI_WINDOW] = "VMX_NMI_WINDOW", 4947e207ec1SPeter Feiner [VMX_TASK_SWITCH] = "VMX_TASK_SWITCH", 4957e207ec1SPeter Feiner [VMX_CPUID] = "VMX_CPUID", 4967e207ec1SPeter Feiner [VMX_GETSEC] = "VMX_GETSEC", 4977e207ec1SPeter Feiner [VMX_HLT] = "VMX_HLT", 4987e207ec1SPeter Feiner [VMX_INVD] = "VMX_INVD", 4997e207ec1SPeter Feiner [VMX_INVLPG] = "VMX_INVLPG", 5007e207ec1SPeter Feiner [VMX_RDPMC] = "VMX_RDPMC", 5017e207ec1SPeter Feiner [VMX_RDTSC] = "VMX_RDTSC", 5027e207ec1SPeter Feiner [VMX_RSM] = "VMX_RSM", 5037e207ec1SPeter Feiner [VMX_VMCALL] = "VMX_VMCALL", 5047e207ec1SPeter Feiner [VMX_VMCLEAR] = "VMX_VMCLEAR", 5057e207ec1SPeter Feiner [VMX_VMLAUNCH] = "VMX_VMLAUNCH", 5067e207ec1SPeter Feiner [VMX_VMPTRLD] = "VMX_VMPTRLD", 5077e207ec1SPeter Feiner [VMX_VMPTRST] = "VMX_VMPTRST", 5087e207ec1SPeter Feiner [VMX_VMREAD] = "VMX_VMREAD", 5097e207ec1SPeter Feiner [VMX_VMRESUME] = "VMX_VMRESUME", 5107e207ec1SPeter Feiner [VMX_VMWRITE] = "VMX_VMWRITE", 5117e207ec1SPeter Feiner [VMX_VMXOFF] = "VMX_VMXOFF", 5127e207ec1SPeter Feiner [VMX_VMXON] = "VMX_VMXON", 5137e207ec1SPeter Feiner [VMX_CR] = "VMX_CR", 5147e207ec1SPeter Feiner [VMX_DR] = "VMX_DR", 5157e207ec1SPeter Feiner [VMX_IO] = "VMX_IO", 5167e207ec1SPeter Feiner [VMX_RDMSR] = "VMX_RDMSR", 5177e207ec1SPeter Feiner [VMX_WRMSR] = "VMX_WRMSR", 5187e207ec1SPeter Feiner [VMX_FAIL_STATE] = "VMX_FAIL_STATE", 5197e207ec1SPeter Feiner [VMX_FAIL_MSR] = "VMX_FAIL_MSR", 5207e207ec1SPeter Feiner [VMX_MWAIT] = "VMX_MWAIT", 5217e207ec1SPeter Feiner [VMX_MTF] = "VMX_MTF", 5227e207ec1SPeter Feiner [VMX_MONITOR] = "VMX_MONITOR", 5237e207ec1SPeter Feiner [VMX_PAUSE] = "VMX_PAUSE", 5247e207ec1SPeter Feiner [VMX_FAIL_MCHECK] = "VMX_FAIL_MCHECK", 5257e207ec1SPeter Feiner [VMX_TPR_THRESHOLD] = "VMX_TPR_THRESHOLD", 5267e207ec1SPeter Feiner [VMX_APIC_ACCESS] = "VMX_APIC_ACCESS", 52767fdc49eSArbel Moshe [VMX_EOI_INDUCED] = "VMX_EOI_INDUCED", 5287e207ec1SPeter Feiner [VMX_GDTR_IDTR] = "VMX_GDTR_IDTR", 5297e207ec1SPeter Feiner [VMX_LDTR_TR] = "VMX_LDTR_TR", 5307e207ec1SPeter Feiner [VMX_EPT_VIOLATION] = "VMX_EPT_VIOLATION", 5317e207ec1SPeter Feiner [VMX_EPT_MISCONFIG] = "VMX_EPT_MISCONFIG", 5327e207ec1SPeter Feiner [VMX_INVEPT] = "VMX_INVEPT", 5337e207ec1SPeter Feiner [VMX_PREEMPT] = "VMX_PREEMPT", 5347e207ec1SPeter Feiner [VMX_INVVPID] = "VMX_INVVPID", 5357e207ec1SPeter Feiner [VMX_WBINVD] = "VMX_WBINVD", 5367e207ec1SPeter Feiner [VMX_XSETBV] = "VMX_XSETBV", 5377e207ec1SPeter Feiner [VMX_APIC_WRITE] = "VMX_APIC_WRITE", 5387e207ec1SPeter Feiner [VMX_RDRAND] = "VMX_RDRAND", 5397e207ec1SPeter Feiner [VMX_INVPCID] = "VMX_INVPCID", 5407e207ec1SPeter Feiner [VMX_VMFUNC] = "VMX_VMFUNC", 5417e207ec1SPeter Feiner [VMX_RDSEED] = "VMX_RDSEED", 5427e207ec1SPeter Feiner [VMX_PML_FULL] = "VMX_PML_FULL", 5437e207ec1SPeter Feiner [VMX_XSAVES] = "VMX_XSAVES", 5447e207ec1SPeter Feiner [VMX_XRSTORS] = "VMX_XRSTORS", 5457e207ec1SPeter Feiner }; 5467e207ec1SPeter Feiner 5477e207ec1SPeter Feiner const char *exit_reason_description(u64 reason) 5487e207ec1SPeter Feiner { 5497e207ec1SPeter Feiner if (reason >= ARRAY_SIZE(exit_reason_descriptions)) 5507e207ec1SPeter Feiner return "(unknown)"; 5517e207ec1SPeter Feiner return exit_reason_descriptions[reason] ? : "(unused)"; 5527e207ec1SPeter Feiner } 5537e207ec1SPeter Feiner 5543ee34093SArthur Chunqi Li void print_vmexit_info() 5559d7eaa29SArthur Chunqi Li { 5569d7eaa29SArthur Chunqi Li u64 guest_rip, guest_rsp; 5579d7eaa29SArthur Chunqi Li ulong reason = vmcs_read(EXI_REASON) & 0xff; 5589d7eaa29SArthur Chunqi Li ulong exit_qual = vmcs_read(EXI_QUALIFICATION); 5599d7eaa29SArthur Chunqi Li guest_rip = vmcs_read(GUEST_RIP); 5609d7eaa29SArthur Chunqi Li guest_rsp = vmcs_read(GUEST_RSP); 5619d7eaa29SArthur Chunqi Li printf("VMEXIT info:\n"); 562b006d7ebSAndrew Jones printf("\tvmexit reason = %ld\n", reason); 563fd6aada0SRadim Krčmář printf("\texit qualification = %#lx\n", exit_qual); 564b006d7ebSAndrew Jones printf("\tBit 31 of reason = %lx\n", (vmcs_read(EXI_REASON) >> 31) & 1); 565fd6aada0SRadim Krčmář printf("\tguest_rip = %#lx\n", guest_rip); 566fd6aada0SRadim Krčmář printf("\tRAX=%#lx RBX=%#lx RCX=%#lx RDX=%#lx\n", 5679d7eaa29SArthur Chunqi Li regs.rax, regs.rbx, regs.rcx, regs.rdx); 568fd6aada0SRadim Krčmář printf("\tRSP=%#lx RBP=%#lx RSI=%#lx RDI=%#lx\n", 5699d7eaa29SArthur Chunqi Li guest_rsp, regs.rbp, regs.rsi, regs.rdi); 570fd6aada0SRadim Krčmář printf("\tR8 =%#lx R9 =%#lx R10=%#lx R11=%#lx\n", 5719d7eaa29SArthur Chunqi Li regs.r8, regs.r9, regs.r10, regs.r11); 572fd6aada0SRadim Krčmář printf("\tR12=%#lx R13=%#lx R14=%#lx R15=%#lx\n", 5739d7eaa29SArthur Chunqi Li regs.r12, regs.r13, regs.r14, regs.r15); 5749d7eaa29SArthur Chunqi Li } 5759d7eaa29SArthur Chunqi Li 5763b50efe3SPeter Feiner void 5773b50efe3SPeter Feiner print_vmentry_failure_info(struct vmentry_failure *failure) { 5783b50efe3SPeter Feiner if (failure->early) { 5793b50efe3SPeter Feiner printf("Early %s failure: ", failure->instr); 5803b50efe3SPeter Feiner switch (failure->flags & VMX_ENTRY_FLAGS) { 581ce154ba8SPaolo Bonzini case X86_EFLAGS_CF: 5823b50efe3SPeter Feiner printf("current-VMCS pointer is not valid.\n"); 5833b50efe3SPeter Feiner break; 584ce154ba8SPaolo Bonzini case X86_EFLAGS_ZF: 5853b50efe3SPeter Feiner printf("error number is %ld. See Intel 30.4.\n", 5863b50efe3SPeter Feiner vmcs_read(VMX_INST_ERROR)); 5873b50efe3SPeter Feiner break; 5883b50efe3SPeter Feiner default: 5893b50efe3SPeter Feiner printf("unexpected flags %lx!\n", failure->flags); 5903b50efe3SPeter Feiner } 5913b50efe3SPeter Feiner } else { 5923b50efe3SPeter Feiner u64 reason = vmcs_read(EXI_REASON); 5933b50efe3SPeter Feiner u64 qual = vmcs_read(EXI_QUALIFICATION); 5943b50efe3SPeter Feiner 595fd6aada0SRadim Krčmář printf("Non-early %s failure (reason=%#lx, qual=%#lx): ", 5963b50efe3SPeter Feiner failure->instr, reason, qual); 5973b50efe3SPeter Feiner 5983b50efe3SPeter Feiner switch (reason & 0xff) { 5993b50efe3SPeter Feiner case VMX_FAIL_STATE: 6003b50efe3SPeter Feiner printf("invalid guest state\n"); 6013b50efe3SPeter Feiner break; 6023b50efe3SPeter Feiner case VMX_FAIL_MSR: 6033b50efe3SPeter Feiner printf("MSR loading\n"); 6043b50efe3SPeter Feiner break; 6053b50efe3SPeter Feiner case VMX_FAIL_MCHECK: 6063b50efe3SPeter Feiner printf("machine-check event\n"); 6073b50efe3SPeter Feiner break; 6083b50efe3SPeter Feiner default: 6093b50efe3SPeter Feiner printf("unexpected basic exit reason %ld\n", 6103b50efe3SPeter Feiner reason & 0xff); 6113b50efe3SPeter Feiner } 6123b50efe3SPeter Feiner 6133b50efe3SPeter Feiner if (!(reason & VMX_ENTRY_FAILURE)) 6143b50efe3SPeter Feiner printf("\tVMX_ENTRY_FAILURE BIT NOT SET!\n"); 6153b50efe3SPeter Feiner 6163b50efe3SPeter Feiner if (reason & 0x7fff0000) 6173b50efe3SPeter Feiner printf("\tRESERVED BITS SET!\n"); 6183b50efe3SPeter Feiner } 6193b50efe3SPeter Feiner } 6203b50efe3SPeter Feiner 6212f6828d7SDavid Matlack /* 6222f6828d7SDavid Matlack * VMCLEAR should ensures all VMCS state is flushed to the VMCS 6232f6828d7SDavid Matlack * region in memory. 6242f6828d7SDavid Matlack */ 6252f6828d7SDavid Matlack static void test_vmclear_flushing(void) 6262f6828d7SDavid Matlack { 6272f6828d7SDavid Matlack struct vmcs *vmcs[3] = {}; 6282f6828d7SDavid Matlack int i; 6292f6828d7SDavid Matlack 6302f6828d7SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 6312f6828d7SDavid Matlack vmcs[i] = alloc_page(); 6322f6828d7SDavid Matlack memset(vmcs[i], 0, PAGE_SIZE); 6332f6828d7SDavid Matlack } 6342f6828d7SDavid Matlack 635*6c0ba6e7SLiran Alon vmcs[0]->hdr.revision_id = basic.revision; 6362f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[0])); 6372f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[0])); 6382f6828d7SDavid Matlack set_all_vmcs_fields(0x86); 6392f6828d7SDavid Matlack 6402f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[0])); 6412f6828d7SDavid Matlack memcpy(vmcs[1], vmcs[0], basic.size); 6422f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[1])); 6432f6828d7SDavid Matlack report("test vmclear flush (current VMCS)", check_all_vmcs_fields(0x86)); 6442f6828d7SDavid Matlack 6452f6828d7SDavid Matlack set_all_vmcs_fields(0x87); 6462f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[0])); 6472f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[1])); 6482f6828d7SDavid Matlack memcpy(vmcs[2], vmcs[1], basic.size); 6492f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[2])); 6502f6828d7SDavid Matlack report("test vmclear flush (!current VMCS)", check_all_vmcs_fields(0x87)); 6512f6828d7SDavid Matlack 6522f6828d7SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 6532f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[i])); 6542f6828d7SDavid Matlack free_page(vmcs[i]); 6552f6828d7SDavid Matlack } 6562f6828d7SDavid Matlack } 6573b50efe3SPeter Feiner 6589d7eaa29SArthur Chunqi Li static void test_vmclear(void) 6599d7eaa29SArthur Chunqi Li { 660daeec979SBandan Das struct vmcs *tmp_root; 661e2cf1c9dSEduardo Habkost int width = cpuid_maxphyaddr(); 662daeec979SBandan Das 663daeec979SBandan Das /* 664daeec979SBandan Das * Note- The tests below do not necessarily have a 665daeec979SBandan Das * valid VMCS, but that's ok since the invalid vmcs 666daeec979SBandan Das * is only used for a specific test and is discarded 667daeec979SBandan Das * without touching its contents 668daeec979SBandan Das */ 669daeec979SBandan Das 670daeec979SBandan Das /* Unaligned page access */ 671daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs_root + 1); 672daeec979SBandan Das report("test vmclear with unaligned vmcs", 673daeec979SBandan Das vmcs_clear(tmp_root) == 1); 674daeec979SBandan Das 675daeec979SBandan Das /* gpa bits beyond physical address width are set*/ 676daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs_root | 677daeec979SBandan Das ((u64)1 << (width+1))); 678daeec979SBandan Das report("test vmclear with vmcs address bits set beyond physical address width", 679daeec979SBandan Das vmcs_clear(tmp_root) == 1); 680daeec979SBandan Das 681daeec979SBandan Das /* Pass VMXON region */ 682daeec979SBandan Das tmp_root = (struct vmcs *)vmxon_region; 683daeec979SBandan Das report("test vmclear with vmxon region", 684daeec979SBandan Das vmcs_clear(tmp_root) == 1); 685daeec979SBandan Das 686daeec979SBandan Das /* Valid VMCS */ 687daeec979SBandan Das report("test vmclear with valid vmcs region", vmcs_clear(vmcs_root) == 0); 688daeec979SBandan Das 6892f6828d7SDavid Matlack test_vmclear_flushing(); 6909d7eaa29SArthur Chunqi Li } 6919d7eaa29SArthur Chunqi Li 6929d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) guest_main(void) 6939d7eaa29SArthur Chunqi Li { 694794c67a9SPeter Feiner if (current->v2) 695794c67a9SPeter Feiner v2_guest_main(); 696794c67a9SPeter Feiner else 6979d7eaa29SArthur Chunqi Li current->guest_main(); 6989d7eaa29SArthur Chunqi Li } 6999d7eaa29SArthur Chunqi Li 7009d7eaa29SArthur Chunqi Li /* guest_entry */ 7019d7eaa29SArthur Chunqi Li asm( 7029d7eaa29SArthur Chunqi Li ".align 4, 0x90\n\t" 7039d7eaa29SArthur Chunqi Li ".globl entry_guest\n\t" 7049d7eaa29SArthur Chunqi Li "guest_entry:\n\t" 7059d7eaa29SArthur Chunqi Li " call guest_main\n\t" 7069d7eaa29SArthur Chunqi Li " mov $1, %edi\n\t" 7079d7eaa29SArthur Chunqi Li " call hypercall\n\t" 7089d7eaa29SArthur Chunqi Li ); 7099d7eaa29SArthur Chunqi Li 7106884af61SArthur Chunqi Li /* EPT paging structure related functions */ 71169c531c8SPeter Feiner /* split_large_ept_entry: Split a 2M/1G large page into 512 smaller PTEs. 71269c531c8SPeter Feiner @ptep : large page table entry to split 71369c531c8SPeter Feiner @level : level of ptep (2 or 3) 71469c531c8SPeter Feiner */ 71569c531c8SPeter Feiner static void split_large_ept_entry(unsigned long *ptep, int level) 71669c531c8SPeter Feiner { 71769c531c8SPeter Feiner unsigned long *new_pt; 71869c531c8SPeter Feiner unsigned long gpa; 71969c531c8SPeter Feiner unsigned long pte; 72069c531c8SPeter Feiner unsigned long prototype; 72169c531c8SPeter Feiner int i; 72269c531c8SPeter Feiner 72369c531c8SPeter Feiner pte = *ptep; 72469c531c8SPeter Feiner assert(pte & EPT_PRESENT); 72569c531c8SPeter Feiner assert(pte & EPT_LARGE_PAGE); 72669c531c8SPeter Feiner assert(level == 2 || level == 3); 72769c531c8SPeter Feiner 72869c531c8SPeter Feiner new_pt = alloc_page(); 72969c531c8SPeter Feiner assert(new_pt); 73069c531c8SPeter Feiner memset(new_pt, 0, PAGE_SIZE); 73169c531c8SPeter Feiner 73269c531c8SPeter Feiner prototype = pte & ~EPT_ADDR_MASK; 73369c531c8SPeter Feiner if (level == 2) 73469c531c8SPeter Feiner prototype &= ~EPT_LARGE_PAGE; 73569c531c8SPeter Feiner 73669c531c8SPeter Feiner gpa = pte & EPT_ADDR_MASK; 73769c531c8SPeter Feiner for (i = 0; i < EPT_PGDIR_ENTRIES; i++) { 73869c531c8SPeter Feiner new_pt[i] = prototype | gpa; 73969c531c8SPeter Feiner gpa += 1ul << EPT_LEVEL_SHIFT(level - 1); 74069c531c8SPeter Feiner } 74169c531c8SPeter Feiner 74269c531c8SPeter Feiner pte &= ~EPT_LARGE_PAGE; 74369c531c8SPeter Feiner pte &= ~EPT_ADDR_MASK; 74469c531c8SPeter Feiner pte |= virt_to_phys(new_pt); 74569c531c8SPeter Feiner 74669c531c8SPeter Feiner *ptep = pte; 74769c531c8SPeter Feiner } 74869c531c8SPeter Feiner 7496884af61SArthur Chunqi Li /* install_ept_entry : Install a page to a given level in EPT 7506884af61SArthur Chunqi Li @pml4 : addr of pml4 table 7516884af61SArthur Chunqi Li @pte_level : level of PTE to set 7526884af61SArthur Chunqi Li @guest_addr : physical address of guest 7536884af61SArthur Chunqi Li @pte : pte value to set 7546884af61SArthur Chunqi Li @pt_page : address of page table, NULL for a new page 7556884af61SArthur Chunqi Li */ 7566884af61SArthur Chunqi Li void install_ept_entry(unsigned long *pml4, 7576884af61SArthur Chunqi Li int pte_level, 7586884af61SArthur Chunqi Li unsigned long guest_addr, 7596884af61SArthur Chunqi Li unsigned long pte, 7606884af61SArthur Chunqi Li unsigned long *pt_page) 7616884af61SArthur Chunqi Li { 7626884af61SArthur Chunqi Li int level; 7636884af61SArthur Chunqi Li unsigned long *pt = pml4; 7646884af61SArthur Chunqi Li unsigned offset; 7656884af61SArthur Chunqi Li 766dff740c0SPeter Feiner /* EPT only uses 48 bits of GPA. */ 767dff740c0SPeter Feiner assert(guest_addr < (1ul << 48)); 768dff740c0SPeter Feiner 7696884af61SArthur Chunqi Li for (level = EPT_PAGE_LEVEL; level > pte_level; --level) { 770a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) 7716884af61SArthur Chunqi Li & EPT_PGDIR_MASK; 7726884af61SArthur Chunqi Li if (!(pt[offset] & (EPT_PRESENT))) { 7736884af61SArthur Chunqi Li unsigned long *new_pt = pt_page; 7746884af61SArthur Chunqi Li if (!new_pt) 7756884af61SArthur Chunqi Li new_pt = alloc_page(); 7766884af61SArthur Chunqi Li else 7776884af61SArthur Chunqi Li pt_page = 0; 7786884af61SArthur Chunqi Li memset(new_pt, 0, PAGE_SIZE); 7796884af61SArthur Chunqi Li pt[offset] = virt_to_phys(new_pt) 7806884af61SArthur Chunqi Li | EPT_RA | EPT_WA | EPT_EA; 78169c531c8SPeter Feiner } else if (pt[offset] & EPT_LARGE_PAGE) 78269c531c8SPeter Feiner split_large_ept_entry(&pt[offset], level); 78300b5c590SPeter Feiner pt = phys_to_virt(pt[offset] & EPT_ADDR_MASK); 7846884af61SArthur Chunqi Li } 785a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) & EPT_PGDIR_MASK; 7866884af61SArthur Chunqi Li pt[offset] = pte; 7876884af61SArthur Chunqi Li } 7886884af61SArthur Chunqi Li 7896884af61SArthur Chunqi Li /* Map a page, @perm is the permission of the page */ 7906884af61SArthur Chunqi Li void install_ept(unsigned long *pml4, 7916884af61SArthur Chunqi Li unsigned long phys, 7926884af61SArthur Chunqi Li unsigned long guest_addr, 7936884af61SArthur Chunqi Li u64 perm) 7946884af61SArthur Chunqi Li { 7956884af61SArthur Chunqi Li install_ept_entry(pml4, 1, guest_addr, (phys & PAGE_MASK) | perm, 0); 7966884af61SArthur Chunqi Li } 7976884af61SArthur Chunqi Li 7986884af61SArthur Chunqi Li /* Map a 1G-size page */ 7996884af61SArthur Chunqi Li void install_1g_ept(unsigned long *pml4, 8006884af61SArthur Chunqi Li unsigned long phys, 8016884af61SArthur Chunqi Li unsigned long guest_addr, 8026884af61SArthur Chunqi Li u64 perm) 8036884af61SArthur Chunqi Li { 8046884af61SArthur Chunqi Li install_ept_entry(pml4, 3, guest_addr, 8056884af61SArthur Chunqi Li (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 8066884af61SArthur Chunqi Li } 8076884af61SArthur Chunqi Li 8086884af61SArthur Chunqi Li /* Map a 2M-size page */ 8096884af61SArthur Chunqi Li void install_2m_ept(unsigned long *pml4, 8106884af61SArthur Chunqi Li unsigned long phys, 8116884af61SArthur Chunqi Li unsigned long guest_addr, 8126884af61SArthur Chunqi Li u64 perm) 8136884af61SArthur Chunqi Li { 8146884af61SArthur Chunqi Li install_ept_entry(pml4, 2, guest_addr, 8156884af61SArthur Chunqi Li (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 8166884af61SArthur Chunqi Li } 8176884af61SArthur Chunqi Li 8186884af61SArthur Chunqi Li /* setup_ept_range : Setup a range of 1:1 mapped page to EPT paging structure. 8196884af61SArthur Chunqi Li @start : start address of guest page 8206884af61SArthur Chunqi Li @len : length of address to be mapped 8216884af61SArthur Chunqi Li @map_1g : whether 1G page map is used 8226884af61SArthur Chunqi Li @map_2m : whether 2M page map is used 8236884af61SArthur Chunqi Li @perm : permission for every page 8246884af61SArthur Chunqi Li */ 825b947e241SJan Kiszka void setup_ept_range(unsigned long *pml4, unsigned long start, 8266884af61SArthur Chunqi Li unsigned long len, int map_1g, int map_2m, u64 perm) 8276884af61SArthur Chunqi Li { 8286884af61SArthur Chunqi Li u64 phys = start; 8296884af61SArthur Chunqi Li u64 max = (u64)len + (u64)start; 8306884af61SArthur Chunqi Li 8316884af61SArthur Chunqi Li if (map_1g) { 8326884af61SArthur Chunqi Li while (phys + PAGE_SIZE_1G <= max) { 8336884af61SArthur Chunqi Li install_1g_ept(pml4, phys, phys, perm); 8346884af61SArthur Chunqi Li phys += PAGE_SIZE_1G; 8356884af61SArthur Chunqi Li } 8366884af61SArthur Chunqi Li } 8376884af61SArthur Chunqi Li if (map_2m) { 8386884af61SArthur Chunqi Li while (phys + PAGE_SIZE_2M <= max) { 8396884af61SArthur Chunqi Li install_2m_ept(pml4, phys, phys, perm); 8406884af61SArthur Chunqi Li phys += PAGE_SIZE_2M; 8416884af61SArthur Chunqi Li } 8426884af61SArthur Chunqi Li } 8436884af61SArthur Chunqi Li while (phys + PAGE_SIZE <= max) { 8446884af61SArthur Chunqi Li install_ept(pml4, phys, phys, perm); 8456884af61SArthur Chunqi Li phys += PAGE_SIZE; 8466884af61SArthur Chunqi Li } 8476884af61SArthur Chunqi Li } 8486884af61SArthur Chunqi Li 8496884af61SArthur Chunqi Li /* get_ept_pte : Get the PTE of a given level in EPT, 8506884af61SArthur Chunqi Li @level == 1 means get the latest level*/ 851b4a405c3SRadim Krčmář bool get_ept_pte(unsigned long *pml4, unsigned long guest_addr, int level, 852b4a405c3SRadim Krčmář unsigned long *pte) 8536884af61SArthur Chunqi Li { 8546884af61SArthur Chunqi Li int l; 855b4a405c3SRadim Krčmář unsigned long *pt = pml4, iter_pte; 8566884af61SArthur Chunqi Li unsigned offset; 8576884af61SArthur Chunqi Li 858dff740c0SPeter Feiner assert(level >= 1 && level <= 4); 859dff740c0SPeter Feiner 8602ca6f1f3SPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 861a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 862b4a405c3SRadim Krčmář iter_pte = pt[offset]; 8636884af61SArthur Chunqi Li if (l == level) 8642ca6f1f3SPaolo Bonzini break; 865b4a405c3SRadim Krčmář if (l < 4 && (iter_pte & EPT_LARGE_PAGE)) 866b4a405c3SRadim Krčmář return false; 8678922f1fbSRadim Krčmář if (!(iter_pte & (EPT_PRESENT))) 8688922f1fbSRadim Krčmář return false; 869b4a405c3SRadim Krčmář pt = (unsigned long *)(iter_pte & EPT_ADDR_MASK); 8706884af61SArthur Chunqi Li } 871a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 872b4a405c3SRadim Krčmář if (pte) 873b4a405c3SRadim Krčmář *pte = pt[offset]; 874b4a405c3SRadim Krčmář return true; 8756884af61SArthur Chunqi Li } 8766884af61SArthur Chunqi Li 877521820dbSPaolo Bonzini static void clear_ept_ad_pte(unsigned long *pml4, unsigned long guest_addr) 878521820dbSPaolo Bonzini { 879521820dbSPaolo Bonzini int l; 880521820dbSPaolo Bonzini unsigned long *pt = pml4; 881521820dbSPaolo Bonzini u64 pte; 882521820dbSPaolo Bonzini unsigned offset; 883521820dbSPaolo Bonzini 884521820dbSPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 885521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 886521820dbSPaolo Bonzini pt[offset] &= ~(EPT_ACCESS_FLAG|EPT_DIRTY_FLAG); 887521820dbSPaolo Bonzini pte = pt[offset]; 888521820dbSPaolo Bonzini if (l == 1 || (l < 4 && (pte & EPT_LARGE_PAGE))) 889521820dbSPaolo Bonzini break; 890521820dbSPaolo Bonzini pt = (unsigned long *)(pte & EPT_ADDR_MASK); 891521820dbSPaolo Bonzini } 892521820dbSPaolo Bonzini } 893521820dbSPaolo Bonzini 894521820dbSPaolo Bonzini /* clear_ept_ad : Clear EPT A/D bits for the page table walk and the 895521820dbSPaolo Bonzini final GPA of a guest address. */ 896521820dbSPaolo Bonzini void clear_ept_ad(unsigned long *pml4, u64 guest_cr3, 897521820dbSPaolo Bonzini unsigned long guest_addr) 898521820dbSPaolo Bonzini { 899521820dbSPaolo Bonzini int l; 900521820dbSPaolo Bonzini unsigned long *pt = (unsigned long *)guest_cr3, gpa; 901521820dbSPaolo Bonzini u64 pte, offset_in_page; 902521820dbSPaolo Bonzini unsigned offset; 903521820dbSPaolo Bonzini 904521820dbSPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 905521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 906521820dbSPaolo Bonzini 907521820dbSPaolo Bonzini clear_ept_ad_pte(pml4, (u64) &pt[offset]); 908521820dbSPaolo Bonzini pte = pt[offset]; 909521820dbSPaolo Bonzini if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 910521820dbSPaolo Bonzini break; 911521820dbSPaolo Bonzini if (!(pte & PT_PRESENT_MASK)) 912521820dbSPaolo Bonzini return; 913521820dbSPaolo Bonzini pt = (unsigned long *)(pte & PT_ADDR_MASK); 914521820dbSPaolo Bonzini } 915521820dbSPaolo Bonzini 916521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 917521820dbSPaolo Bonzini offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 918521820dbSPaolo Bonzini gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 919521820dbSPaolo Bonzini clear_ept_ad_pte(pml4, gpa); 920521820dbSPaolo Bonzini } 921521820dbSPaolo Bonzini 922521820dbSPaolo Bonzini /* check_ept_ad : Check the content of EPT A/D bits for the page table 923521820dbSPaolo Bonzini walk and the final GPA of a guest address. */ 924521820dbSPaolo Bonzini void check_ept_ad(unsigned long *pml4, u64 guest_cr3, 925521820dbSPaolo Bonzini unsigned long guest_addr, int expected_gpa_ad, 926521820dbSPaolo Bonzini int expected_pt_ad) 927521820dbSPaolo Bonzini { 928521820dbSPaolo Bonzini int l; 929521820dbSPaolo Bonzini unsigned long *pt = (unsigned long *)guest_cr3, gpa; 930521820dbSPaolo Bonzini u64 ept_pte, pte, offset_in_page; 931521820dbSPaolo Bonzini unsigned offset; 932521820dbSPaolo Bonzini bool bad_pt_ad = false; 933521820dbSPaolo Bonzini 934521820dbSPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 935521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 936521820dbSPaolo Bonzini 937b4a405c3SRadim Krčmář if (!get_ept_pte(pml4, (u64) &pt[offset], 1, &ept_pte)) { 938b4a405c3SRadim Krčmář printf("EPT - guest level %d page table is not mapped.\n", l); 939521820dbSPaolo Bonzini return; 940b4a405c3SRadim Krčmář } 941521820dbSPaolo Bonzini 942521820dbSPaolo Bonzini if (!bad_pt_ad) { 943521820dbSPaolo Bonzini bad_pt_ad |= (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) != expected_pt_ad; 944521820dbSPaolo Bonzini if (bad_pt_ad) 945521820dbSPaolo Bonzini report("EPT - guest level %d page table A=%d/D=%d", 946521820dbSPaolo Bonzini false, l, 947521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_ACCESS_FLAG), 948521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_DIRTY_FLAG)); 949521820dbSPaolo Bonzini } 950521820dbSPaolo Bonzini 951521820dbSPaolo Bonzini pte = pt[offset]; 952521820dbSPaolo Bonzini if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 953521820dbSPaolo Bonzini break; 954521820dbSPaolo Bonzini if (!(pte & PT_PRESENT_MASK)) 955521820dbSPaolo Bonzini return; 956521820dbSPaolo Bonzini pt = (unsigned long *)(pte & PT_ADDR_MASK); 957521820dbSPaolo Bonzini } 958521820dbSPaolo Bonzini 959521820dbSPaolo Bonzini if (!bad_pt_ad) 960521820dbSPaolo Bonzini report("EPT - guest page table structures A=%d/D=%d", 961521820dbSPaolo Bonzini true, 962521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_ACCESS_FLAG), 963521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_DIRTY_FLAG)); 964521820dbSPaolo Bonzini 965521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 966521820dbSPaolo Bonzini offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 967521820dbSPaolo Bonzini gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 968521820dbSPaolo Bonzini 969b4a405c3SRadim Krčmář if (!get_ept_pte(pml4, gpa, 1, &ept_pte)) { 970b4a405c3SRadim Krčmář report("EPT - guest physical address is not mapped", false); 971b4a405c3SRadim Krčmář return; 972b4a405c3SRadim Krčmář } 973521820dbSPaolo Bonzini report("EPT - guest physical address A=%d/D=%d", 974521820dbSPaolo Bonzini (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) == expected_gpa_ad, 975521820dbSPaolo Bonzini !!(expected_gpa_ad & EPT_ACCESS_FLAG), 976521820dbSPaolo Bonzini !!(expected_gpa_ad & EPT_DIRTY_FLAG)); 977521820dbSPaolo Bonzini } 978521820dbSPaolo Bonzini 979521820dbSPaolo Bonzini 9802f888fccSBandan Das void ept_sync(int type, u64 eptp) 9812f888fccSBandan Das { 9822f888fccSBandan Das switch (type) { 9832f888fccSBandan Das case INVEPT_SINGLE: 9842f888fccSBandan Das if (ept_vpid.val & EPT_CAP_INVEPT_SINGLE) { 9852f888fccSBandan Das invept(INVEPT_SINGLE, eptp); 9862f888fccSBandan Das break; 9872f888fccSBandan Das } 9882f888fccSBandan Das /* else fall through */ 9892f888fccSBandan Das case INVEPT_GLOBAL: 9902f888fccSBandan Das if (ept_vpid.val & EPT_CAP_INVEPT_ALL) { 9912f888fccSBandan Das invept(INVEPT_GLOBAL, eptp); 9922f888fccSBandan Das break; 9932f888fccSBandan Das } 9942f888fccSBandan Das /* else fall through */ 9952f888fccSBandan Das default: 9962f888fccSBandan Das printf("WARNING: invept is not supported!\n"); 9972f888fccSBandan Das } 9982f888fccSBandan Das } 9992f888fccSBandan Das 1000dff740c0SPeter Feiner void set_ept_pte(unsigned long *pml4, unsigned long guest_addr, 10016884af61SArthur Chunqi Li int level, u64 pte_val) 10026884af61SArthur Chunqi Li { 10036884af61SArthur Chunqi Li int l; 10046884af61SArthur Chunqi Li unsigned long *pt = pml4; 10056884af61SArthur Chunqi Li unsigned offset; 10066884af61SArthur Chunqi Li 1007dff740c0SPeter Feiner assert(level >= 1 && level <= 4); 1008dff740c0SPeter Feiner 10092ca6f1f3SPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 1010a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 10112ca6f1f3SPaolo Bonzini if (l == level) 10122ca6f1f3SPaolo Bonzini break; 1013dff740c0SPeter Feiner assert(pt[offset] & EPT_PRESENT); 101400b5c590SPeter Feiner pt = (unsigned long *)(pt[offset] & EPT_ADDR_MASK); 10156884af61SArthur Chunqi Li } 1016a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 10176884af61SArthur Chunqi Li pt[offset] = pte_val; 10186884af61SArthur Chunqi Li } 10196884af61SArthur Chunqi Li 10208ab53b95SPeter Feiner bool ept_2m_supported(void) 10218ab53b95SPeter Feiner { 10228ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_2M_PAGE; 10238ab53b95SPeter Feiner } 10248ab53b95SPeter Feiner 10258ab53b95SPeter Feiner bool ept_1g_supported(void) 10268ab53b95SPeter Feiner { 10278ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_1G_PAGE; 10288ab53b95SPeter Feiner } 10298ab53b95SPeter Feiner 10308ab53b95SPeter Feiner bool ept_huge_pages_supported(int level) 10318ab53b95SPeter Feiner { 10328ab53b95SPeter Feiner if (level == 2) 10338ab53b95SPeter Feiner return ept_2m_supported(); 10348ab53b95SPeter Feiner else if (level == 3) 10358ab53b95SPeter Feiner return ept_1g_supported(); 10368ab53b95SPeter Feiner else 10378ab53b95SPeter Feiner return false; 10388ab53b95SPeter Feiner } 10398ab53b95SPeter Feiner 10408ab53b95SPeter Feiner bool ept_execute_only_supported(void) 10418ab53b95SPeter Feiner { 10428ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_WT; 10438ab53b95SPeter Feiner } 10448ab53b95SPeter Feiner 10458ab53b95SPeter Feiner bool ept_ad_bits_supported(void) 10468ab53b95SPeter Feiner { 10478ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_AD_FLAG; 10488ab53b95SPeter Feiner } 10498ab53b95SPeter Feiner 1050b093c6ceSWanpeng Li void vpid_sync(int type, u16 vpid) 1051b093c6ceSWanpeng Li { 1052b093c6ceSWanpeng Li switch(type) { 1053aedfd771SJim Mattson case INVVPID_CONTEXT_GLOBAL: 1054aedfd771SJim Mattson if (ept_vpid.val & VPID_CAP_INVVPID_CXTGLB) { 1055aedfd771SJim Mattson invvpid(INVVPID_CONTEXT_GLOBAL, vpid, 0); 1056b093c6ceSWanpeng Li break; 1057b093c6ceSWanpeng Li } 1058b093c6ceSWanpeng Li case INVVPID_ALL: 1059b093c6ceSWanpeng Li if (ept_vpid.val & VPID_CAP_INVVPID_ALL) { 1060b093c6ceSWanpeng Li invvpid(INVVPID_ALL, vpid, 0); 1061b093c6ceSWanpeng Li break; 1062b093c6ceSWanpeng Li } 1063b093c6ceSWanpeng Li default: 1064b093c6ceSWanpeng Li printf("WARNING: invvpid is not supported\n"); 1065b093c6ceSWanpeng Li } 1066b093c6ceSWanpeng Li } 10676884af61SArthur Chunqi Li 10689d7eaa29SArthur Chunqi Li static void init_vmcs_ctrl(void) 10699d7eaa29SArthur Chunqi Li { 10709d7eaa29SArthur Chunqi Li /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 10719d7eaa29SArthur Chunqi Li /* 26.2.1.1 */ 10729d7eaa29SArthur Chunqi Li vmcs_write(PIN_CONTROLS, ctrl_pin); 10739d7eaa29SArthur Chunqi Li /* Disable VMEXIT of IO instruction */ 10749d7eaa29SArthur Chunqi Li vmcs_write(CPU_EXEC_CTRL0, ctrl_cpu[0]); 10759d7eaa29SArthur Chunqi Li if (ctrl_cpu_rev[0].set & CPU_SECONDARY) { 10766884af61SArthur Chunqi Li ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) & 10776884af61SArthur Chunqi Li ctrl_cpu_rev[1].clr; 10789d7eaa29SArthur Chunqi Li vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu[1]); 10799d7eaa29SArthur Chunqi Li } 10809d7eaa29SArthur Chunqi Li vmcs_write(CR3_TARGET_COUNT, 0); 10819d7eaa29SArthur Chunqi Li vmcs_write(VPID, ++vpid_cnt); 10829d7eaa29SArthur Chunqi Li } 10839d7eaa29SArthur Chunqi Li 10849d7eaa29SArthur Chunqi Li static void init_vmcs_host(void) 10859d7eaa29SArthur Chunqi Li { 10869d7eaa29SArthur Chunqi Li /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 10879d7eaa29SArthur Chunqi Li /* 26.2.1.2 */ 10889d7eaa29SArthur Chunqi Li vmcs_write(HOST_EFER, rdmsr(MSR_EFER)); 10899d7eaa29SArthur Chunqi Li 10909d7eaa29SArthur Chunqi Li /* 26.2.1.3 */ 10919d7eaa29SArthur Chunqi Li vmcs_write(ENT_CONTROLS, ctrl_enter); 10929d7eaa29SArthur Chunqi Li vmcs_write(EXI_CONTROLS, ctrl_exit); 10939d7eaa29SArthur Chunqi Li 10949d7eaa29SArthur Chunqi Li /* 26.2.2 */ 10959d7eaa29SArthur Chunqi Li vmcs_write(HOST_CR0, read_cr0()); 10969d7eaa29SArthur Chunqi Li vmcs_write(HOST_CR3, read_cr3()); 10979d7eaa29SArthur Chunqi Li vmcs_write(HOST_CR4, read_cr4()); 10989d7eaa29SArthur Chunqi Li vmcs_write(HOST_SYSENTER_EIP, (u64)(&entry_sysenter)); 109969d8fe0eSPaolo Bonzini vmcs_write(HOST_SYSENTER_CS, KERNEL_CS); 11009d7eaa29SArthur Chunqi Li 11019d7eaa29SArthur Chunqi Li /* 26.2.3 */ 110269d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_CS, KERNEL_CS); 110369d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_SS, KERNEL_DS); 110469d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_DS, KERNEL_DS); 110569d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_ES, KERNEL_DS); 110669d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_FS, KERNEL_DS); 110769d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_GS, KERNEL_DS); 110869d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_TR, TSS_MAIN); 1109337166aaSJan Kiszka vmcs_write(HOST_BASE_TR, tss_descr.base); 1110337166aaSJan Kiszka vmcs_write(HOST_BASE_GDTR, gdt64_desc.base); 1111337166aaSJan Kiszka vmcs_write(HOST_BASE_IDTR, idt_descr.base); 11129d7eaa29SArthur Chunqi Li vmcs_write(HOST_BASE_FS, 0); 11139d7eaa29SArthur Chunqi Li vmcs_write(HOST_BASE_GS, 0); 11149d7eaa29SArthur Chunqi Li 11159d7eaa29SArthur Chunqi Li /* Set other vmcs area */ 11169d7eaa29SArthur Chunqi Li vmcs_write(PF_ERROR_MASK, 0); 11179d7eaa29SArthur Chunqi Li vmcs_write(PF_ERROR_MATCH, 0); 11189d7eaa29SArthur Chunqi Li vmcs_write(VMCS_LINK_PTR, ~0ul); 11199d7eaa29SArthur Chunqi Li vmcs_write(VMCS_LINK_PTR_HI, ~0ul); 11209d7eaa29SArthur Chunqi Li vmcs_write(HOST_RIP, (u64)(&vmx_return)); 11219d7eaa29SArthur Chunqi Li } 11229d7eaa29SArthur Chunqi Li 11239d7eaa29SArthur Chunqi Li static void init_vmcs_guest(void) 11249d7eaa29SArthur Chunqi Li { 11259d7eaa29SArthur Chunqi Li /* 26.3 CHECKING AND LOADING GUEST STATE */ 11269d7eaa29SArthur Chunqi Li ulong guest_cr0, guest_cr4, guest_cr3; 11279d7eaa29SArthur Chunqi Li /* 26.3.1.1 */ 11289d7eaa29SArthur Chunqi Li guest_cr0 = read_cr0(); 11299d7eaa29SArthur Chunqi Li guest_cr4 = read_cr4(); 11309d7eaa29SArthur Chunqi Li guest_cr3 = read_cr3(); 11319d7eaa29SArthur Chunqi Li if (ctrl_enter & ENT_GUEST_64) { 11329d7eaa29SArthur Chunqi Li guest_cr0 |= X86_CR0_PG; 11339d7eaa29SArthur Chunqi Li guest_cr4 |= X86_CR4_PAE; 11349d7eaa29SArthur Chunqi Li } 11359d7eaa29SArthur Chunqi Li if ((ctrl_enter & ENT_GUEST_64) == 0) 11369d7eaa29SArthur Chunqi Li guest_cr4 &= (~X86_CR4_PCIDE); 11379d7eaa29SArthur Chunqi Li if (guest_cr0 & X86_CR0_PG) 11389d7eaa29SArthur Chunqi Li guest_cr0 |= X86_CR0_PE; 11399d7eaa29SArthur Chunqi Li vmcs_write(GUEST_CR0, guest_cr0); 11409d7eaa29SArthur Chunqi Li vmcs_write(GUEST_CR3, guest_cr3); 11419d7eaa29SArthur Chunqi Li vmcs_write(GUEST_CR4, guest_cr4); 114269d8fe0eSPaolo Bonzini vmcs_write(GUEST_SYSENTER_CS, KERNEL_CS); 11439d7eaa29SArthur Chunqi Li vmcs_write(GUEST_SYSENTER_ESP, 11449d7eaa29SArthur Chunqi Li (u64)(guest_syscall_stack + PAGE_SIZE - 1)); 11459d7eaa29SArthur Chunqi Li vmcs_write(GUEST_SYSENTER_EIP, (u64)(&entry_sysenter)); 11469d7eaa29SArthur Chunqi Li vmcs_write(GUEST_DR7, 0); 11479d7eaa29SArthur Chunqi Li vmcs_write(GUEST_EFER, rdmsr(MSR_EFER)); 11489d7eaa29SArthur Chunqi Li 11499d7eaa29SArthur Chunqi Li /* 26.3.1.2 */ 115069d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_CS, KERNEL_CS); 115169d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_SS, KERNEL_DS); 115269d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_DS, KERNEL_DS); 115369d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_ES, KERNEL_DS); 115469d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_FS, KERNEL_DS); 115569d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_GS, KERNEL_DS); 115669d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_TR, TSS_MAIN); 11579d7eaa29SArthur Chunqi Li vmcs_write(GUEST_SEL_LDTR, 0); 11589d7eaa29SArthur Chunqi Li 11599d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_CS, 0); 11609d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_ES, 0); 11619d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_SS, 0); 11629d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_DS, 0); 11639d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_FS, 0); 11649d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_GS, 0); 1165337166aaSJan Kiszka vmcs_write(GUEST_BASE_TR, tss_descr.base); 11669d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_LDTR, 0); 11679d7eaa29SArthur Chunqi Li 11689d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_CS, 0xFFFFFFFF); 11699d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_DS, 0xFFFFFFFF); 11709d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_ES, 0xFFFFFFFF); 11719d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_SS, 0xFFFFFFFF); 11729d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_FS, 0xFFFFFFFF); 11739d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_GS, 0xFFFFFFFF); 11749d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_LDTR, 0xffff); 1175337166aaSJan Kiszka vmcs_write(GUEST_LIMIT_TR, tss_descr.limit); 11769d7eaa29SArthur Chunqi Li 11779d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_CS, 0xa09b); 11789d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_DS, 0xc093); 11799d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_ES, 0xc093); 11809d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_FS, 0xc093); 11819d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_GS, 0xc093); 11829d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_SS, 0xc093); 11839d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_LDTR, 0x82); 11849d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_TR, 0x8b); 11859d7eaa29SArthur Chunqi Li 11869d7eaa29SArthur Chunqi Li /* 26.3.1.3 */ 1187337166aaSJan Kiszka vmcs_write(GUEST_BASE_GDTR, gdt64_desc.base); 1188337166aaSJan Kiszka vmcs_write(GUEST_BASE_IDTR, idt_descr.base); 1189337166aaSJan Kiszka vmcs_write(GUEST_LIMIT_GDTR, gdt64_desc.limit); 1190337166aaSJan Kiszka vmcs_write(GUEST_LIMIT_IDTR, idt_descr.limit); 11919d7eaa29SArthur Chunqi Li 11929d7eaa29SArthur Chunqi Li /* 26.3.1.4 */ 11939d7eaa29SArthur Chunqi Li vmcs_write(GUEST_RIP, (u64)(&guest_entry)); 11949d7eaa29SArthur Chunqi Li vmcs_write(GUEST_RSP, (u64)(guest_stack + PAGE_SIZE - 1)); 11959d7eaa29SArthur Chunqi Li vmcs_write(GUEST_RFLAGS, 0x2); 11969d7eaa29SArthur Chunqi Li 11979d7eaa29SArthur Chunqi Li /* 26.3.1.5 */ 119817ba0dd0SJan Kiszka vmcs_write(GUEST_ACTV_STATE, ACTV_ACTIVE); 11999d7eaa29SArthur Chunqi Li vmcs_write(GUEST_INTR_STATE, 0); 12009d7eaa29SArthur Chunqi Li } 12019d7eaa29SArthur Chunqi Li 12029d7eaa29SArthur Chunqi Li static int init_vmcs(struct vmcs **vmcs) 12039d7eaa29SArthur Chunqi Li { 12049d7eaa29SArthur Chunqi Li *vmcs = alloc_page(); 12059d7eaa29SArthur Chunqi Li memset(*vmcs, 0, PAGE_SIZE); 1206*6c0ba6e7SLiran Alon (*vmcs)->hdr.revision_id = basic.revision; 12079d7eaa29SArthur Chunqi Li /* vmclear first to init vmcs */ 12089d7eaa29SArthur Chunqi Li if (vmcs_clear(*vmcs)) { 12099d7eaa29SArthur Chunqi Li printf("%s : vmcs_clear error\n", __func__); 12109d7eaa29SArthur Chunqi Li return 1; 12119d7eaa29SArthur Chunqi Li } 12129d7eaa29SArthur Chunqi Li 12139d7eaa29SArthur Chunqi Li if (make_vmcs_current(*vmcs)) { 12149d7eaa29SArthur Chunqi Li printf("%s : make_vmcs_current error\n", __func__); 12159d7eaa29SArthur Chunqi Li return 1; 12169d7eaa29SArthur Chunqi Li } 12179d7eaa29SArthur Chunqi Li 12189d7eaa29SArthur Chunqi Li /* All settings to pin/exit/enter/cpu 12199d7eaa29SArthur Chunqi Li control fields should be placed here */ 12209d7eaa29SArthur Chunqi Li ctrl_pin |= PIN_EXTINT | PIN_NMI | PIN_VIRT_NMI; 12219d7eaa29SArthur Chunqi Li ctrl_exit = EXI_LOAD_EFER | EXI_HOST_64; 12229d7eaa29SArthur Chunqi Li ctrl_enter = (ENT_LOAD_EFER | ENT_GUEST_64); 12239d7eaa29SArthur Chunqi Li /* DIsable IO instruction VMEXIT now */ 12249d7eaa29SArthur Chunqi Li ctrl_cpu[0] &= (~(CPU_IO | CPU_IO_BITMAP)); 12259d7eaa29SArthur Chunqi Li ctrl_cpu[1] = 0; 12269d7eaa29SArthur Chunqi Li 12279d7eaa29SArthur Chunqi Li ctrl_pin = (ctrl_pin | ctrl_pin_rev.set) & ctrl_pin_rev.clr; 12289d7eaa29SArthur Chunqi Li ctrl_enter = (ctrl_enter | ctrl_enter_rev.set) & ctrl_enter_rev.clr; 12299d7eaa29SArthur Chunqi Li ctrl_exit = (ctrl_exit | ctrl_exit_rev.set) & ctrl_exit_rev.clr; 12309d7eaa29SArthur Chunqi Li ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr; 12319d7eaa29SArthur Chunqi Li 12329d7eaa29SArthur Chunqi Li init_vmcs_ctrl(); 12339d7eaa29SArthur Chunqi Li init_vmcs_host(); 12349d7eaa29SArthur Chunqi Li init_vmcs_guest(); 12359d7eaa29SArthur Chunqi Li return 0; 12369d7eaa29SArthur Chunqi Li } 12379d7eaa29SArthur Chunqi Li 12389d7eaa29SArthur Chunqi Li static void init_vmx(void) 12399d7eaa29SArthur Chunqi Li { 12403ee34093SArthur Chunqi Li ulong fix_cr0_set, fix_cr0_clr; 12413ee34093SArthur Chunqi Li ulong fix_cr4_set, fix_cr4_clr; 12423ee34093SArthur Chunqi Li 12439d7eaa29SArthur Chunqi Li vmxon_region = alloc_page(); 12449d7eaa29SArthur Chunqi Li memset(vmxon_region, 0, PAGE_SIZE); 12459d7eaa29SArthur Chunqi Li 12469d7eaa29SArthur Chunqi Li fix_cr0_set = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 12479d7eaa29SArthur Chunqi Li fix_cr0_clr = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 12489d7eaa29SArthur Chunqi Li fix_cr4_set = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 12499d7eaa29SArthur Chunqi Li fix_cr4_clr = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 12509d7eaa29SArthur Chunqi Li basic.val = rdmsr(MSR_IA32_VMX_BASIC); 12519d7eaa29SArthur Chunqi Li ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PIN 12529d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_PINBASED_CTLS); 12539d7eaa29SArthur Chunqi Li ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT 12549d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_EXIT_CTLS); 12559d7eaa29SArthur Chunqi Li ctrl_enter_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_ENTRY 12569d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_ENTRY_CTLS); 12579d7eaa29SArthur Chunqi Li ctrl_cpu_rev[0].val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PROC 12589d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_PROCBASED_CTLS); 12596884af61SArthur Chunqi Li if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0) 12609d7eaa29SArthur Chunqi Li ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2); 12616884af61SArthur Chunqi Li else 12626884af61SArthur Chunqi Li ctrl_cpu_rev[1].val = 0; 12636884af61SArthur Chunqi Li if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0) 12649d7eaa29SArthur Chunqi Li ept_vpid.val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 12656884af61SArthur Chunqi Li else 12666884af61SArthur Chunqi Li ept_vpid.val = 0; 12679d7eaa29SArthur Chunqi Li 12689d7eaa29SArthur Chunqi Li write_cr0((read_cr0() & fix_cr0_clr) | fix_cr0_set); 12699d7eaa29SArthur Chunqi Li write_cr4((read_cr4() & fix_cr4_clr) | fix_cr4_set | X86_CR4_VMXE); 12709d7eaa29SArthur Chunqi Li 12719d7eaa29SArthur Chunqi Li *vmxon_region = basic.revision; 12729d7eaa29SArthur Chunqi Li 12739d7eaa29SArthur Chunqi Li guest_stack = alloc_page(); 12749d7eaa29SArthur Chunqi Li memset(guest_stack, 0, PAGE_SIZE); 12759d7eaa29SArthur Chunqi Li guest_syscall_stack = alloc_page(); 12769d7eaa29SArthur Chunqi Li memset(guest_syscall_stack, 0, PAGE_SIZE); 12779d7eaa29SArthur Chunqi Li } 12789d7eaa29SArthur Chunqi Li 1279e3f363c4SJan Kiszka static void do_vmxon_off(void *data) 12809d7eaa29SArthur Chunqi Li { 12813b127446SJan Kiszka vmx_on(); 12823b127446SJan Kiszka vmx_off(); 128303f37ef2SPaolo Bonzini } 12843b127446SJan Kiszka 1285e3f363c4SJan Kiszka static void do_write_feature_control(void *data) 12863b127446SJan Kiszka { 12873b127446SJan Kiszka wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 128803f37ef2SPaolo Bonzini } 12893b127446SJan Kiszka 12903b127446SJan Kiszka static int test_vmx_feature_control(void) 12913b127446SJan Kiszka { 12923b127446SJan Kiszka u64 ia32_feature_control; 12933b127446SJan Kiszka bool vmx_enabled; 12943b127446SJan Kiszka 12953b127446SJan Kiszka ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); 12963b127446SJan Kiszka vmx_enabled = ((ia32_feature_control & 0x5) == 0x5); 12973b127446SJan Kiszka if ((ia32_feature_control & 0x5) == 0x5) { 12983b127446SJan Kiszka printf("VMX enabled and locked by BIOS\n"); 12993b127446SJan Kiszka return 0; 13003b127446SJan Kiszka } else if (ia32_feature_control & 0x1) { 13013b127446SJan Kiszka printf("ERROR: VMX locked out by BIOS!?\n"); 13023b127446SJan Kiszka return 1; 13033b127446SJan Kiszka } 13043b127446SJan Kiszka 13053b127446SJan Kiszka wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 13063b127446SJan Kiszka report("test vmxon with FEATURE_CONTROL cleared", 1307e3f363c4SJan Kiszka test_for_exception(GP_VECTOR, &do_vmxon_off, NULL)); 13083b127446SJan Kiszka 13093b127446SJan Kiszka wrmsr(MSR_IA32_FEATURE_CONTROL, 0x4); 13103b127446SJan Kiszka report("test vmxon without FEATURE_CONTROL lock", 1311e3f363c4SJan Kiszka test_for_exception(GP_VECTOR, &do_vmxon_off, NULL)); 13123b127446SJan Kiszka 13133b127446SJan Kiszka wrmsr(MSR_IA32_FEATURE_CONTROL, 0x5); 13143b127446SJan Kiszka vmx_enabled = ((rdmsr(MSR_IA32_FEATURE_CONTROL) & 0x5) == 0x5); 13153b127446SJan Kiszka report("test enable VMX in FEATURE_CONTROL", vmx_enabled); 13163b127446SJan Kiszka 13173b127446SJan Kiszka report("test FEATURE_CONTROL lock bit", 1318e3f363c4SJan Kiszka test_for_exception(GP_VECTOR, &do_write_feature_control, NULL)); 13193b127446SJan Kiszka 13203b127446SJan Kiszka return !vmx_enabled; 13219d7eaa29SArthur Chunqi Li } 13229d7eaa29SArthur Chunqi Li 13239d7eaa29SArthur Chunqi Li static int test_vmxon(void) 13249d7eaa29SArthur Chunqi Li { 1325ce21d809SBandan Das int ret, ret1; 1326ce21d809SBandan Das u64 *tmp_region = vmxon_region; 1327e2cf1c9dSEduardo Habkost int width = cpuid_maxphyaddr(); 13289d7eaa29SArthur Chunqi Li 1329ce21d809SBandan Das /* Unaligned page access */ 1330ce21d809SBandan Das vmxon_region = (u64 *)((intptr_t)vmxon_region + 1); 1331ce21d809SBandan Das ret1 = vmx_on(); 1332ce21d809SBandan Das report("test vmxon with unaligned vmxon region", ret1); 1333ce21d809SBandan Das if (!ret1) { 1334ce21d809SBandan Das ret = 1; 1335ce21d809SBandan Das goto out; 1336ce21d809SBandan Das } 1337ce21d809SBandan Das 1338ce21d809SBandan Das /* gpa bits beyond physical address width are set*/ 1339ce21d809SBandan Das vmxon_region = (u64 *)((intptr_t)tmp_region | ((u64)1 << (width+1))); 1340ce21d809SBandan Das ret1 = vmx_on(); 1341ce21d809SBandan Das report("test vmxon with bits set beyond physical address width", ret1); 1342ce21d809SBandan Das if (!ret1) { 1343ce21d809SBandan Das ret = 1; 1344ce21d809SBandan Das goto out; 1345ce21d809SBandan Das } 1346ce21d809SBandan Das 1347ce21d809SBandan Das /* invalid revision indentifier */ 1348ce21d809SBandan Das vmxon_region = tmp_region; 1349ce21d809SBandan Das *vmxon_region = 0xba9da9; 1350ce21d809SBandan Das ret1 = vmx_on(); 1351ce21d809SBandan Das report("test vmxon with invalid revision identifier", ret1); 1352ce21d809SBandan Das if (!ret1) { 1353ce21d809SBandan Das ret = 1; 1354ce21d809SBandan Das goto out; 1355ce21d809SBandan Das } 1356ce21d809SBandan Das 1357ce21d809SBandan Das /* and finally a valid region */ 1358ce21d809SBandan Das *vmxon_region = basic.revision; 13599d7eaa29SArthur Chunqi Li ret = vmx_on(); 1360ce21d809SBandan Das report("test vmxon with valid vmxon region", !ret); 1361ce21d809SBandan Das 1362ce21d809SBandan Das out: 13639d7eaa29SArthur Chunqi Li return ret; 13649d7eaa29SArthur Chunqi Li } 13659d7eaa29SArthur Chunqi Li 13669d7eaa29SArthur Chunqi Li static void test_vmptrld(void) 13679d7eaa29SArthur Chunqi Li { 1368daeec979SBandan Das struct vmcs *vmcs, *tmp_root; 1369e2cf1c9dSEduardo Habkost int width = cpuid_maxphyaddr(); 13709d7eaa29SArthur Chunqi Li 13719d7eaa29SArthur Chunqi Li vmcs = alloc_page(); 1372*6c0ba6e7SLiran Alon vmcs->hdr.revision_id = basic.revision; 1373daeec979SBandan Das 1374daeec979SBandan Das /* Unaligned page access */ 1375daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs + 1); 1376daeec979SBandan Das report("test vmptrld with unaligned vmcs", 13779c305952SPaolo Bonzini make_vmcs_current(tmp_root) == 1); 1378daeec979SBandan Das 1379daeec979SBandan Das /* gpa bits beyond physical address width are set*/ 1380daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs | 1381daeec979SBandan Das ((u64)1 << (width+1))); 1382daeec979SBandan Das report("test vmptrld with vmcs address bits set beyond physical address width", 13839c305952SPaolo Bonzini make_vmcs_current(tmp_root) == 1); 1384daeec979SBandan Das 1385daeec979SBandan Das /* Pass VMXON region */ 1386799a84f8SGanShun make_vmcs_current(vmcs); 1387daeec979SBandan Das tmp_root = (struct vmcs *)vmxon_region; 1388daeec979SBandan Das report("test vmptrld with vmxon region", 13899c305952SPaolo Bonzini make_vmcs_current(tmp_root) == 1); 1390799a84f8SGanShun report("test vmptrld with vmxon region vm-instruction error", 1391799a84f8SGanShun vmcs_read(VMX_INST_ERROR) == VMXERR_VMPTRLD_VMXON_POINTER); 1392daeec979SBandan Das 1393daeec979SBandan Das report("test vmptrld with valid vmcs region", make_vmcs_current(vmcs) == 0); 13949d7eaa29SArthur Chunqi Li } 13959d7eaa29SArthur Chunqi Li 13969d7eaa29SArthur Chunqi Li static void test_vmptrst(void) 13979d7eaa29SArthur Chunqi Li { 13989d7eaa29SArthur Chunqi Li int ret; 13999d7eaa29SArthur Chunqi Li struct vmcs *vmcs1, *vmcs2; 14009d7eaa29SArthur Chunqi Li 14019d7eaa29SArthur Chunqi Li vmcs1 = alloc_page(); 14029d7eaa29SArthur Chunqi Li memset(vmcs1, 0, PAGE_SIZE); 14039d7eaa29SArthur Chunqi Li init_vmcs(&vmcs1); 14049d7eaa29SArthur Chunqi Li ret = vmcs_save(&vmcs2); 14059d7eaa29SArthur Chunqi Li report("test vmptrst", (!ret) && (vmcs1 == vmcs2)); 14069d7eaa29SArthur Chunqi Li } 14079d7eaa29SArthur Chunqi Li 140869c8d31cSJan Kiszka struct vmx_ctl_msr { 140969c8d31cSJan Kiszka const char *name; 141069c8d31cSJan Kiszka u32 index, true_index; 141169c8d31cSJan Kiszka u32 default1; 141269c8d31cSJan Kiszka } vmx_ctl_msr[] = { 141369c8d31cSJan Kiszka { "MSR_IA32_VMX_PINBASED_CTLS", MSR_IA32_VMX_PINBASED_CTLS, 141469c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_PIN, 0x16 }, 141569c8d31cSJan Kiszka { "MSR_IA32_VMX_PROCBASED_CTLS", MSR_IA32_VMX_PROCBASED_CTLS, 141669c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_PROC, 0x401e172 }, 141769c8d31cSJan Kiszka { "MSR_IA32_VMX_PROCBASED_CTLS2", MSR_IA32_VMX_PROCBASED_CTLS2, 141869c8d31cSJan Kiszka MSR_IA32_VMX_PROCBASED_CTLS2, 0 }, 141969c8d31cSJan Kiszka { "MSR_IA32_VMX_EXIT_CTLS", MSR_IA32_VMX_EXIT_CTLS, 142069c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_EXIT, 0x36dff }, 142169c8d31cSJan Kiszka { "MSR_IA32_VMX_ENTRY_CTLS", MSR_IA32_VMX_ENTRY_CTLS, 142269c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_ENTRY, 0x11ff }, 142369c8d31cSJan Kiszka }; 142469c8d31cSJan Kiszka 142569c8d31cSJan Kiszka static void test_vmx_caps(void) 142669c8d31cSJan Kiszka { 142769c8d31cSJan Kiszka u64 val, default1, fixed0, fixed1; 142869c8d31cSJan Kiszka union vmx_ctrl_msr ctrl, true_ctrl; 142969c8d31cSJan Kiszka unsigned int n; 143069c8d31cSJan Kiszka bool ok; 143169c8d31cSJan Kiszka 143269c8d31cSJan Kiszka printf("\nTest suite: VMX capability reporting\n"); 143369c8d31cSJan Kiszka 143469c8d31cSJan Kiszka report("MSR_IA32_VMX_BASIC", 143569c8d31cSJan Kiszka (basic.revision & (1ul << 31)) == 0 && 143669c8d31cSJan Kiszka basic.size > 0 && basic.size <= 4096 && 143769c8d31cSJan Kiszka (basic.type == 0 || basic.type == 6) && 143869c8d31cSJan Kiszka basic.reserved1 == 0 && basic.reserved2 == 0); 143969c8d31cSJan Kiszka 144069c8d31cSJan Kiszka val = rdmsr(MSR_IA32_VMX_MISC); 144169c8d31cSJan Kiszka report("MSR_IA32_VMX_MISC", 144269c8d31cSJan Kiszka (!(ctrl_cpu_rev[1].clr & CPU_URG) || val & (1ul << 5)) && 144369c8d31cSJan Kiszka ((val >> 16) & 0x1ff) <= 256 && 144469c8d31cSJan Kiszka (val & 0xc0007e00) == 0); 144569c8d31cSJan Kiszka 144669c8d31cSJan Kiszka for (n = 0; n < ARRAY_SIZE(vmx_ctl_msr); n++) { 144769c8d31cSJan Kiszka ctrl.val = rdmsr(vmx_ctl_msr[n].index); 144869c8d31cSJan Kiszka default1 = vmx_ctl_msr[n].default1; 144969c8d31cSJan Kiszka ok = (ctrl.set & default1) == default1; 145069c8d31cSJan Kiszka ok = ok && (ctrl.set & ~ctrl.clr) == 0; 145169c8d31cSJan Kiszka if (ok && basic.ctrl) { 145269c8d31cSJan Kiszka true_ctrl.val = rdmsr(vmx_ctl_msr[n].true_index); 145369c8d31cSJan Kiszka ok = ctrl.clr == true_ctrl.clr; 145469c8d31cSJan Kiszka ok = ok && ctrl.set == (true_ctrl.set | default1); 145569c8d31cSJan Kiszka } 1456dd3de932SDavid Matlack report("%s", ok, vmx_ctl_msr[n].name); 145769c8d31cSJan Kiszka } 145869c8d31cSJan Kiszka 145969c8d31cSJan Kiszka fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 146069c8d31cSJan Kiszka fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 146169c8d31cSJan Kiszka report("MSR_IA32_VMX_IA32_VMX_CR0_FIXED0/1", 146269c8d31cSJan Kiszka ((fixed0 ^ fixed1) & ~fixed1) == 0); 146369c8d31cSJan Kiszka 146469c8d31cSJan Kiszka fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 146569c8d31cSJan Kiszka fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 146669c8d31cSJan Kiszka report("MSR_IA32_VMX_IA32_VMX_CR4_FIXED0/1", 146769c8d31cSJan Kiszka ((fixed0 ^ fixed1) & ~fixed1) == 0); 146869c8d31cSJan Kiszka 146969c8d31cSJan Kiszka val = rdmsr(MSR_IA32_VMX_VMCS_ENUM); 147069c8d31cSJan Kiszka report("MSR_IA32_VMX_VMCS_ENUM", 147169c8d31cSJan Kiszka (val & 0x3e) >= 0x2a && 147269c8d31cSJan Kiszka (val & 0xfffffffffffffc01Ull) == 0); 147369c8d31cSJan Kiszka 147469c8d31cSJan Kiszka val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 147569c8d31cSJan Kiszka report("MSR_IA32_VMX_EPT_VPID_CAP", 1476625f52abSPaolo Bonzini (val & 0xfffff07ef98cbebeUll) == 0); 147769c8d31cSJan Kiszka } 147869c8d31cSJan Kiszka 14799d7eaa29SArthur Chunqi Li /* This function can only be called in guest */ 14809d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) hypercall(u32 hypercall_no) 14819d7eaa29SArthur Chunqi Li { 14829d7eaa29SArthur Chunqi Li u64 val = 0; 14839d7eaa29SArthur Chunqi Li val = (hypercall_no & HYPERCALL_MASK) | HYPERCALL_BIT; 14849d7eaa29SArthur Chunqi Li hypercall_field = val; 14859d7eaa29SArthur Chunqi Li asm volatile("vmcall\n\t"); 14869d7eaa29SArthur Chunqi Li } 14879d7eaa29SArthur Chunqi Li 14887db17e21SThomas Huth static bool is_hypercall(void) 14899d7eaa29SArthur Chunqi Li { 14909d7eaa29SArthur Chunqi Li ulong reason, hyper_bit; 14919d7eaa29SArthur Chunqi Li 14929d7eaa29SArthur Chunqi Li reason = vmcs_read(EXI_REASON) & 0xff; 14939d7eaa29SArthur Chunqi Li hyper_bit = hypercall_field & HYPERCALL_BIT; 14949d7eaa29SArthur Chunqi Li if (reason == VMX_VMCALL && hyper_bit) 14959d7eaa29SArthur Chunqi Li return true; 14969d7eaa29SArthur Chunqi Li return false; 14979d7eaa29SArthur Chunqi Li } 14989d7eaa29SArthur Chunqi Li 14997db17e21SThomas Huth static int handle_hypercall(void) 15009d7eaa29SArthur Chunqi Li { 15019d7eaa29SArthur Chunqi Li ulong hypercall_no; 15029d7eaa29SArthur Chunqi Li 15039d7eaa29SArthur Chunqi Li hypercall_no = hypercall_field & HYPERCALL_MASK; 15049d7eaa29SArthur Chunqi Li hypercall_field = 0; 15059d7eaa29SArthur Chunqi Li switch (hypercall_no) { 15069d7eaa29SArthur Chunqi Li case HYPERCALL_VMEXIT: 15079d7eaa29SArthur Chunqi Li return VMX_TEST_VMEXIT; 1508794c67a9SPeter Feiner case HYPERCALL_VMABORT: 1509794c67a9SPeter Feiner return VMX_TEST_VMABORT; 1510794c67a9SPeter Feiner case HYPERCALL_VMSKIP: 1511794c67a9SPeter Feiner return VMX_TEST_VMSKIP; 15129d7eaa29SArthur Chunqi Li default: 1513b006d7ebSAndrew Jones printf("ERROR : Invalid hypercall number : %ld\n", hypercall_no); 15149d7eaa29SArthur Chunqi Li } 15159d7eaa29SArthur Chunqi Li return VMX_TEST_EXIT; 15169d7eaa29SArthur Chunqi Li } 15179d7eaa29SArthur Chunqi Li 1518794c67a9SPeter Feiner static void continue_abort(void) 1519794c67a9SPeter Feiner { 1520794c67a9SPeter Feiner assert(!in_guest); 1521794c67a9SPeter Feiner printf("Host was here when guest aborted:\n"); 1522794c67a9SPeter Feiner dump_stack(); 1523794c67a9SPeter Feiner longjmp(abort_target, 1); 1524794c67a9SPeter Feiner abort(); 1525794c67a9SPeter Feiner } 1526794c67a9SPeter Feiner 1527794c67a9SPeter Feiner void __abort_test(void) 1528794c67a9SPeter Feiner { 1529794c67a9SPeter Feiner if (in_guest) 1530794c67a9SPeter Feiner hypercall(HYPERCALL_VMABORT); 1531794c67a9SPeter Feiner else 1532794c67a9SPeter Feiner longjmp(abort_target, 1); 1533794c67a9SPeter Feiner abort(); 1534794c67a9SPeter Feiner } 1535794c67a9SPeter Feiner 1536794c67a9SPeter Feiner static void continue_skip(void) 1537794c67a9SPeter Feiner { 1538794c67a9SPeter Feiner assert(!in_guest); 1539794c67a9SPeter Feiner longjmp(abort_target, 1); 1540794c67a9SPeter Feiner abort(); 1541794c67a9SPeter Feiner } 1542794c67a9SPeter Feiner 1543794c67a9SPeter Feiner void test_skip(const char *msg) 1544794c67a9SPeter Feiner { 1545794c67a9SPeter Feiner printf("%s skipping test: %s\n", in_guest ? "Guest" : "Host", msg); 1546794c67a9SPeter Feiner if (in_guest) 1547794c67a9SPeter Feiner hypercall(HYPERCALL_VMABORT); 1548794c67a9SPeter Feiner else 1549794c67a9SPeter Feiner longjmp(abort_target, 1); 1550794c67a9SPeter Feiner abort(); 1551794c67a9SPeter Feiner } 1552794c67a9SPeter Feiner 15537db17e21SThomas Huth static int exit_handler(void) 15549d7eaa29SArthur Chunqi Li { 15559d7eaa29SArthur Chunqi Li int ret; 15569d7eaa29SArthur Chunqi Li 15579d7eaa29SArthur Chunqi Li current->exits++; 15581d9284d0SArthur Chunqi Li regs.rflags = vmcs_read(GUEST_RFLAGS); 15599d7eaa29SArthur Chunqi Li if (is_hypercall()) 15609d7eaa29SArthur Chunqi Li ret = handle_hypercall(); 15619d7eaa29SArthur Chunqi Li else 15629d7eaa29SArthur Chunqi Li ret = current->exit_handler(); 15631d9284d0SArthur Chunqi Li vmcs_write(GUEST_RFLAGS, regs.rflags); 15643b50efe3SPeter Feiner 15659d7eaa29SArthur Chunqi Li return ret; 15669d7eaa29SArthur Chunqi Li } 15673b50efe3SPeter Feiner 15683b50efe3SPeter Feiner /* 15693b50efe3SPeter Feiner * Called if vmlaunch or vmresume fails. 15703b50efe3SPeter Feiner * @early - failure due to "VMX controls and host-state area" (26.2) 15713b50efe3SPeter Feiner * @vmlaunch - was this a vmlaunch or vmresume 15723b50efe3SPeter Feiner * @rflags - host rflags 15733b50efe3SPeter Feiner */ 15743b50efe3SPeter Feiner static int 15753b50efe3SPeter Feiner entry_failure_handler(struct vmentry_failure *failure) 15763b50efe3SPeter Feiner { 15773b50efe3SPeter Feiner if (current->entry_failure_handler) 15783b50efe3SPeter Feiner return current->entry_failure_handler(failure); 15793b50efe3SPeter Feiner else 15803b50efe3SPeter Feiner return VMX_TEST_EXIT; 15819d7eaa29SArthur Chunqi Li } 15829d7eaa29SArthur Chunqi Li 1583c76ddf06SPeter Feiner /* 1584c76ddf06SPeter Feiner * Tries to enter the guest. Returns true iff entry succeeded. Otherwise, 1585c76ddf06SPeter Feiner * populates @failure. 1586c76ddf06SPeter Feiner */ 1587c76ddf06SPeter Feiner static bool vmx_enter_guest(struct vmentry_failure *failure) 15889d7eaa29SArthur Chunqi Li { 1589c76ddf06SPeter Feiner failure->early = 0; 15904e809db5SPeter Feiner 1591794c67a9SPeter Feiner in_guest = 1; 15929d7eaa29SArthur Chunqi Li asm volatile ( 1593897d8365SPeter Feiner "mov %[HOST_RSP], %%rdi\n\t" 1594897d8365SPeter Feiner "vmwrite %%rsp, %%rdi\n\t" 15959d7eaa29SArthur Chunqi Li LOAD_GPR_C 159644417388SPaolo Bonzini "cmpb $0, %[launched]\n\t" 15979d7eaa29SArthur Chunqi Li "jne 1f\n\t" 15989d7eaa29SArthur Chunqi Li "vmlaunch\n\t" 15999d7eaa29SArthur Chunqi Li "jmp 2f\n\t" 16009d7eaa29SArthur Chunqi Li "1: " 16019d7eaa29SArthur Chunqi Li "vmresume\n\t" 16029d7eaa29SArthur Chunqi Li "2: " 1603f37cf4e2SPeter Feiner SAVE_GPR_C 1604897d8365SPeter Feiner "pushf\n\t" 1605897d8365SPeter Feiner "pop %%rdi\n\t" 1606c76ddf06SPeter Feiner "mov %%rdi, %[failure_flags]\n\t" 1607c76ddf06SPeter Feiner "movl $1, %[failure_flags]\n\t" 1608f37cf4e2SPeter Feiner "jmp 3f\n\t" 16099d7eaa29SArthur Chunqi Li "vmx_return:\n\t" 16109d7eaa29SArthur Chunqi Li SAVE_GPR_C 1611f37cf4e2SPeter Feiner "3: \n\t" 1612c76ddf06SPeter Feiner : [failure_early]"+m"(failure->early), 1613c76ddf06SPeter Feiner [failure_flags]"=m"(failure->flags) 1614897d8365SPeter Feiner : [launched]"m"(launched), [HOST_RSP]"i"(HOST_RSP) 1615897d8365SPeter Feiner : "rdi", "memory", "cc" 16169d7eaa29SArthur Chunqi Li ); 1617794c67a9SPeter Feiner in_guest = 0; 16183b50efe3SPeter Feiner 1619c76ddf06SPeter Feiner failure->vmlaunch = !launched; 1620c76ddf06SPeter Feiner failure->instr = launched ? "vmresume" : "vmlaunch"; 1621c76ddf06SPeter Feiner 1622c76ddf06SPeter Feiner return !failure->early && !(vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE); 1623c76ddf06SPeter Feiner } 1624c76ddf06SPeter Feiner 16257db17e21SThomas Huth static int vmx_run(void) 1626c76ddf06SPeter Feiner { 1627c76ddf06SPeter Feiner while (1) { 1628c76ddf06SPeter Feiner u32 ret; 1629c76ddf06SPeter Feiner bool entered; 1630c76ddf06SPeter Feiner struct vmentry_failure failure; 1631c76ddf06SPeter Feiner 1632c76ddf06SPeter Feiner entered = vmx_enter_guest(&failure); 16333b50efe3SPeter Feiner 16343b50efe3SPeter Feiner if (entered) { 16353b50efe3SPeter Feiner /* 16363b50efe3SPeter Feiner * VMCS isn't in "launched" state if there's been any 16373b50efe3SPeter Feiner * entry failure (early or otherwise). 16383b50efe3SPeter Feiner */ 16399d7eaa29SArthur Chunqi Li launched = 1; 16409d7eaa29SArthur Chunqi Li ret = exit_handler(); 16413b50efe3SPeter Feiner } else { 16423b50efe3SPeter Feiner ret = entry_failure_handler(&failure); 16439d7eaa29SArthur Chunqi Li } 16443b50efe3SPeter Feiner 16459d7eaa29SArthur Chunqi Li switch (ret) { 16463b50efe3SPeter Feiner case VMX_TEST_RESUME: 16473b50efe3SPeter Feiner continue; 16489d7eaa29SArthur Chunqi Li case VMX_TEST_VMEXIT: 1649794c67a9SPeter Feiner guest_finished = 1; 16509d7eaa29SArthur Chunqi Li return 0; 16513b50efe3SPeter Feiner case VMX_TEST_EXIT: 16529d7eaa29SArthur Chunqi Li break; 16539d7eaa29SArthur Chunqi Li default: 16543b50efe3SPeter Feiner printf("ERROR : Invalid %s_handler return val %d.\n", 16553b50efe3SPeter Feiner entered ? "exit" : "entry_failure", 16563b50efe3SPeter Feiner ret); 16579d7eaa29SArthur Chunqi Li break; 16589d7eaa29SArthur Chunqi Li } 16593b50efe3SPeter Feiner 16603b50efe3SPeter Feiner if (entered) 16613b50efe3SPeter Feiner print_vmexit_info(); 16623b50efe3SPeter Feiner else 16633b50efe3SPeter Feiner print_vmentry_failure_info(&failure); 16643b50efe3SPeter Feiner abort(); 16653b50efe3SPeter Feiner } 16669d7eaa29SArthur Chunqi Li } 16679d7eaa29SArthur Chunqi Li 1668794c67a9SPeter Feiner static void run_teardown_step(struct test_teardown_step *step) 1669794c67a9SPeter Feiner { 1670794c67a9SPeter Feiner step->func(step->data); 1671794c67a9SPeter Feiner } 1672794c67a9SPeter Feiner 16739d7eaa29SArthur Chunqi Li static int test_run(struct vmx_test *test) 16749d7eaa29SArthur Chunqi Li { 1675794c67a9SPeter Feiner int r; 1676794c67a9SPeter Feiner 1677794c67a9SPeter Feiner /* Validate V2 interface. */ 1678794c67a9SPeter Feiner if (test->v2) { 1679794c67a9SPeter Feiner int ret = 0; 1680794c67a9SPeter Feiner if (test->init || test->guest_main || test->exit_handler || 1681794c67a9SPeter Feiner test->syscall_handler) { 1682794c67a9SPeter Feiner report("V2 test cannot specify V1 callbacks.", 0); 1683794c67a9SPeter Feiner ret = 1; 1684794c67a9SPeter Feiner } 1685794c67a9SPeter Feiner if (ret) 1686794c67a9SPeter Feiner return ret; 1687794c67a9SPeter Feiner } 1688794c67a9SPeter Feiner 16899d7eaa29SArthur Chunqi Li if (test->name == NULL) 16909d7eaa29SArthur Chunqi Li test->name = "(no name)"; 16919d7eaa29SArthur Chunqi Li if (vmx_on()) { 16929d7eaa29SArthur Chunqi Li printf("%s : vmxon failed.\n", __func__); 16939d7eaa29SArthur Chunqi Li return 1; 16949d7eaa29SArthur Chunqi Li } 1695794c67a9SPeter Feiner 16969d7eaa29SArthur Chunqi Li init_vmcs(&(test->vmcs)); 16979d7eaa29SArthur Chunqi Li /* Directly call test->init is ok here, init_vmcs has done 16989d7eaa29SArthur Chunqi Li vmcs init, vmclear and vmptrld*/ 1699c592c151SJan Kiszka if (test->init && test->init(test->vmcs) != VMX_TEST_START) 1700a0e30e71SPaolo Bonzini goto out; 1701794c67a9SPeter Feiner teardown_count = 0; 1702794c67a9SPeter Feiner v2_guest_main = NULL; 17039d7eaa29SArthur Chunqi Li test->exits = 0; 17049d7eaa29SArthur Chunqi Li current = test; 17059d7eaa29SArthur Chunqi Li regs = test->guest_regs; 17069d7eaa29SArthur Chunqi Li vmcs_write(GUEST_RFLAGS, regs.rflags | 0x2); 17079d7eaa29SArthur Chunqi Li launched = 0; 1708794c67a9SPeter Feiner guest_finished = 0; 17099d7eaa29SArthur Chunqi Li printf("\nTest suite: %s\n", test->name); 1710794c67a9SPeter Feiner 1711794c67a9SPeter Feiner r = setjmp(abort_target); 1712794c67a9SPeter Feiner if (r) { 1713794c67a9SPeter Feiner assert(!in_guest); 1714794c67a9SPeter Feiner goto out; 1715794c67a9SPeter Feiner } 1716794c67a9SPeter Feiner 1717794c67a9SPeter Feiner 1718794c67a9SPeter Feiner if (test->v2) 1719794c67a9SPeter Feiner test->v2(); 1720794c67a9SPeter Feiner else 17219d7eaa29SArthur Chunqi Li vmx_run(); 1722794c67a9SPeter Feiner 1723794c67a9SPeter Feiner while (teardown_count > 0) 1724794c67a9SPeter Feiner run_teardown_step(&teardown_steps[--teardown_count]); 1725794c67a9SPeter Feiner 1726794c67a9SPeter Feiner if (launched && !guest_finished) 1727794c67a9SPeter Feiner report("Guest didn't run to completion.", 0); 1728794c67a9SPeter Feiner 1729a0e30e71SPaolo Bonzini out: 17309d7eaa29SArthur Chunqi Li if (vmx_off()) { 17319d7eaa29SArthur Chunqi Li printf("%s : vmxoff failed.\n", __func__); 17329d7eaa29SArthur Chunqi Li return 1; 17339d7eaa29SArthur Chunqi Li } 17349d7eaa29SArthur Chunqi Li return 0; 17359d7eaa29SArthur Chunqi Li } 17369d7eaa29SArthur Chunqi Li 1737794c67a9SPeter Feiner /* 1738794c67a9SPeter Feiner * Add a teardown step. Executed after the test's main function returns. 1739794c67a9SPeter Feiner * Teardown steps executed in reverse order. 1740794c67a9SPeter Feiner */ 1741794c67a9SPeter Feiner void test_add_teardown(test_teardown_func func, void *data) 1742794c67a9SPeter Feiner { 1743794c67a9SPeter Feiner struct test_teardown_step *step; 1744794c67a9SPeter Feiner 1745794c67a9SPeter Feiner TEST_ASSERT_MSG(teardown_count < MAX_TEST_TEARDOWN_STEPS, 1746794c67a9SPeter Feiner "There are already %d teardown steps.", 1747794c67a9SPeter Feiner teardown_count); 1748794c67a9SPeter Feiner step = &teardown_steps[teardown_count++]; 1749794c67a9SPeter Feiner step->func = func; 1750794c67a9SPeter Feiner step->data = data; 1751794c67a9SPeter Feiner } 1752794c67a9SPeter Feiner 1753794c67a9SPeter Feiner /* 1754794c67a9SPeter Feiner * Set the target of the first enter_guest call. Can only be called once per 1755794c67a9SPeter Feiner * test. Must be called before first enter_guest call. 1756794c67a9SPeter Feiner */ 1757794c67a9SPeter Feiner void test_set_guest(test_guest_func func) 1758794c67a9SPeter Feiner { 1759794c67a9SPeter Feiner assert(current->v2); 1760794c67a9SPeter Feiner TEST_ASSERT_MSG(!v2_guest_main, "Already set guest func."); 1761794c67a9SPeter Feiner v2_guest_main = func; 1762794c67a9SPeter Feiner } 1763794c67a9SPeter Feiner 1764794c67a9SPeter Feiner /* 1765794c67a9SPeter Feiner * Enters the guest (or launches it for the first time). Error to call once the 1766794c67a9SPeter Feiner * guest has returned (i.e., run past the end of its guest() function). Also 1767794c67a9SPeter Feiner * aborts if guest entry fails. 1768794c67a9SPeter Feiner */ 1769794c67a9SPeter Feiner void enter_guest(void) 1770794c67a9SPeter Feiner { 1771794c67a9SPeter Feiner struct vmentry_failure failure; 1772794c67a9SPeter Feiner 1773794c67a9SPeter Feiner TEST_ASSERT_MSG(v2_guest_main, 1774794c67a9SPeter Feiner "Never called test_set_guest_func!"); 1775794c67a9SPeter Feiner 1776794c67a9SPeter Feiner TEST_ASSERT_MSG(!guest_finished, 1777794c67a9SPeter Feiner "Called enter_guest() after guest returned."); 1778794c67a9SPeter Feiner 1779794c67a9SPeter Feiner if (!vmx_enter_guest(&failure)) { 1780794c67a9SPeter Feiner print_vmentry_failure_info(&failure); 1781794c67a9SPeter Feiner abort(); 1782794c67a9SPeter Feiner } 1783794c67a9SPeter Feiner 1784794c67a9SPeter Feiner launched = 1; 1785794c67a9SPeter Feiner 1786794c67a9SPeter Feiner if (is_hypercall()) { 1787794c67a9SPeter Feiner int ret; 1788794c67a9SPeter Feiner 1789794c67a9SPeter Feiner ret = handle_hypercall(); 1790794c67a9SPeter Feiner switch (ret) { 1791794c67a9SPeter Feiner case VMX_TEST_VMEXIT: 1792794c67a9SPeter Feiner guest_finished = 1; 1793794c67a9SPeter Feiner break; 1794794c67a9SPeter Feiner case VMX_TEST_VMABORT: 1795794c67a9SPeter Feiner continue_abort(); 1796794c67a9SPeter Feiner break; 1797794c67a9SPeter Feiner case VMX_TEST_VMSKIP: 1798794c67a9SPeter Feiner continue_skip(); 1799794c67a9SPeter Feiner break; 1800794c67a9SPeter Feiner default: 1801794c67a9SPeter Feiner printf("ERROR : Invalid handle_hypercall return %d.\n", 1802794c67a9SPeter Feiner ret); 1803794c67a9SPeter Feiner abort(); 1804794c67a9SPeter Feiner } 1805794c67a9SPeter Feiner } 1806794c67a9SPeter Feiner } 1807794c67a9SPeter Feiner 18083ee34093SArthur Chunqi Li extern struct vmx_test vmx_tests[]; 18099d7eaa29SArthur Chunqi Li 1810875b97b3SPeter Feiner static bool 1811875b97b3SPeter Feiner test_wanted(const char *name, const char *filters[], int filter_count) 18128029cac7SPeter Feiner { 1813875b97b3SPeter Feiner int i; 1814875b97b3SPeter Feiner bool positive = false; 1815875b97b3SPeter Feiner bool match = false; 1816875b97b3SPeter Feiner char clean_name[strlen(name) + 1]; 1817875b97b3SPeter Feiner char *c; 18188029cac7SPeter Feiner const char *n; 18198029cac7SPeter Feiner 1820875b97b3SPeter Feiner /* Replace spaces with underscores. */ 1821875b97b3SPeter Feiner n = name; 1822875b97b3SPeter Feiner c = &clean_name[0]; 1823875b97b3SPeter Feiner do *c++ = (*n == ' ') ? '_' : *n; 1824875b97b3SPeter Feiner while (*n++); 1825875b97b3SPeter Feiner 1826875b97b3SPeter Feiner for (i = 0; i < filter_count; i++) { 1827875b97b3SPeter Feiner const char *filter = filters[i]; 1828875b97b3SPeter Feiner 1829875b97b3SPeter Feiner if (filter[0] == '-') { 1830875b97b3SPeter Feiner if (simple_glob(clean_name, filter + 1)) 1831875b97b3SPeter Feiner return false; 1832875b97b3SPeter Feiner } else { 1833875b97b3SPeter Feiner positive = true; 1834875b97b3SPeter Feiner match |= simple_glob(clean_name, filter); 1835875b97b3SPeter Feiner } 1836875b97b3SPeter Feiner } 1837875b97b3SPeter Feiner 1838875b97b3SPeter Feiner if (!positive || match) { 1839875b97b3SPeter Feiner matched++; 1840875b97b3SPeter Feiner return true; 1841875b97b3SPeter Feiner } else { 18428029cac7SPeter Feiner return false; 18438029cac7SPeter Feiner } 18448029cac7SPeter Feiner } 18458029cac7SPeter Feiner 1846875b97b3SPeter Feiner int main(int argc, const char *argv[]) 18479d7eaa29SArthur Chunqi Li { 18483ee34093SArthur Chunqi Li int i = 0; 18499d7eaa29SArthur Chunqi Li 18509d7eaa29SArthur Chunqi Li setup_vm(); 1851706cad23SArbel Moshe smp_init(); 18523ee34093SArthur Chunqi Li hypercall_field = 0; 18539d7eaa29SArthur Chunqi Li 1854c04259ffSDavid Matlack argv++; 1855c04259ffSDavid Matlack argc--; 1856c04259ffSDavid Matlack 18573b127446SJan Kiszka if (!(cpuid(1).c & (1 << 5))) { 18583b127446SJan Kiszka printf("WARNING: vmx not supported, add '-cpu host'\n"); 18599d7eaa29SArthur Chunqi Li goto exit; 18609d7eaa29SArthur Chunqi Li } 18619d7eaa29SArthur Chunqi Li init_vmx(); 1862c04259ffSDavid Matlack if (test_wanted("test_vmx_feature_control", argv, argc)) { 1863c04259ffSDavid Matlack /* Sets MSR_IA32_FEATURE_CONTROL to 0x5 */ 18643b127446SJan Kiszka if (test_vmx_feature_control() != 0) 18653b127446SJan Kiszka goto exit; 1866c04259ffSDavid Matlack } else { 1867c04259ffSDavid Matlack if ((rdmsr(MSR_IA32_FEATURE_CONTROL) & 0x5) != 0x5) 1868c04259ffSDavid Matlack wrmsr(MSR_IA32_FEATURE_CONTROL, 0x5); 1869c04259ffSDavid Matlack } 1870c04259ffSDavid Matlack 1871c04259ffSDavid Matlack if (test_wanted("test_vmxon", argv, argc)) { 1872c04259ffSDavid Matlack /* Enables VMX */ 18739d7eaa29SArthur Chunqi Li if (test_vmxon() != 0) 18749d7eaa29SArthur Chunqi Li goto exit; 1875c04259ffSDavid Matlack } else { 1876c04259ffSDavid Matlack if (vmx_on()) { 1877c04259ffSDavid Matlack report("vmxon", 0); 1878c04259ffSDavid Matlack goto exit; 1879c04259ffSDavid Matlack } 1880c04259ffSDavid Matlack } 1881c04259ffSDavid Matlack 1882c04259ffSDavid Matlack if (test_wanted("test_vmptrld", argv, argc)) 18839d7eaa29SArthur Chunqi Li test_vmptrld(); 1884c04259ffSDavid Matlack if (test_wanted("test_vmclear", argv, argc)) 18859d7eaa29SArthur Chunqi Li test_vmclear(); 1886c04259ffSDavid Matlack if (test_wanted("test_vmptrst", argv, argc)) 18879d7eaa29SArthur Chunqi Li test_vmptrst(); 1888ecd5b431SDavid Matlack if (test_wanted("test_vmwrite_vmread", argv, argc)) 1889ecd5b431SDavid Matlack test_vmwrite_vmread(); 189059161cfaSJim Mattson if (test_wanted("test_vmcs_high", argv, argc)) 189159161cfaSJim Mattson test_vmcs_high(); 18926b72cf76SDavid Matlack if (test_wanted("test_vmcs_lifecycle", argv, argc)) 18936b72cf76SDavid Matlack test_vmcs_lifecycle(); 1894c04259ffSDavid Matlack if (test_wanted("test_vmx_caps", argv, argc)) 189569c8d31cSJan Kiszka test_vmx_caps(); 18969d7eaa29SArthur Chunqi Li 189734439b1aSPeter Feiner /* Balance vmxon from test_vmxon. */ 189834439b1aSPeter Feiner vmx_off(); 189934439b1aSPeter Feiner 190034439b1aSPeter Feiner for (; vmx_tests[i].name != NULL; i++) { 1901c04259ffSDavid Matlack if (!test_wanted(vmx_tests[i].name, argv, argc)) 19028029cac7SPeter Feiner continue; 19039d7eaa29SArthur Chunqi Li if (test_run(&vmx_tests[i])) 19049d7eaa29SArthur Chunqi Li goto exit; 19058029cac7SPeter Feiner } 19068029cac7SPeter Feiner 19078029cac7SPeter Feiner if (!matched) 19088029cac7SPeter Feiner report("command line didn't match any tests!", matched); 19099d7eaa29SArthur Chunqi Li 19109d7eaa29SArthur Chunqi Li exit: 1911f3cdd159SJan Kiszka return report_summary(); 19129d7eaa29SArthur Chunqi Li } 1913