17ada359dSArthur Chunqi Li /* 27ada359dSArthur Chunqi Li * x86/vmx.c : Framework for testing nested virtualization 37ada359dSArthur Chunqi Li * This is a framework to test nested VMX for KVM, which 47ada359dSArthur Chunqi Li * started as a project of GSoC 2013. All test cases should 57ada359dSArthur Chunqi Li * be located in x86/vmx_tests.c and framework related 67ada359dSArthur Chunqi Li * functions should be in this file. 77ada359dSArthur Chunqi Li * 87ada359dSArthur Chunqi Li * How to write test cases? 97ada359dSArthur Chunqi Li * Add callbacks of test suite in variant "vmx_tests". You can 107ada359dSArthur Chunqi Li * write: 117ada359dSArthur Chunqi Li * 1. init function used for initializing test suite 127ada359dSArthur Chunqi Li * 2. main function for codes running in L2 guest, 137ada359dSArthur Chunqi Li * 3. exit_handler to handle vmexit of L2 to L1 147ada359dSArthur Chunqi Li * 4. syscall handler to handle L2 syscall vmexit 157ada359dSArthur Chunqi Li * 5. vmenter fail handler to handle direct failure of vmenter 167ada359dSArthur Chunqi Li * 6. guest_regs is loaded when vmenter and saved when 177ada359dSArthur Chunqi Li * vmexit, you can read and set it in exit_handler 187ada359dSArthur Chunqi Li * If no special function is needed for a test suite, use 197ada359dSArthur Chunqi Li * coressponding basic_* functions as callback. More handlers 207ada359dSArthur Chunqi Li * can be added to "vmx_tests", see details of "struct vmx_test" 217ada359dSArthur Chunqi Li * and function test_run(). 227ada359dSArthur Chunqi Li * 237ada359dSArthur Chunqi Li * Currently, vmx test framework only set up one VCPU and one 247ada359dSArthur Chunqi Li * concurrent guest test environment with same paging for L2 and 257ada359dSArthur Chunqi Li * L1. For usage of EPT, only 1:1 mapped paging is used from VFN 267ada359dSArthur Chunqi Li * to PFN. 277ada359dSArthur Chunqi Li * 287ada359dSArthur Chunqi Li * Author : Arthur Chunqi Li <yzt356@gmail.com> 297ada359dSArthur Chunqi Li */ 307ada359dSArthur Chunqi Li 319d7eaa29SArthur Chunqi Li #include "libcflat.h" 329d7eaa29SArthur Chunqi Li #include "processor.h" 335aca024eSPaolo Bonzini #include "alloc_page.h" 349d7eaa29SArthur Chunqi Li #include "vm.h" 359d7eaa29SArthur Chunqi Li #include "desc.h" 369d7eaa29SArthur Chunqi Li #include "vmx.h" 379d7eaa29SArthur Chunqi Li #include "msr.h" 389d7eaa29SArthur Chunqi Li #include "smp.h" 397371c622SVitaly Kuznetsov #include "apic.h" 409d7eaa29SArthur Chunqi Li 41c937d495SLiran Alon u64 *bsp_vmxon_region; 429d7eaa29SArthur Chunqi Li struct vmcs *vmcs_root; 439d7eaa29SArthur Chunqi Li u32 vpid_cnt; 449d7eaa29SArthur Chunqi Li void *guest_stack, *guest_syscall_stack; 459d7eaa29SArthur Chunqi Li u32 ctrl_pin, ctrl_enter, ctrl_exit, ctrl_cpu[2]; 469d7eaa29SArthur Chunqi Li struct regs regs; 47794c67a9SPeter Feiner 489d7eaa29SArthur Chunqi Li struct vmx_test *current; 49794c67a9SPeter Feiner 50794c67a9SPeter Feiner #define MAX_TEST_TEARDOWN_STEPS 10 51794c67a9SPeter Feiner 52794c67a9SPeter Feiner struct test_teardown_step { 53794c67a9SPeter Feiner test_teardown_func func; 54794c67a9SPeter Feiner void *data; 55794c67a9SPeter Feiner }; 56794c67a9SPeter Feiner 57794c67a9SPeter Feiner static int teardown_count; 58794c67a9SPeter Feiner static struct test_teardown_step teardown_steps[MAX_TEST_TEARDOWN_STEPS]; 59794c67a9SPeter Feiner 60794c67a9SPeter Feiner static test_guest_func v2_guest_main; 61794c67a9SPeter Feiner 623ee34093SArthur Chunqi Li u64 hypercall_field; 639d7eaa29SArthur Chunqi Li bool launched; 64c04259ffSDavid Matlack static int matched; 65794c67a9SPeter Feiner static int guest_finished; 66794c67a9SPeter Feiner static int in_guest; 679d7eaa29SArthur Chunqi Li 683ee34093SArthur Chunqi Li union vmx_basic basic; 695f18e779SJan Kiszka union vmx_ctrl_msr ctrl_pin_rev; 705f18e779SJan Kiszka union vmx_ctrl_msr ctrl_cpu_rev[2]; 715f18e779SJan Kiszka union vmx_ctrl_msr ctrl_exit_rev; 725f18e779SJan Kiszka union vmx_ctrl_msr ctrl_enter_rev; 733ee34093SArthur Chunqi Li union vmx_ept_vpid ept_vpid; 743ee34093SArthur Chunqi Li 75337166aaSJan Kiszka extern struct descriptor_table_ptr gdt64_desc; 76337166aaSJan Kiszka extern struct descriptor_table_ptr idt_descr; 77337166aaSJan Kiszka extern struct descriptor_table_ptr tss_descr; 789d7eaa29SArthur Chunqi Li extern void *vmx_return; 799d7eaa29SArthur Chunqi Li extern void *entry_sysenter; 809d7eaa29SArthur Chunqi Li extern void *guest_entry; 819d7eaa29SArthur Chunqi Li 82ffb1a9e0SJan Kiszka static volatile u32 stage; 83ffb1a9e0SJan Kiszka 84794c67a9SPeter Feiner static jmp_buf abort_target; 85794c67a9SPeter Feiner 86ecd5b431SDavid Matlack struct vmcs_field { 87ecd5b431SDavid Matlack u64 mask; 88ecd5b431SDavid Matlack u64 encoding; 89ecd5b431SDavid Matlack }; 90ecd5b431SDavid Matlack 91ecd5b431SDavid Matlack #define MASK(_bits) GENMASK_ULL((_bits) - 1, 0) 92ecd5b431SDavid Matlack #define MASK_NATURAL MASK(sizeof(unsigned long) * 8) 93ecd5b431SDavid Matlack 94ecd5b431SDavid Matlack static struct vmcs_field vmcs_fields[] = { 95ecd5b431SDavid Matlack { MASK(16), VPID }, 96ecd5b431SDavid Matlack { MASK(16), PINV }, 97ecd5b431SDavid Matlack { MASK(16), EPTP_IDX }, 98ecd5b431SDavid Matlack 99ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_ES }, 100ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_CS }, 101ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_SS }, 102ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_DS }, 103ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_FS }, 104ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_GS }, 105ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_LDTR }, 106ecd5b431SDavid Matlack { MASK(16), GUEST_SEL_TR }, 107ecd5b431SDavid Matlack { MASK(16), GUEST_INT_STATUS }, 108ecd5b431SDavid Matlack 109ecd5b431SDavid Matlack { MASK(16), HOST_SEL_ES }, 110ecd5b431SDavid Matlack { MASK(16), HOST_SEL_CS }, 111ecd5b431SDavid Matlack { MASK(16), HOST_SEL_SS }, 112ecd5b431SDavid Matlack { MASK(16), HOST_SEL_DS }, 113ecd5b431SDavid Matlack { MASK(16), HOST_SEL_FS }, 114ecd5b431SDavid Matlack { MASK(16), HOST_SEL_GS }, 115ecd5b431SDavid Matlack { MASK(16), HOST_SEL_TR }, 116ecd5b431SDavid Matlack 117ecd5b431SDavid Matlack { MASK(64), IO_BITMAP_A }, 118ecd5b431SDavid Matlack { MASK(64), IO_BITMAP_B }, 119ecd5b431SDavid Matlack { MASK(64), MSR_BITMAP }, 120ecd5b431SDavid Matlack { MASK(64), EXIT_MSR_ST_ADDR }, 121ecd5b431SDavid Matlack { MASK(64), EXIT_MSR_LD_ADDR }, 122ecd5b431SDavid Matlack { MASK(64), ENTER_MSR_LD_ADDR }, 123ecd5b431SDavid Matlack { MASK(64), VMCS_EXEC_PTR }, 124ecd5b431SDavid Matlack { MASK(64), TSC_OFFSET }, 125ecd5b431SDavid Matlack { MASK(64), APIC_VIRT_ADDR }, 126ecd5b431SDavid Matlack { MASK(64), APIC_ACCS_ADDR }, 127ecd5b431SDavid Matlack { MASK(64), EPTP }, 128ecd5b431SDavid Matlack 129faea4fc6SLiran Alon { MASK(64), INFO_PHYS_ADDR }, 130ecd5b431SDavid Matlack 131ecd5b431SDavid Matlack { MASK(64), VMCS_LINK_PTR }, 132ecd5b431SDavid Matlack { MASK(64), GUEST_DEBUGCTL }, 133ecd5b431SDavid Matlack { MASK(64), GUEST_EFER }, 134ecd5b431SDavid Matlack { MASK(64), GUEST_PAT }, 135ecd5b431SDavid Matlack { MASK(64), GUEST_PERF_GLOBAL_CTRL }, 136ecd5b431SDavid Matlack { MASK(64), GUEST_PDPTE }, 137ecd5b431SDavid Matlack 138ecd5b431SDavid Matlack { MASK(64), HOST_PAT }, 139ecd5b431SDavid Matlack { MASK(64), HOST_EFER }, 140ecd5b431SDavid Matlack { MASK(64), HOST_PERF_GLOBAL_CTRL }, 141ecd5b431SDavid Matlack 142ecd5b431SDavid Matlack { MASK(32), PIN_CONTROLS }, 143ecd5b431SDavid Matlack { MASK(32), CPU_EXEC_CTRL0 }, 144ecd5b431SDavid Matlack { MASK(32), EXC_BITMAP }, 145ecd5b431SDavid Matlack { MASK(32), PF_ERROR_MASK }, 146ecd5b431SDavid Matlack { MASK(32), PF_ERROR_MATCH }, 147ecd5b431SDavid Matlack { MASK(32), CR3_TARGET_COUNT }, 148ecd5b431SDavid Matlack { MASK(32), EXI_CONTROLS }, 149ecd5b431SDavid Matlack { MASK(32), EXI_MSR_ST_CNT }, 150ecd5b431SDavid Matlack { MASK(32), EXI_MSR_LD_CNT }, 151ecd5b431SDavid Matlack { MASK(32), ENT_CONTROLS }, 152ecd5b431SDavid Matlack { MASK(32), ENT_MSR_LD_CNT }, 153ecd5b431SDavid Matlack { MASK(32), ENT_INTR_INFO }, 154ecd5b431SDavid Matlack { MASK(32), ENT_INTR_ERROR }, 155ecd5b431SDavid Matlack { MASK(32), ENT_INST_LEN }, 156ecd5b431SDavid Matlack { MASK(32), TPR_THRESHOLD }, 157ecd5b431SDavid Matlack { MASK(32), CPU_EXEC_CTRL1 }, 158ecd5b431SDavid Matlack 159faea4fc6SLiran Alon { MASK(32), VMX_INST_ERROR }, 160faea4fc6SLiran Alon { MASK(32), EXI_REASON }, 161faea4fc6SLiran Alon { MASK(32), EXI_INTR_INFO }, 162faea4fc6SLiran Alon { MASK(32), EXI_INTR_ERROR }, 163faea4fc6SLiran Alon { MASK(32), IDT_VECT_INFO }, 164faea4fc6SLiran Alon { MASK(32), IDT_VECT_ERROR }, 165faea4fc6SLiran Alon { MASK(32), EXI_INST_LEN }, 166faea4fc6SLiran Alon { MASK(32), EXI_INST_INFO }, 167ecd5b431SDavid Matlack 168ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_ES }, 169ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_CS }, 170ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_SS }, 171ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_DS }, 172ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_FS }, 173ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_GS }, 174ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_LDTR }, 175ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_TR }, 176ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_GDTR }, 177ecd5b431SDavid Matlack { MASK(32), GUEST_LIMIT_IDTR }, 178ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_ES }, 179ecd5b431SDavid Matlack { 0x1f0ff, GUEST_AR_CS }, 180ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_SS }, 181ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_DS }, 182ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_FS }, 183ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_GS }, 184ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_LDTR }, 185ecd5b431SDavid Matlack { 0x1d0ff, GUEST_AR_TR }, 186ecd5b431SDavid Matlack { MASK(32), GUEST_INTR_STATE }, 187ecd5b431SDavid Matlack { MASK(32), GUEST_ACTV_STATE }, 188ecd5b431SDavid Matlack { MASK(32), GUEST_SMBASE }, 189ecd5b431SDavid Matlack { MASK(32), GUEST_SYSENTER_CS }, 190ecd5b431SDavid Matlack { MASK(32), PREEMPT_TIMER_VALUE }, 191ecd5b431SDavid Matlack 192ecd5b431SDavid Matlack { MASK(32), HOST_SYSENTER_CS }, 193ecd5b431SDavid Matlack 194ecd5b431SDavid Matlack { MASK_NATURAL, CR0_MASK }, 195ecd5b431SDavid Matlack { MASK_NATURAL, CR4_MASK }, 196ecd5b431SDavid Matlack { MASK_NATURAL, CR0_READ_SHADOW }, 197ecd5b431SDavid Matlack { MASK_NATURAL, CR4_READ_SHADOW }, 198ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_0 }, 199ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_1 }, 200ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_2 }, 201ecd5b431SDavid Matlack { MASK_NATURAL, CR3_TARGET_3 }, 202ecd5b431SDavid Matlack 203faea4fc6SLiran Alon { MASK_NATURAL, EXI_QUALIFICATION }, 204faea4fc6SLiran Alon { MASK_NATURAL, IO_RCX }, 205faea4fc6SLiran Alon { MASK_NATURAL, IO_RSI }, 206faea4fc6SLiran Alon { MASK_NATURAL, IO_RDI }, 207faea4fc6SLiran Alon { MASK_NATURAL, IO_RIP }, 208faea4fc6SLiran Alon { MASK_NATURAL, GUEST_LINEAR_ADDRESS }, 209ecd5b431SDavid Matlack 210ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_CR0 }, 211ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_CR3 }, 212ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_CR4 }, 213ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_ES }, 214ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_CS }, 215ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_SS }, 216ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_DS }, 217ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_FS }, 218ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_GS }, 219ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_LDTR }, 220ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_TR }, 221ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_GDTR }, 222ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_BASE_IDTR }, 223ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_DR7 }, 224ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_RSP }, 225ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_RIP }, 226ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_RFLAGS }, 227ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_PENDING_DEBUG }, 228ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_SYSENTER_ESP }, 229ecd5b431SDavid Matlack { MASK_NATURAL, GUEST_SYSENTER_EIP }, 230ecd5b431SDavid Matlack 231ecd5b431SDavid Matlack { MASK_NATURAL, HOST_CR0 }, 232ecd5b431SDavid Matlack { MASK_NATURAL, HOST_CR3 }, 233ecd5b431SDavid Matlack { MASK_NATURAL, HOST_CR4 }, 234ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_FS }, 235ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_GS }, 236ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_TR }, 237ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_GDTR }, 238ecd5b431SDavid Matlack { MASK_NATURAL, HOST_BASE_IDTR }, 239ecd5b431SDavid Matlack { MASK_NATURAL, HOST_SYSENTER_ESP }, 240ecd5b431SDavid Matlack { MASK_NATURAL, HOST_SYSENTER_EIP }, 241ecd5b431SDavid Matlack { MASK_NATURAL, HOST_RSP }, 242ecd5b431SDavid Matlack { MASK_NATURAL, HOST_RIP }, 243ecd5b431SDavid Matlack }; 244ecd5b431SDavid Matlack 245faea4fc6SLiran Alon enum vmcs_field_type { 246faea4fc6SLiran Alon VMCS_FIELD_TYPE_CONTROL = 0, 247faea4fc6SLiran Alon VMCS_FIELD_TYPE_READ_ONLY_DATA = 1, 248faea4fc6SLiran Alon VMCS_FIELD_TYPE_GUEST = 2, 249faea4fc6SLiran Alon VMCS_FIELD_TYPE_HOST = 3, 250faea4fc6SLiran Alon VMCS_FIELD_TYPES, 251faea4fc6SLiran Alon }; 252faea4fc6SLiran Alon 253faea4fc6SLiran Alon static inline int vmcs_field_type(struct vmcs_field *f) 254faea4fc6SLiran Alon { 255faea4fc6SLiran Alon return (f->encoding >> VMCS_FIELD_TYPE_SHIFT) & 0x3; 256faea4fc6SLiran Alon } 257faea4fc6SLiran Alon 258faea4fc6SLiran Alon static int vmcs_field_readonly(struct vmcs_field *f) 259faea4fc6SLiran Alon { 260faea4fc6SLiran Alon u64 ia32_vmx_misc; 261faea4fc6SLiran Alon 262faea4fc6SLiran Alon ia32_vmx_misc = rdmsr(MSR_IA32_VMX_MISC); 263faea4fc6SLiran Alon return !(ia32_vmx_misc & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS) && 264faea4fc6SLiran Alon (vmcs_field_type(f) == VMCS_FIELD_TYPE_READ_ONLY_DATA); 265faea4fc6SLiran Alon } 266faea4fc6SLiran Alon 267ecd5b431SDavid Matlack static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie) 268ecd5b431SDavid Matlack { 269ecd5b431SDavid Matlack u64 value; 270ecd5b431SDavid Matlack 271ecd5b431SDavid Matlack /* Incorporate the cookie and the field encoding into the value. */ 272ecd5b431SDavid Matlack value = cookie; 273ecd5b431SDavid Matlack value |= (f->encoding << 8); 274ecd5b431SDavid Matlack value |= 0xdeadbeefull << 32; 275ecd5b431SDavid Matlack 276ecd5b431SDavid Matlack return value & f->mask; 277ecd5b431SDavid Matlack } 278ecd5b431SDavid Matlack 279ecd5b431SDavid Matlack static void set_vmcs_field(struct vmcs_field *f, u8 cookie) 280ecd5b431SDavid Matlack { 281ecd5b431SDavid Matlack vmcs_write(f->encoding, vmcs_field_value(f, cookie)); 282ecd5b431SDavid Matlack } 283ecd5b431SDavid Matlack 28485cd1cf9SSean Christopherson static bool check_vmcs_field(struct vmcs_field *f, u8 cookie, u32 *max_index) 285ecd5b431SDavid Matlack { 286ecd5b431SDavid Matlack u64 expected; 287ecd5b431SDavid Matlack u64 actual; 28885cd1cf9SSean Christopherson u32 index; 289ecd5b431SDavid Matlack int ret; 290ecd5b431SDavid Matlack 291faea4fc6SLiran Alon if (f->encoding == VMX_INST_ERROR) { 292faea4fc6SLiran Alon printf("Skipping volatile field %lx\n", f->encoding); 293faea4fc6SLiran Alon return true; 294faea4fc6SLiran Alon } 295faea4fc6SLiran Alon 296ecd5b431SDavid Matlack ret = vmcs_read_checking(f->encoding, &actual); 297ecd5b431SDavid Matlack assert(!(ret & X86_EFLAGS_CF)); 298ecd5b431SDavid Matlack /* Skip VMCS fields that aren't recognized by the CPU */ 299ecd5b431SDavid Matlack if (ret & X86_EFLAGS_ZF) 300ecd5b431SDavid Matlack return true; 301ecd5b431SDavid Matlack 30285cd1cf9SSean Christopherson if (max_index) { 30385cd1cf9SSean Christopherson index = f->encoding & VMCS_FIELD_INDEX_MASK; 30485cd1cf9SSean Christopherson if (index > *max_index) 30585cd1cf9SSean Christopherson *max_index = index; 30685cd1cf9SSean Christopherson } 30785cd1cf9SSean Christopherson 30885cd1cf9SSean Christopherson if (vmcs_field_readonly(f)) { 30985cd1cf9SSean Christopherson printf("Skipping read-only field %lx\n", f->encoding); 31085cd1cf9SSean Christopherson return true; 31185cd1cf9SSean Christopherson } 31285cd1cf9SSean Christopherson 313ecd5b431SDavid Matlack expected = vmcs_field_value(f, cookie); 314ecd5b431SDavid Matlack actual &= f->mask; 315ecd5b431SDavid Matlack 316ecd5b431SDavid Matlack if (expected == actual) 317ecd5b431SDavid Matlack return true; 318ecd5b431SDavid Matlack 319d4ab68adSDavid Matlack printf("FAIL: VMWRITE/VMREAD %lx (expected: %lx, actual: %lx)\n", 320ecd5b431SDavid Matlack f->encoding, (unsigned long) expected, (unsigned long) actual); 321ecd5b431SDavid Matlack 322ecd5b431SDavid Matlack return false; 323ecd5b431SDavid Matlack } 324ecd5b431SDavid Matlack 325ecd5b431SDavid Matlack static void set_all_vmcs_fields(u8 cookie) 326ecd5b431SDavid Matlack { 327ecd5b431SDavid Matlack int i; 328ecd5b431SDavid Matlack 329ecd5b431SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) 330ecd5b431SDavid Matlack set_vmcs_field(&vmcs_fields[i], cookie); 331ecd5b431SDavid Matlack } 332ecd5b431SDavid Matlack 33385cd1cf9SSean Christopherson static bool __check_all_vmcs_fields(u8 cookie, u32 *max_index) 334ecd5b431SDavid Matlack { 335ecd5b431SDavid Matlack bool pass = true; 336ecd5b431SDavid Matlack int i; 337ecd5b431SDavid Matlack 338ecd5b431SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) { 33985cd1cf9SSean Christopherson if (!check_vmcs_field(&vmcs_fields[i], cookie, max_index)) 340ecd5b431SDavid Matlack pass = false; 341ecd5b431SDavid Matlack } 342ecd5b431SDavid Matlack 343ecd5b431SDavid Matlack return pass; 344ecd5b431SDavid Matlack } 345ecd5b431SDavid Matlack 34685cd1cf9SSean Christopherson static bool check_all_vmcs_fields(u8 cookie) 34785cd1cf9SSean Christopherson { 34885cd1cf9SSean Christopherson return __check_all_vmcs_fields(cookie, NULL); 34985cd1cf9SSean Christopherson } 35085cd1cf9SSean Christopherson 351*2b0418e4SNadav Amit static u32 find_vmcs_max_index(void) 352*2b0418e4SNadav Amit { 353*2b0418e4SNadav Amit u32 idx, width, type, enc; 354*2b0418e4SNadav Amit u64 actual; 355*2b0418e4SNadav Amit int ret; 356*2b0418e4SNadav Amit 357*2b0418e4SNadav Amit /* scan backwards and stop when found */ 358*2b0418e4SNadav Amit for (idx = (1 << 9) - 1; idx >= 0; idx--) { 359*2b0418e4SNadav Amit 360*2b0418e4SNadav Amit /* try all combinations of width and type */ 361*2b0418e4SNadav Amit for (type = 0; type < (1 << 2); type++) { 362*2b0418e4SNadav Amit for (width = 0; width < (1 << 2) ; width++) { 363*2b0418e4SNadav Amit enc = (idx << VMCS_FIELD_INDEX_SHIFT) | 364*2b0418e4SNadav Amit (type << VMCS_FIELD_TYPE_SHIFT) | 365*2b0418e4SNadav Amit (width << VMCS_FIELD_WIDTH_SHIFT); 366*2b0418e4SNadav Amit 367*2b0418e4SNadav Amit ret = vmcs_read_checking(enc, &actual); 368*2b0418e4SNadav Amit assert(!(ret & X86_EFLAGS_CF)); 369*2b0418e4SNadav Amit if (!(ret & X86_EFLAGS_ZF)) 370*2b0418e4SNadav Amit return idx; 371*2b0418e4SNadav Amit } 372*2b0418e4SNadav Amit } 373*2b0418e4SNadav Amit } 374*2b0418e4SNadav Amit /* some VMCS fields should exist */ 375*2b0418e4SNadav Amit assert(0); 376*2b0418e4SNadav Amit return 0; 377*2b0418e4SNadav Amit } 378*2b0418e4SNadav Amit 379b29804b8SThomas Huth static void test_vmwrite_vmread(void) 380ecd5b431SDavid Matlack { 381ecd5b431SDavid Matlack struct vmcs *vmcs = alloc_page(); 38285cd1cf9SSean Christopherson u32 vmcs_enum_max, max_index = 0; 383ecd5b431SDavid Matlack 3846c0ba6e7SLiran Alon vmcs->hdr.revision_id = basic.revision; 385ecd5b431SDavid Matlack assert(!vmcs_clear(vmcs)); 386ecd5b431SDavid Matlack assert(!make_vmcs_current(vmcs)); 387ecd5b431SDavid Matlack 388ecd5b431SDavid Matlack set_all_vmcs_fields(0x42); 389*2b0418e4SNadav Amit report(check_all_vmcs_fields(0x42), "VMWRITE/VMREAD"); 39085cd1cf9SSean Christopherson 391*2b0418e4SNadav Amit vmcs_enum_max = (rdmsr(MSR_IA32_VMX_VMCS_ENUM) & VMCS_FIELD_INDEX_MASK) 392*2b0418e4SNadav Amit >> VMCS_FIELD_INDEX_SHIFT; 393*2b0418e4SNadav Amit max_index = find_vmcs_max_index(); 394*2b0418e4SNadav Amit report(vmcs_enum_max == max_index, 395*2b0418e4SNadav Amit "VMX_VMCS_ENUM.MAX_INDEX expected: %x, actual: %x", 396a299895bSThomas Huth max_index, vmcs_enum_max); 397ecd5b431SDavid Matlack 398ecd5b431SDavid Matlack assert(!vmcs_clear(vmcs)); 399ecd5b431SDavid Matlack free_page(vmcs); 400ecd5b431SDavid Matlack } 401ecd5b431SDavid Matlack 402b29804b8SThomas Huth static void test_vmcs_high(void) 40359161cfaSJim Mattson { 40459161cfaSJim Mattson struct vmcs *vmcs = alloc_page(); 40559161cfaSJim Mattson 4066c0ba6e7SLiran Alon vmcs->hdr.revision_id = basic.revision; 40759161cfaSJim Mattson assert(!vmcs_clear(vmcs)); 40859161cfaSJim Mattson assert(!make_vmcs_current(vmcs)); 40959161cfaSJim Mattson 41059161cfaSJim Mattson vmcs_write(TSC_OFFSET, 0x0123456789ABCDEFull); 411a299895bSThomas Huth report(vmcs_read(TSC_OFFSET) == 0x0123456789ABCDEFull, 412a299895bSThomas Huth "VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET"); 413a299895bSThomas Huth report(vmcs_read(TSC_OFFSET_HI) == 0x01234567ull, 414a299895bSThomas Huth "VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET"); 41559161cfaSJim Mattson vmcs_write(TSC_OFFSET_HI, 0x76543210ul); 416a299895bSThomas Huth report(vmcs_read(TSC_OFFSET_HI) == 0x76543210ul, 417a299895bSThomas Huth "VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET_HI"); 418a299895bSThomas Huth report(vmcs_read(TSC_OFFSET) == 0x7654321089ABCDEFull, 419a299895bSThomas Huth "VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET_HI"); 42059161cfaSJim Mattson 42159161cfaSJim Mattson assert(!vmcs_clear(vmcs)); 42259161cfaSJim Mattson free_page(vmcs); 42359161cfaSJim Mattson } 42459161cfaSJim Mattson 425b29804b8SThomas Huth static void test_vmcs_lifecycle(void) 4266b72cf76SDavid Matlack { 4276b72cf76SDavid Matlack struct vmcs *vmcs[2] = {}; 4286b72cf76SDavid Matlack int i; 4296b72cf76SDavid Matlack 4306b72cf76SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 4316b72cf76SDavid Matlack vmcs[i] = alloc_page(); 4326c0ba6e7SLiran Alon vmcs[i]->hdr.revision_id = basic.revision; 4336b72cf76SDavid Matlack } 4346b72cf76SDavid Matlack 4356b72cf76SDavid Matlack #define VMPTRLD(_i) do { \ 4366b72cf76SDavid Matlack assert(_i < ARRAY_SIZE(vmcs)); \ 4376b72cf76SDavid Matlack assert(!make_vmcs_current(vmcs[_i])); \ 4386b72cf76SDavid Matlack printf("VMPTRLD VMCS%d\n", (_i)); \ 4396b72cf76SDavid Matlack } while (0) 4406b72cf76SDavid Matlack 4416b72cf76SDavid Matlack #define VMCLEAR(_i) do { \ 4426b72cf76SDavid Matlack assert(_i < ARRAY_SIZE(vmcs)); \ 4436b72cf76SDavid Matlack assert(!vmcs_clear(vmcs[_i])); \ 4446b72cf76SDavid Matlack printf("VMCLEAR VMCS%d\n", (_i)); \ 4456b72cf76SDavid Matlack } while (0) 4466b72cf76SDavid Matlack 4476b72cf76SDavid Matlack VMCLEAR(0); 4486b72cf76SDavid Matlack VMPTRLD(0); 4496b72cf76SDavid Matlack set_all_vmcs_fields(0); 450a299895bSThomas Huth report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]"); 4516b72cf76SDavid Matlack 4526b72cf76SDavid Matlack VMCLEAR(0); 4536b72cf76SDavid Matlack VMPTRLD(0); 454a299895bSThomas Huth report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]"); 4556b72cf76SDavid Matlack 4566b72cf76SDavid Matlack VMCLEAR(1); 457a299895bSThomas Huth report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]"); 4586b72cf76SDavid Matlack 4596b72cf76SDavid Matlack VMPTRLD(1); 4606b72cf76SDavid Matlack set_all_vmcs_fields(1); 461a299895bSThomas Huth report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]"); 4626b72cf76SDavid Matlack 4636b72cf76SDavid Matlack VMPTRLD(0); 464a299895bSThomas Huth report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0,VCMS1]"); 4656b72cf76SDavid Matlack VMPTRLD(1); 466a299895bSThomas Huth report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]"); 4676b72cf76SDavid Matlack VMPTRLD(1); 468a299895bSThomas Huth report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]"); 4696b72cf76SDavid Matlack 4706b72cf76SDavid Matlack VMCLEAR(0); 471a299895bSThomas Huth report(check_all_vmcs_fields(1), "current:VMCS1 active:[VCMS1]"); 4726b72cf76SDavid Matlack 473d4ab68adSDavid Matlack /* VMPTRLD should not erase VMWRITEs to the current VMCS */ 474d4ab68adSDavid Matlack set_all_vmcs_fields(2); 475d4ab68adSDavid Matlack VMPTRLD(1); 476a299895bSThomas Huth report(check_all_vmcs_fields(2), "current:VMCS1 active:[VCMS1]"); 477d4ab68adSDavid Matlack 4786b72cf76SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 4796b72cf76SDavid Matlack VMCLEAR(i); 4806b72cf76SDavid Matlack free_page(vmcs[i]); 4816b72cf76SDavid Matlack } 4826b72cf76SDavid Matlack 4836b72cf76SDavid Matlack #undef VMPTRLD 4846b72cf76SDavid Matlack #undef VMCLEAR 4856b72cf76SDavid Matlack } 4866b72cf76SDavid Matlack 487ffb1a9e0SJan Kiszka void vmx_set_test_stage(u32 s) 488ffb1a9e0SJan Kiszka { 489ffb1a9e0SJan Kiszka barrier(); 490ffb1a9e0SJan Kiszka stage = s; 491ffb1a9e0SJan Kiszka barrier(); 492ffb1a9e0SJan Kiszka } 493ffb1a9e0SJan Kiszka 494ffb1a9e0SJan Kiszka u32 vmx_get_test_stage(void) 495ffb1a9e0SJan Kiszka { 496ffb1a9e0SJan Kiszka u32 s; 497ffb1a9e0SJan Kiszka 498ffb1a9e0SJan Kiszka barrier(); 499ffb1a9e0SJan Kiszka s = stage; 500ffb1a9e0SJan Kiszka barrier(); 501ffb1a9e0SJan Kiszka return s; 502ffb1a9e0SJan Kiszka } 503ffb1a9e0SJan Kiszka 504ffb1a9e0SJan Kiszka void vmx_inc_test_stage(void) 505ffb1a9e0SJan Kiszka { 506ffb1a9e0SJan Kiszka barrier(); 507ffb1a9e0SJan Kiszka stage++; 508ffb1a9e0SJan Kiszka barrier(); 509ffb1a9e0SJan Kiszka } 510ffb1a9e0SJan Kiszka 5119d7eaa29SArthur Chunqi Li /* entry_sysenter */ 5129d7eaa29SArthur Chunqi Li asm( 5139d7eaa29SArthur Chunqi Li ".align 4, 0x90\n\t" 5149d7eaa29SArthur Chunqi Li ".globl entry_sysenter\n\t" 5159d7eaa29SArthur Chunqi Li "entry_sysenter:\n\t" 5169d7eaa29SArthur Chunqi Li SAVE_GPR 5179d7eaa29SArthur Chunqi Li " and $0xf, %rax\n\t" 5189d7eaa29SArthur Chunqi Li " mov %rax, %rdi\n\t" 5199d7eaa29SArthur Chunqi Li " call syscall_handler\n\t" 5209d7eaa29SArthur Chunqi Li LOAD_GPR 5219d7eaa29SArthur Chunqi Li " vmresume\n\t" 5229d7eaa29SArthur Chunqi Li ); 5239d7eaa29SArthur Chunqi Li 5249d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) syscall_handler(u64 syscall_no) 5259d7eaa29SArthur Chunqi Li { 526d5315e3dSJan Kiszka if (current->syscall_handler) 5279d7eaa29SArthur Chunqi Li current->syscall_handler(syscall_no); 5289d7eaa29SArthur Chunqi Li } 5299d7eaa29SArthur Chunqi Li 5307e207ec1SPeter Feiner static const char * const exit_reason_descriptions[] = { 5317e207ec1SPeter Feiner [VMX_EXC_NMI] = "VMX_EXC_NMI", 5327e207ec1SPeter Feiner [VMX_EXTINT] = "VMX_EXTINT", 5337e207ec1SPeter Feiner [VMX_TRIPLE_FAULT] = "VMX_TRIPLE_FAULT", 5347e207ec1SPeter Feiner [VMX_INIT] = "VMX_INIT", 5357e207ec1SPeter Feiner [VMX_SIPI] = "VMX_SIPI", 5367e207ec1SPeter Feiner [VMX_SMI_IO] = "VMX_SMI_IO", 5377e207ec1SPeter Feiner [VMX_SMI_OTHER] = "VMX_SMI_OTHER", 5387e207ec1SPeter Feiner [VMX_INTR_WINDOW] = "VMX_INTR_WINDOW", 5397e207ec1SPeter Feiner [VMX_NMI_WINDOW] = "VMX_NMI_WINDOW", 5407e207ec1SPeter Feiner [VMX_TASK_SWITCH] = "VMX_TASK_SWITCH", 5417e207ec1SPeter Feiner [VMX_CPUID] = "VMX_CPUID", 5427e207ec1SPeter Feiner [VMX_GETSEC] = "VMX_GETSEC", 5437e207ec1SPeter Feiner [VMX_HLT] = "VMX_HLT", 5447e207ec1SPeter Feiner [VMX_INVD] = "VMX_INVD", 5457e207ec1SPeter Feiner [VMX_INVLPG] = "VMX_INVLPG", 5467e207ec1SPeter Feiner [VMX_RDPMC] = "VMX_RDPMC", 5477e207ec1SPeter Feiner [VMX_RDTSC] = "VMX_RDTSC", 5487e207ec1SPeter Feiner [VMX_RSM] = "VMX_RSM", 5497e207ec1SPeter Feiner [VMX_VMCALL] = "VMX_VMCALL", 5507e207ec1SPeter Feiner [VMX_VMCLEAR] = "VMX_VMCLEAR", 5517e207ec1SPeter Feiner [VMX_VMLAUNCH] = "VMX_VMLAUNCH", 5527e207ec1SPeter Feiner [VMX_VMPTRLD] = "VMX_VMPTRLD", 5537e207ec1SPeter Feiner [VMX_VMPTRST] = "VMX_VMPTRST", 5547e207ec1SPeter Feiner [VMX_VMREAD] = "VMX_VMREAD", 5557e207ec1SPeter Feiner [VMX_VMRESUME] = "VMX_VMRESUME", 5567e207ec1SPeter Feiner [VMX_VMWRITE] = "VMX_VMWRITE", 5577e207ec1SPeter Feiner [VMX_VMXOFF] = "VMX_VMXOFF", 5587e207ec1SPeter Feiner [VMX_VMXON] = "VMX_VMXON", 5597e207ec1SPeter Feiner [VMX_CR] = "VMX_CR", 5607e207ec1SPeter Feiner [VMX_DR] = "VMX_DR", 5617e207ec1SPeter Feiner [VMX_IO] = "VMX_IO", 5627e207ec1SPeter Feiner [VMX_RDMSR] = "VMX_RDMSR", 5637e207ec1SPeter Feiner [VMX_WRMSR] = "VMX_WRMSR", 5647e207ec1SPeter Feiner [VMX_FAIL_STATE] = "VMX_FAIL_STATE", 5657e207ec1SPeter Feiner [VMX_FAIL_MSR] = "VMX_FAIL_MSR", 5667e207ec1SPeter Feiner [VMX_MWAIT] = "VMX_MWAIT", 5677e207ec1SPeter Feiner [VMX_MTF] = "VMX_MTF", 5687e207ec1SPeter Feiner [VMX_MONITOR] = "VMX_MONITOR", 5697e207ec1SPeter Feiner [VMX_PAUSE] = "VMX_PAUSE", 5707e207ec1SPeter Feiner [VMX_FAIL_MCHECK] = "VMX_FAIL_MCHECK", 5717e207ec1SPeter Feiner [VMX_TPR_THRESHOLD] = "VMX_TPR_THRESHOLD", 5727e207ec1SPeter Feiner [VMX_APIC_ACCESS] = "VMX_APIC_ACCESS", 57367fdc49eSArbel Moshe [VMX_EOI_INDUCED] = "VMX_EOI_INDUCED", 5747e207ec1SPeter Feiner [VMX_GDTR_IDTR] = "VMX_GDTR_IDTR", 5757e207ec1SPeter Feiner [VMX_LDTR_TR] = "VMX_LDTR_TR", 5767e207ec1SPeter Feiner [VMX_EPT_VIOLATION] = "VMX_EPT_VIOLATION", 5777e207ec1SPeter Feiner [VMX_EPT_MISCONFIG] = "VMX_EPT_MISCONFIG", 5787e207ec1SPeter Feiner [VMX_INVEPT] = "VMX_INVEPT", 5797e207ec1SPeter Feiner [VMX_PREEMPT] = "VMX_PREEMPT", 5807e207ec1SPeter Feiner [VMX_INVVPID] = "VMX_INVVPID", 5817e207ec1SPeter Feiner [VMX_WBINVD] = "VMX_WBINVD", 5827e207ec1SPeter Feiner [VMX_XSETBV] = "VMX_XSETBV", 5837e207ec1SPeter Feiner [VMX_APIC_WRITE] = "VMX_APIC_WRITE", 5847e207ec1SPeter Feiner [VMX_RDRAND] = "VMX_RDRAND", 5857e207ec1SPeter Feiner [VMX_INVPCID] = "VMX_INVPCID", 5867e207ec1SPeter Feiner [VMX_VMFUNC] = "VMX_VMFUNC", 5877e207ec1SPeter Feiner [VMX_RDSEED] = "VMX_RDSEED", 5887e207ec1SPeter Feiner [VMX_PML_FULL] = "VMX_PML_FULL", 5897e207ec1SPeter Feiner [VMX_XSAVES] = "VMX_XSAVES", 5907e207ec1SPeter Feiner [VMX_XRSTORS] = "VMX_XRSTORS", 5917e207ec1SPeter Feiner }; 5927e207ec1SPeter Feiner 5937e207ec1SPeter Feiner const char *exit_reason_description(u64 reason) 5947e207ec1SPeter Feiner { 5957e207ec1SPeter Feiner if (reason >= ARRAY_SIZE(exit_reason_descriptions)) 5967e207ec1SPeter Feiner return "(unknown)"; 5977e207ec1SPeter Feiner return exit_reason_descriptions[reason] ? : "(unused)"; 5987e207ec1SPeter Feiner } 5997e207ec1SPeter Feiner 6003ee34093SArthur Chunqi Li void print_vmexit_info() 6019d7eaa29SArthur Chunqi Li { 6029d7eaa29SArthur Chunqi Li u64 guest_rip, guest_rsp; 6039d7eaa29SArthur Chunqi Li ulong reason = vmcs_read(EXI_REASON) & 0xff; 6049d7eaa29SArthur Chunqi Li ulong exit_qual = vmcs_read(EXI_QUALIFICATION); 6059d7eaa29SArthur Chunqi Li guest_rip = vmcs_read(GUEST_RIP); 6069d7eaa29SArthur Chunqi Li guest_rsp = vmcs_read(GUEST_RSP); 6079d7eaa29SArthur Chunqi Li printf("VMEXIT info:\n"); 608b006d7ebSAndrew Jones printf("\tvmexit reason = %ld\n", reason); 609fd6aada0SRadim Krčmář printf("\texit qualification = %#lx\n", exit_qual); 610b006d7ebSAndrew Jones printf("\tBit 31 of reason = %lx\n", (vmcs_read(EXI_REASON) >> 31) & 1); 611fd6aada0SRadim Krčmář printf("\tguest_rip = %#lx\n", guest_rip); 612fd6aada0SRadim Krčmář printf("\tRAX=%#lx RBX=%#lx RCX=%#lx RDX=%#lx\n", 6139d7eaa29SArthur Chunqi Li regs.rax, regs.rbx, regs.rcx, regs.rdx); 614fd6aada0SRadim Krčmář printf("\tRSP=%#lx RBP=%#lx RSI=%#lx RDI=%#lx\n", 6159d7eaa29SArthur Chunqi Li guest_rsp, regs.rbp, regs.rsi, regs.rdi); 616fd6aada0SRadim Krčmář printf("\tR8 =%#lx R9 =%#lx R10=%#lx R11=%#lx\n", 6179d7eaa29SArthur Chunqi Li regs.r8, regs.r9, regs.r10, regs.r11); 618fd6aada0SRadim Krčmář printf("\tR12=%#lx R13=%#lx R14=%#lx R15=%#lx\n", 6199d7eaa29SArthur Chunqi Li regs.r12, regs.r13, regs.r14, regs.r15); 6209d7eaa29SArthur Chunqi Li } 6219d7eaa29SArthur Chunqi Li 6223b50efe3SPeter Feiner void 6233b50efe3SPeter Feiner print_vmentry_failure_info(struct vmentry_failure *failure) { 6243b50efe3SPeter Feiner if (failure->early) { 6253b50efe3SPeter Feiner printf("Early %s failure: ", failure->instr); 6263b50efe3SPeter Feiner switch (failure->flags & VMX_ENTRY_FLAGS) { 627ce154ba8SPaolo Bonzini case X86_EFLAGS_CF: 6283b50efe3SPeter Feiner printf("current-VMCS pointer is not valid.\n"); 6293b50efe3SPeter Feiner break; 630ce154ba8SPaolo Bonzini case X86_EFLAGS_ZF: 6313b50efe3SPeter Feiner printf("error number is %ld. See Intel 30.4.\n", 6323b50efe3SPeter Feiner vmcs_read(VMX_INST_ERROR)); 6333b50efe3SPeter Feiner break; 6343b50efe3SPeter Feiner default: 6353b50efe3SPeter Feiner printf("unexpected flags %lx!\n", failure->flags); 6363b50efe3SPeter Feiner } 6373b50efe3SPeter Feiner } else { 6383b50efe3SPeter Feiner u64 reason = vmcs_read(EXI_REASON); 6393b50efe3SPeter Feiner u64 qual = vmcs_read(EXI_QUALIFICATION); 6403b50efe3SPeter Feiner 641fd6aada0SRadim Krčmář printf("Non-early %s failure (reason=%#lx, qual=%#lx): ", 6423b50efe3SPeter Feiner failure->instr, reason, qual); 6433b50efe3SPeter Feiner 6443b50efe3SPeter Feiner switch (reason & 0xff) { 6453b50efe3SPeter Feiner case VMX_FAIL_STATE: 6463b50efe3SPeter Feiner printf("invalid guest state\n"); 6473b50efe3SPeter Feiner break; 6483b50efe3SPeter Feiner case VMX_FAIL_MSR: 6493b50efe3SPeter Feiner printf("MSR loading\n"); 6503b50efe3SPeter Feiner break; 6513b50efe3SPeter Feiner case VMX_FAIL_MCHECK: 6523b50efe3SPeter Feiner printf("machine-check event\n"); 6533b50efe3SPeter Feiner break; 6543b50efe3SPeter Feiner default: 6553b50efe3SPeter Feiner printf("unexpected basic exit reason %ld\n", 6563b50efe3SPeter Feiner reason & 0xff); 6573b50efe3SPeter Feiner } 6583b50efe3SPeter Feiner 6593b50efe3SPeter Feiner if (!(reason & VMX_ENTRY_FAILURE)) 6603b50efe3SPeter Feiner printf("\tVMX_ENTRY_FAILURE BIT NOT SET!\n"); 6613b50efe3SPeter Feiner 6623b50efe3SPeter Feiner if (reason & 0x7fff0000) 6633b50efe3SPeter Feiner printf("\tRESERVED BITS SET!\n"); 6643b50efe3SPeter Feiner } 6653b50efe3SPeter Feiner } 6663b50efe3SPeter Feiner 6672f6828d7SDavid Matlack /* 6682f6828d7SDavid Matlack * VMCLEAR should ensures all VMCS state is flushed to the VMCS 6692f6828d7SDavid Matlack * region in memory. 6702f6828d7SDavid Matlack */ 6712f6828d7SDavid Matlack static void test_vmclear_flushing(void) 6722f6828d7SDavid Matlack { 6732f6828d7SDavid Matlack struct vmcs *vmcs[3] = {}; 6742f6828d7SDavid Matlack int i; 6752f6828d7SDavid Matlack 6762f6828d7SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 6772f6828d7SDavid Matlack vmcs[i] = alloc_page(); 6782f6828d7SDavid Matlack } 6792f6828d7SDavid Matlack 6806c0ba6e7SLiran Alon vmcs[0]->hdr.revision_id = basic.revision; 6812f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[0])); 6822f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[0])); 6832f6828d7SDavid Matlack set_all_vmcs_fields(0x86); 6842f6828d7SDavid Matlack 6852f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[0])); 6862f6828d7SDavid Matlack memcpy(vmcs[1], vmcs[0], basic.size); 6872f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[1])); 688a299895bSThomas Huth report(check_all_vmcs_fields(0x86), 689a299895bSThomas Huth "test vmclear flush (current VMCS)"); 6902f6828d7SDavid Matlack 6912f6828d7SDavid Matlack set_all_vmcs_fields(0x87); 6922f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[0])); 6932f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[1])); 6942f6828d7SDavid Matlack memcpy(vmcs[2], vmcs[1], basic.size); 6952f6828d7SDavid Matlack assert(!make_vmcs_current(vmcs[2])); 696a299895bSThomas Huth report(check_all_vmcs_fields(0x87), 697a299895bSThomas Huth "test vmclear flush (!current VMCS)"); 6982f6828d7SDavid Matlack 6992f6828d7SDavid Matlack for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 7002f6828d7SDavid Matlack assert(!vmcs_clear(vmcs[i])); 7012f6828d7SDavid Matlack free_page(vmcs[i]); 7022f6828d7SDavid Matlack } 7032f6828d7SDavid Matlack } 7043b50efe3SPeter Feiner 7059d7eaa29SArthur Chunqi Li static void test_vmclear(void) 7069d7eaa29SArthur Chunqi Li { 707daeec979SBandan Das struct vmcs *tmp_root; 708e2cf1c9dSEduardo Habkost int width = cpuid_maxphyaddr(); 709daeec979SBandan Das 710daeec979SBandan Das /* 711daeec979SBandan Das * Note- The tests below do not necessarily have a 712daeec979SBandan Das * valid VMCS, but that's ok since the invalid vmcs 713daeec979SBandan Das * is only used for a specific test and is discarded 714daeec979SBandan Das * without touching its contents 715daeec979SBandan Das */ 716daeec979SBandan Das 717daeec979SBandan Das /* Unaligned page access */ 718daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs_root + 1); 719a299895bSThomas Huth report(vmcs_clear(tmp_root) == 1, "test vmclear with unaligned vmcs"); 720daeec979SBandan Das 721daeec979SBandan Das /* gpa bits beyond physical address width are set*/ 722daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs_root | 723daeec979SBandan Das ((u64)1 << (width+1))); 724a299895bSThomas Huth report(vmcs_clear(tmp_root) == 1, 725a299895bSThomas Huth "test vmclear with vmcs address bits set beyond physical address width"); 726daeec979SBandan Das 727daeec979SBandan Das /* Pass VMXON region */ 728c937d495SLiran Alon tmp_root = (struct vmcs *)bsp_vmxon_region; 729a299895bSThomas Huth report(vmcs_clear(tmp_root) == 1, "test vmclear with vmxon region"); 730daeec979SBandan Das 731daeec979SBandan Das /* Valid VMCS */ 732a299895bSThomas Huth report(vmcs_clear(vmcs_root) == 0, 733a299895bSThomas Huth "test vmclear with valid vmcs region"); 734daeec979SBandan Das 7352f6828d7SDavid Matlack test_vmclear_flushing(); 7369d7eaa29SArthur Chunqi Li } 7379d7eaa29SArthur Chunqi Li 7389d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) guest_main(void) 7399d7eaa29SArthur Chunqi Li { 740794c67a9SPeter Feiner if (current->v2) 741794c67a9SPeter Feiner v2_guest_main(); 742794c67a9SPeter Feiner else 7439d7eaa29SArthur Chunqi Li current->guest_main(); 7449d7eaa29SArthur Chunqi Li } 7459d7eaa29SArthur Chunqi Li 7469d7eaa29SArthur Chunqi Li /* guest_entry */ 7479d7eaa29SArthur Chunqi Li asm( 7489d7eaa29SArthur Chunqi Li ".align 4, 0x90\n\t" 7499d7eaa29SArthur Chunqi Li ".globl entry_guest\n\t" 7509d7eaa29SArthur Chunqi Li "guest_entry:\n\t" 7519d7eaa29SArthur Chunqi Li " call guest_main\n\t" 7529d7eaa29SArthur Chunqi Li " mov $1, %edi\n\t" 7539d7eaa29SArthur Chunqi Li " call hypercall\n\t" 7549d7eaa29SArthur Chunqi Li ); 7559d7eaa29SArthur Chunqi Li 7566884af61SArthur Chunqi Li /* EPT paging structure related functions */ 75769c531c8SPeter Feiner /* split_large_ept_entry: Split a 2M/1G large page into 512 smaller PTEs. 75869c531c8SPeter Feiner @ptep : large page table entry to split 75969c531c8SPeter Feiner @level : level of ptep (2 or 3) 76069c531c8SPeter Feiner */ 76169c531c8SPeter Feiner static void split_large_ept_entry(unsigned long *ptep, int level) 76269c531c8SPeter Feiner { 76369c531c8SPeter Feiner unsigned long *new_pt; 76469c531c8SPeter Feiner unsigned long gpa; 76569c531c8SPeter Feiner unsigned long pte; 76669c531c8SPeter Feiner unsigned long prototype; 76769c531c8SPeter Feiner int i; 76869c531c8SPeter Feiner 76969c531c8SPeter Feiner pte = *ptep; 77069c531c8SPeter Feiner assert(pte & EPT_PRESENT); 77169c531c8SPeter Feiner assert(pte & EPT_LARGE_PAGE); 77269c531c8SPeter Feiner assert(level == 2 || level == 3); 77369c531c8SPeter Feiner 77469c531c8SPeter Feiner new_pt = alloc_page(); 77569c531c8SPeter Feiner assert(new_pt); 77669c531c8SPeter Feiner 77769c531c8SPeter Feiner prototype = pte & ~EPT_ADDR_MASK; 77869c531c8SPeter Feiner if (level == 2) 77969c531c8SPeter Feiner prototype &= ~EPT_LARGE_PAGE; 78069c531c8SPeter Feiner 78169c531c8SPeter Feiner gpa = pte & EPT_ADDR_MASK; 78269c531c8SPeter Feiner for (i = 0; i < EPT_PGDIR_ENTRIES; i++) { 78369c531c8SPeter Feiner new_pt[i] = prototype | gpa; 78469c531c8SPeter Feiner gpa += 1ul << EPT_LEVEL_SHIFT(level - 1); 78569c531c8SPeter Feiner } 78669c531c8SPeter Feiner 78769c531c8SPeter Feiner pte &= ~EPT_LARGE_PAGE; 78869c531c8SPeter Feiner pte &= ~EPT_ADDR_MASK; 78969c531c8SPeter Feiner pte |= virt_to_phys(new_pt); 79069c531c8SPeter Feiner 79169c531c8SPeter Feiner *ptep = pte; 79269c531c8SPeter Feiner } 79369c531c8SPeter Feiner 7946884af61SArthur Chunqi Li /* install_ept_entry : Install a page to a given level in EPT 7956884af61SArthur Chunqi Li @pml4 : addr of pml4 table 7966884af61SArthur Chunqi Li @pte_level : level of PTE to set 7976884af61SArthur Chunqi Li @guest_addr : physical address of guest 7986884af61SArthur Chunqi Li @pte : pte value to set 7996884af61SArthur Chunqi Li @pt_page : address of page table, NULL for a new page 8006884af61SArthur Chunqi Li */ 8016884af61SArthur Chunqi Li void install_ept_entry(unsigned long *pml4, 8026884af61SArthur Chunqi Li int pte_level, 8036884af61SArthur Chunqi Li unsigned long guest_addr, 8046884af61SArthur Chunqi Li unsigned long pte, 8056884af61SArthur Chunqi Li unsigned long *pt_page) 8066884af61SArthur Chunqi Li { 8076884af61SArthur Chunqi Li int level; 8086884af61SArthur Chunqi Li unsigned long *pt = pml4; 8096884af61SArthur Chunqi Li unsigned offset; 8106884af61SArthur Chunqi Li 811dff740c0SPeter Feiner /* EPT only uses 48 bits of GPA. */ 812dff740c0SPeter Feiner assert(guest_addr < (1ul << 48)); 813dff740c0SPeter Feiner 8146884af61SArthur Chunqi Li for (level = EPT_PAGE_LEVEL; level > pte_level; --level) { 815a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) 8166884af61SArthur Chunqi Li & EPT_PGDIR_MASK; 8176884af61SArthur Chunqi Li if (!(pt[offset] & (EPT_PRESENT))) { 8186884af61SArthur Chunqi Li unsigned long *new_pt = pt_page; 8196884af61SArthur Chunqi Li if (!new_pt) 8206884af61SArthur Chunqi Li new_pt = alloc_page(); 8216884af61SArthur Chunqi Li else 8226884af61SArthur Chunqi Li pt_page = 0; 8236884af61SArthur Chunqi Li memset(new_pt, 0, PAGE_SIZE); 8246884af61SArthur Chunqi Li pt[offset] = virt_to_phys(new_pt) 8256884af61SArthur Chunqi Li | EPT_RA | EPT_WA | EPT_EA; 82669c531c8SPeter Feiner } else if (pt[offset] & EPT_LARGE_PAGE) 82769c531c8SPeter Feiner split_large_ept_entry(&pt[offset], level); 82800b5c590SPeter Feiner pt = phys_to_virt(pt[offset] & EPT_ADDR_MASK); 8296884af61SArthur Chunqi Li } 830a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) & EPT_PGDIR_MASK; 8316884af61SArthur Chunqi Li pt[offset] = pte; 8326884af61SArthur Chunqi Li } 8336884af61SArthur Chunqi Li 8346884af61SArthur Chunqi Li /* Map a page, @perm is the permission of the page */ 8356884af61SArthur Chunqi Li void install_ept(unsigned long *pml4, 8366884af61SArthur Chunqi Li unsigned long phys, 8376884af61SArthur Chunqi Li unsigned long guest_addr, 8386884af61SArthur Chunqi Li u64 perm) 8396884af61SArthur Chunqi Li { 8406884af61SArthur Chunqi Li install_ept_entry(pml4, 1, guest_addr, (phys & PAGE_MASK) | perm, 0); 8416884af61SArthur Chunqi Li } 8426884af61SArthur Chunqi Li 8436884af61SArthur Chunqi Li /* Map a 1G-size page */ 8446884af61SArthur Chunqi Li void install_1g_ept(unsigned long *pml4, 8456884af61SArthur Chunqi Li unsigned long phys, 8466884af61SArthur Chunqi Li unsigned long guest_addr, 8476884af61SArthur Chunqi Li u64 perm) 8486884af61SArthur Chunqi Li { 8496884af61SArthur Chunqi Li install_ept_entry(pml4, 3, guest_addr, 8506884af61SArthur Chunqi Li (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 8516884af61SArthur Chunqi Li } 8526884af61SArthur Chunqi Li 8536884af61SArthur Chunqi Li /* Map a 2M-size page */ 8546884af61SArthur Chunqi Li void install_2m_ept(unsigned long *pml4, 8556884af61SArthur Chunqi Li unsigned long phys, 8566884af61SArthur Chunqi Li unsigned long guest_addr, 8576884af61SArthur Chunqi Li u64 perm) 8586884af61SArthur Chunqi Li { 8596884af61SArthur Chunqi Li install_ept_entry(pml4, 2, guest_addr, 8606884af61SArthur Chunqi Li (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 8616884af61SArthur Chunqi Li } 8626884af61SArthur Chunqi Li 8636884af61SArthur Chunqi Li /* setup_ept_range : Setup a range of 1:1 mapped page to EPT paging structure. 8646884af61SArthur Chunqi Li @start : start address of guest page 8656884af61SArthur Chunqi Li @len : length of address to be mapped 8666884af61SArthur Chunqi Li @map_1g : whether 1G page map is used 8676884af61SArthur Chunqi Li @map_2m : whether 2M page map is used 8686884af61SArthur Chunqi Li @perm : permission for every page 8696884af61SArthur Chunqi Li */ 870b947e241SJan Kiszka void setup_ept_range(unsigned long *pml4, unsigned long start, 8716884af61SArthur Chunqi Li unsigned long len, int map_1g, int map_2m, u64 perm) 8726884af61SArthur Chunqi Li { 8736884af61SArthur Chunqi Li u64 phys = start; 8746884af61SArthur Chunqi Li u64 max = (u64)len + (u64)start; 8756884af61SArthur Chunqi Li 8766884af61SArthur Chunqi Li if (map_1g) { 8776884af61SArthur Chunqi Li while (phys + PAGE_SIZE_1G <= max) { 8786884af61SArthur Chunqi Li install_1g_ept(pml4, phys, phys, perm); 8796884af61SArthur Chunqi Li phys += PAGE_SIZE_1G; 8806884af61SArthur Chunqi Li } 8816884af61SArthur Chunqi Li } 8826884af61SArthur Chunqi Li if (map_2m) { 8836884af61SArthur Chunqi Li while (phys + PAGE_SIZE_2M <= max) { 8846884af61SArthur Chunqi Li install_2m_ept(pml4, phys, phys, perm); 8856884af61SArthur Chunqi Li phys += PAGE_SIZE_2M; 8866884af61SArthur Chunqi Li } 8876884af61SArthur Chunqi Li } 8886884af61SArthur Chunqi Li while (phys + PAGE_SIZE <= max) { 8896884af61SArthur Chunqi Li install_ept(pml4, phys, phys, perm); 8906884af61SArthur Chunqi Li phys += PAGE_SIZE; 8916884af61SArthur Chunqi Li } 8926884af61SArthur Chunqi Li } 8936884af61SArthur Chunqi Li 8946884af61SArthur Chunqi Li /* get_ept_pte : Get the PTE of a given level in EPT, 8956884af61SArthur Chunqi Li @level == 1 means get the latest level*/ 896b4a405c3SRadim Krčmář bool get_ept_pte(unsigned long *pml4, unsigned long guest_addr, int level, 897b4a405c3SRadim Krčmář unsigned long *pte) 8986884af61SArthur Chunqi Li { 8996884af61SArthur Chunqi Li int l; 900b4a405c3SRadim Krčmář unsigned long *pt = pml4, iter_pte; 9016884af61SArthur Chunqi Li unsigned offset; 9026884af61SArthur Chunqi Li 903dff740c0SPeter Feiner assert(level >= 1 && level <= 4); 904dff740c0SPeter Feiner 9052ca6f1f3SPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 906a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 907b4a405c3SRadim Krčmář iter_pte = pt[offset]; 9086884af61SArthur Chunqi Li if (l == level) 9092ca6f1f3SPaolo Bonzini break; 910b4a405c3SRadim Krčmář if (l < 4 && (iter_pte & EPT_LARGE_PAGE)) 911b4a405c3SRadim Krčmář return false; 9128922f1fbSRadim Krčmář if (!(iter_pte & (EPT_PRESENT))) 9138922f1fbSRadim Krčmář return false; 914b4a405c3SRadim Krčmář pt = (unsigned long *)(iter_pte & EPT_ADDR_MASK); 9156884af61SArthur Chunqi Li } 916a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 917b4a405c3SRadim Krčmář if (pte) 918b4a405c3SRadim Krčmář *pte = pt[offset]; 919b4a405c3SRadim Krčmář return true; 9206884af61SArthur Chunqi Li } 9216884af61SArthur Chunqi Li 922521820dbSPaolo Bonzini static void clear_ept_ad_pte(unsigned long *pml4, unsigned long guest_addr) 923521820dbSPaolo Bonzini { 924521820dbSPaolo Bonzini int l; 925521820dbSPaolo Bonzini unsigned long *pt = pml4; 926521820dbSPaolo Bonzini u64 pte; 927521820dbSPaolo Bonzini unsigned offset; 928521820dbSPaolo Bonzini 929521820dbSPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 930521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 931521820dbSPaolo Bonzini pt[offset] &= ~(EPT_ACCESS_FLAG|EPT_DIRTY_FLAG); 932521820dbSPaolo Bonzini pte = pt[offset]; 933521820dbSPaolo Bonzini if (l == 1 || (l < 4 && (pte & EPT_LARGE_PAGE))) 934521820dbSPaolo Bonzini break; 935521820dbSPaolo Bonzini pt = (unsigned long *)(pte & EPT_ADDR_MASK); 936521820dbSPaolo Bonzini } 937521820dbSPaolo Bonzini } 938521820dbSPaolo Bonzini 939521820dbSPaolo Bonzini /* clear_ept_ad : Clear EPT A/D bits for the page table walk and the 940521820dbSPaolo Bonzini final GPA of a guest address. */ 941521820dbSPaolo Bonzini void clear_ept_ad(unsigned long *pml4, u64 guest_cr3, 942521820dbSPaolo Bonzini unsigned long guest_addr) 943521820dbSPaolo Bonzini { 944521820dbSPaolo Bonzini int l; 945521820dbSPaolo Bonzini unsigned long *pt = (unsigned long *)guest_cr3, gpa; 946521820dbSPaolo Bonzini u64 pte, offset_in_page; 947521820dbSPaolo Bonzini unsigned offset; 948521820dbSPaolo Bonzini 949521820dbSPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 950521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 951521820dbSPaolo Bonzini 952521820dbSPaolo Bonzini clear_ept_ad_pte(pml4, (u64) &pt[offset]); 953521820dbSPaolo Bonzini pte = pt[offset]; 954521820dbSPaolo Bonzini if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 955521820dbSPaolo Bonzini break; 956521820dbSPaolo Bonzini if (!(pte & PT_PRESENT_MASK)) 957521820dbSPaolo Bonzini return; 958521820dbSPaolo Bonzini pt = (unsigned long *)(pte & PT_ADDR_MASK); 959521820dbSPaolo Bonzini } 960521820dbSPaolo Bonzini 961521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 962521820dbSPaolo Bonzini offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 963521820dbSPaolo Bonzini gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 964521820dbSPaolo Bonzini clear_ept_ad_pte(pml4, gpa); 965521820dbSPaolo Bonzini } 966521820dbSPaolo Bonzini 967521820dbSPaolo Bonzini /* check_ept_ad : Check the content of EPT A/D bits for the page table 968521820dbSPaolo Bonzini walk and the final GPA of a guest address. */ 969521820dbSPaolo Bonzini void check_ept_ad(unsigned long *pml4, u64 guest_cr3, 970521820dbSPaolo Bonzini unsigned long guest_addr, int expected_gpa_ad, 971521820dbSPaolo Bonzini int expected_pt_ad) 972521820dbSPaolo Bonzini { 973521820dbSPaolo Bonzini int l; 974521820dbSPaolo Bonzini unsigned long *pt = (unsigned long *)guest_cr3, gpa; 975521820dbSPaolo Bonzini u64 ept_pte, pte, offset_in_page; 976521820dbSPaolo Bonzini unsigned offset; 977521820dbSPaolo Bonzini bool bad_pt_ad = false; 978521820dbSPaolo Bonzini 979521820dbSPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 980521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 981521820dbSPaolo Bonzini 982b4a405c3SRadim Krčmář if (!get_ept_pte(pml4, (u64) &pt[offset], 1, &ept_pte)) { 983b4a405c3SRadim Krčmář printf("EPT - guest level %d page table is not mapped.\n", l); 984521820dbSPaolo Bonzini return; 985b4a405c3SRadim Krčmář } 986521820dbSPaolo Bonzini 987521820dbSPaolo Bonzini if (!bad_pt_ad) { 988521820dbSPaolo Bonzini bad_pt_ad |= (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) != expected_pt_ad; 989521820dbSPaolo Bonzini if (bad_pt_ad) 990a299895bSThomas Huth report(false, 991a299895bSThomas Huth "EPT - guest level %d page table A=%d/D=%d", 992a299895bSThomas Huth l, 993521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_ACCESS_FLAG), 994521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_DIRTY_FLAG)); 995521820dbSPaolo Bonzini } 996521820dbSPaolo Bonzini 997521820dbSPaolo Bonzini pte = pt[offset]; 998521820dbSPaolo Bonzini if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 999521820dbSPaolo Bonzini break; 1000521820dbSPaolo Bonzini if (!(pte & PT_PRESENT_MASK)) 1001521820dbSPaolo Bonzini return; 1002521820dbSPaolo Bonzini pt = (unsigned long *)(pte & PT_ADDR_MASK); 1003521820dbSPaolo Bonzini } 1004521820dbSPaolo Bonzini 1005521820dbSPaolo Bonzini if (!bad_pt_ad) 1006a299895bSThomas Huth report(true, "EPT - guest page table structures A=%d/D=%d", 1007521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_ACCESS_FLAG), 1008521820dbSPaolo Bonzini !!(expected_pt_ad & EPT_DIRTY_FLAG)); 1009521820dbSPaolo Bonzini 1010521820dbSPaolo Bonzini offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1011521820dbSPaolo Bonzini offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 1012521820dbSPaolo Bonzini gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 1013521820dbSPaolo Bonzini 1014b4a405c3SRadim Krčmář if (!get_ept_pte(pml4, gpa, 1, &ept_pte)) { 1015a299895bSThomas Huth report(false, "EPT - guest physical address is not mapped"); 1016b4a405c3SRadim Krčmář return; 1017b4a405c3SRadim Krčmář } 1018a299895bSThomas Huth report((ept_pte & (EPT_ACCESS_FLAG | EPT_DIRTY_FLAG)) == expected_gpa_ad, 1019a299895bSThomas Huth "EPT - guest physical address A=%d/D=%d", 1020521820dbSPaolo Bonzini !!(expected_gpa_ad & EPT_ACCESS_FLAG), 1021521820dbSPaolo Bonzini !!(expected_gpa_ad & EPT_DIRTY_FLAG)); 1022521820dbSPaolo Bonzini } 1023521820dbSPaolo Bonzini 1024521820dbSPaolo Bonzini 10252f888fccSBandan Das void ept_sync(int type, u64 eptp) 10262f888fccSBandan Das { 10272f888fccSBandan Das switch (type) { 10282f888fccSBandan Das case INVEPT_SINGLE: 10292f888fccSBandan Das if (ept_vpid.val & EPT_CAP_INVEPT_SINGLE) { 10302f888fccSBandan Das invept(INVEPT_SINGLE, eptp); 10312f888fccSBandan Das break; 10322f888fccSBandan Das } 10332f888fccSBandan Das /* else fall through */ 10342f888fccSBandan Das case INVEPT_GLOBAL: 10352f888fccSBandan Das if (ept_vpid.val & EPT_CAP_INVEPT_ALL) { 10362f888fccSBandan Das invept(INVEPT_GLOBAL, eptp); 10372f888fccSBandan Das break; 10382f888fccSBandan Das } 10392f888fccSBandan Das /* else fall through */ 10402f888fccSBandan Das default: 10412f888fccSBandan Das printf("WARNING: invept is not supported!\n"); 10422f888fccSBandan Das } 10432f888fccSBandan Das } 10442f888fccSBandan Das 1045dff740c0SPeter Feiner void set_ept_pte(unsigned long *pml4, unsigned long guest_addr, 10466884af61SArthur Chunqi Li int level, u64 pte_val) 10476884af61SArthur Chunqi Li { 10486884af61SArthur Chunqi Li int l; 10496884af61SArthur Chunqi Li unsigned long *pt = pml4; 10506884af61SArthur Chunqi Li unsigned offset; 10516884af61SArthur Chunqi Li 1052dff740c0SPeter Feiner assert(level >= 1 && level <= 4); 1053dff740c0SPeter Feiner 10542ca6f1f3SPaolo Bonzini for (l = EPT_PAGE_LEVEL; ; --l) { 1055a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 10562ca6f1f3SPaolo Bonzini if (l == level) 10572ca6f1f3SPaolo Bonzini break; 1058dff740c0SPeter Feiner assert(pt[offset] & EPT_PRESENT); 105900b5c590SPeter Feiner pt = (unsigned long *)(pt[offset] & EPT_ADDR_MASK); 10606884af61SArthur Chunqi Li } 1061a969e087SPeter Feiner offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 10626884af61SArthur Chunqi Li pt[offset] = pte_val; 10636884af61SArthur Chunqi Li } 10646884af61SArthur Chunqi Li 10658ab53b95SPeter Feiner bool ept_2m_supported(void) 10668ab53b95SPeter Feiner { 10678ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_2M_PAGE; 10688ab53b95SPeter Feiner } 10698ab53b95SPeter Feiner 10708ab53b95SPeter Feiner bool ept_1g_supported(void) 10718ab53b95SPeter Feiner { 10728ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_1G_PAGE; 10738ab53b95SPeter Feiner } 10748ab53b95SPeter Feiner 10758ab53b95SPeter Feiner bool ept_huge_pages_supported(int level) 10768ab53b95SPeter Feiner { 10778ab53b95SPeter Feiner if (level == 2) 10788ab53b95SPeter Feiner return ept_2m_supported(); 10798ab53b95SPeter Feiner else if (level == 3) 10808ab53b95SPeter Feiner return ept_1g_supported(); 10818ab53b95SPeter Feiner else 10828ab53b95SPeter Feiner return false; 10838ab53b95SPeter Feiner } 10848ab53b95SPeter Feiner 10858ab53b95SPeter Feiner bool ept_execute_only_supported(void) 10868ab53b95SPeter Feiner { 10878ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_WT; 10888ab53b95SPeter Feiner } 10898ab53b95SPeter Feiner 10908ab53b95SPeter Feiner bool ept_ad_bits_supported(void) 10918ab53b95SPeter Feiner { 10928ab53b95SPeter Feiner return ept_vpid.val & EPT_CAP_AD_FLAG; 10938ab53b95SPeter Feiner } 10948ab53b95SPeter Feiner 1095b093c6ceSWanpeng Li void vpid_sync(int type, u16 vpid) 1096b093c6ceSWanpeng Li { 1097b093c6ceSWanpeng Li switch(type) { 1098aedfd771SJim Mattson case INVVPID_CONTEXT_GLOBAL: 1099aedfd771SJim Mattson if (ept_vpid.val & VPID_CAP_INVVPID_CXTGLB) { 1100aedfd771SJim Mattson invvpid(INVVPID_CONTEXT_GLOBAL, vpid, 0); 1101b093c6ceSWanpeng Li break; 1102b093c6ceSWanpeng Li } 1103b093c6ceSWanpeng Li case INVVPID_ALL: 1104b093c6ceSWanpeng Li if (ept_vpid.val & VPID_CAP_INVVPID_ALL) { 1105b093c6ceSWanpeng Li invvpid(INVVPID_ALL, vpid, 0); 1106b093c6ceSWanpeng Li break; 1107b093c6ceSWanpeng Li } 1108b093c6ceSWanpeng Li default: 1109b093c6ceSWanpeng Li printf("WARNING: invvpid is not supported\n"); 1110b093c6ceSWanpeng Li } 1111b093c6ceSWanpeng Li } 11126884af61SArthur Chunqi Li 11139d7eaa29SArthur Chunqi Li static void init_vmcs_ctrl(void) 11149d7eaa29SArthur Chunqi Li { 11159d7eaa29SArthur Chunqi Li /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 11169d7eaa29SArthur Chunqi Li /* 26.2.1.1 */ 11179d7eaa29SArthur Chunqi Li vmcs_write(PIN_CONTROLS, ctrl_pin); 11189d7eaa29SArthur Chunqi Li /* Disable VMEXIT of IO instruction */ 11199d7eaa29SArthur Chunqi Li vmcs_write(CPU_EXEC_CTRL0, ctrl_cpu[0]); 11209d7eaa29SArthur Chunqi Li if (ctrl_cpu_rev[0].set & CPU_SECONDARY) { 11216884af61SArthur Chunqi Li ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) & 11226884af61SArthur Chunqi Li ctrl_cpu_rev[1].clr; 11239d7eaa29SArthur Chunqi Li vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu[1]); 11249d7eaa29SArthur Chunqi Li } 11259d7eaa29SArthur Chunqi Li vmcs_write(CR3_TARGET_COUNT, 0); 11269d7eaa29SArthur Chunqi Li vmcs_write(VPID, ++vpid_cnt); 11279d7eaa29SArthur Chunqi Li } 11289d7eaa29SArthur Chunqi Li 11299d7eaa29SArthur Chunqi Li static void init_vmcs_host(void) 11309d7eaa29SArthur Chunqi Li { 11319d7eaa29SArthur Chunqi Li /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 11329d7eaa29SArthur Chunqi Li /* 26.2.1.2 */ 11339d7eaa29SArthur Chunqi Li vmcs_write(HOST_EFER, rdmsr(MSR_EFER)); 11349d7eaa29SArthur Chunqi Li 11359d7eaa29SArthur Chunqi Li /* 26.2.1.3 */ 11369d7eaa29SArthur Chunqi Li vmcs_write(ENT_CONTROLS, ctrl_enter); 11379d7eaa29SArthur Chunqi Li vmcs_write(EXI_CONTROLS, ctrl_exit); 11389d7eaa29SArthur Chunqi Li 11399d7eaa29SArthur Chunqi Li /* 26.2.2 */ 11409d7eaa29SArthur Chunqi Li vmcs_write(HOST_CR0, read_cr0()); 11419d7eaa29SArthur Chunqi Li vmcs_write(HOST_CR3, read_cr3()); 11429d7eaa29SArthur Chunqi Li vmcs_write(HOST_CR4, read_cr4()); 11439d7eaa29SArthur Chunqi Li vmcs_write(HOST_SYSENTER_EIP, (u64)(&entry_sysenter)); 114469d8fe0eSPaolo Bonzini vmcs_write(HOST_SYSENTER_CS, KERNEL_CS); 11459d7eaa29SArthur Chunqi Li 11469d7eaa29SArthur Chunqi Li /* 26.2.3 */ 114769d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_CS, KERNEL_CS); 114869d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_SS, KERNEL_DS); 114969d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_DS, KERNEL_DS); 115069d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_ES, KERNEL_DS); 115169d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_FS, KERNEL_DS); 115269d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_GS, KERNEL_DS); 115369d8fe0eSPaolo Bonzini vmcs_write(HOST_SEL_TR, TSS_MAIN); 1154337166aaSJan Kiszka vmcs_write(HOST_BASE_TR, tss_descr.base); 1155337166aaSJan Kiszka vmcs_write(HOST_BASE_GDTR, gdt64_desc.base); 1156337166aaSJan Kiszka vmcs_write(HOST_BASE_IDTR, idt_descr.base); 11579d7eaa29SArthur Chunqi Li vmcs_write(HOST_BASE_FS, 0); 11589d7eaa29SArthur Chunqi Li vmcs_write(HOST_BASE_GS, 0); 11599d7eaa29SArthur Chunqi Li 11609d7eaa29SArthur Chunqi Li /* Set other vmcs area */ 11619d7eaa29SArthur Chunqi Li vmcs_write(PF_ERROR_MASK, 0); 11629d7eaa29SArthur Chunqi Li vmcs_write(PF_ERROR_MATCH, 0); 11639d7eaa29SArthur Chunqi Li vmcs_write(VMCS_LINK_PTR, ~0ul); 11649d7eaa29SArthur Chunqi Li vmcs_write(VMCS_LINK_PTR_HI, ~0ul); 11659d7eaa29SArthur Chunqi Li vmcs_write(HOST_RIP, (u64)(&vmx_return)); 11669d7eaa29SArthur Chunqi Li } 11679d7eaa29SArthur Chunqi Li 11689d7eaa29SArthur Chunqi Li static void init_vmcs_guest(void) 11699d7eaa29SArthur Chunqi Li { 11709d7eaa29SArthur Chunqi Li /* 26.3 CHECKING AND LOADING GUEST STATE */ 11719d7eaa29SArthur Chunqi Li ulong guest_cr0, guest_cr4, guest_cr3; 11729d7eaa29SArthur Chunqi Li /* 26.3.1.1 */ 11739d7eaa29SArthur Chunqi Li guest_cr0 = read_cr0(); 11749d7eaa29SArthur Chunqi Li guest_cr4 = read_cr4(); 11759d7eaa29SArthur Chunqi Li guest_cr3 = read_cr3(); 11769d7eaa29SArthur Chunqi Li if (ctrl_enter & ENT_GUEST_64) { 11779d7eaa29SArthur Chunqi Li guest_cr0 |= X86_CR0_PG; 11789d7eaa29SArthur Chunqi Li guest_cr4 |= X86_CR4_PAE; 11799d7eaa29SArthur Chunqi Li } 11809d7eaa29SArthur Chunqi Li if ((ctrl_enter & ENT_GUEST_64) == 0) 11819d7eaa29SArthur Chunqi Li guest_cr4 &= (~X86_CR4_PCIDE); 11829d7eaa29SArthur Chunqi Li if (guest_cr0 & X86_CR0_PG) 11839d7eaa29SArthur Chunqi Li guest_cr0 |= X86_CR0_PE; 11849d7eaa29SArthur Chunqi Li vmcs_write(GUEST_CR0, guest_cr0); 11859d7eaa29SArthur Chunqi Li vmcs_write(GUEST_CR3, guest_cr3); 11869d7eaa29SArthur Chunqi Li vmcs_write(GUEST_CR4, guest_cr4); 118769d8fe0eSPaolo Bonzini vmcs_write(GUEST_SYSENTER_CS, KERNEL_CS); 11889d7eaa29SArthur Chunqi Li vmcs_write(GUEST_SYSENTER_ESP, 11899d7eaa29SArthur Chunqi Li (u64)(guest_syscall_stack + PAGE_SIZE - 1)); 11909d7eaa29SArthur Chunqi Li vmcs_write(GUEST_SYSENTER_EIP, (u64)(&entry_sysenter)); 11919d7eaa29SArthur Chunqi Li vmcs_write(GUEST_DR7, 0); 11929d7eaa29SArthur Chunqi Li vmcs_write(GUEST_EFER, rdmsr(MSR_EFER)); 11939d7eaa29SArthur Chunqi Li 11949d7eaa29SArthur Chunqi Li /* 26.3.1.2 */ 119569d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_CS, KERNEL_CS); 119669d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_SS, KERNEL_DS); 119769d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_DS, KERNEL_DS); 119869d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_ES, KERNEL_DS); 119969d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_FS, KERNEL_DS); 120069d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_GS, KERNEL_DS); 120169d8fe0eSPaolo Bonzini vmcs_write(GUEST_SEL_TR, TSS_MAIN); 12029d7eaa29SArthur Chunqi Li vmcs_write(GUEST_SEL_LDTR, 0); 12039d7eaa29SArthur Chunqi Li 12049d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_CS, 0); 12059d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_ES, 0); 12069d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_SS, 0); 12079d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_DS, 0); 12089d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_FS, 0); 12099d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_GS, 0); 1210337166aaSJan Kiszka vmcs_write(GUEST_BASE_TR, tss_descr.base); 12119d7eaa29SArthur Chunqi Li vmcs_write(GUEST_BASE_LDTR, 0); 12129d7eaa29SArthur Chunqi Li 12139d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_CS, 0xFFFFFFFF); 12149d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_DS, 0xFFFFFFFF); 12159d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_ES, 0xFFFFFFFF); 12169d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_SS, 0xFFFFFFFF); 12179d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_FS, 0xFFFFFFFF); 12189d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_GS, 0xFFFFFFFF); 12199d7eaa29SArthur Chunqi Li vmcs_write(GUEST_LIMIT_LDTR, 0xffff); 1220337166aaSJan Kiszka vmcs_write(GUEST_LIMIT_TR, tss_descr.limit); 12219d7eaa29SArthur Chunqi Li 12229d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_CS, 0xa09b); 12239d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_DS, 0xc093); 12249d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_ES, 0xc093); 12259d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_FS, 0xc093); 12269d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_GS, 0xc093); 12279d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_SS, 0xc093); 12289d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_LDTR, 0x82); 12299d7eaa29SArthur Chunqi Li vmcs_write(GUEST_AR_TR, 0x8b); 12309d7eaa29SArthur Chunqi Li 12319d7eaa29SArthur Chunqi Li /* 26.3.1.3 */ 1232337166aaSJan Kiszka vmcs_write(GUEST_BASE_GDTR, gdt64_desc.base); 1233337166aaSJan Kiszka vmcs_write(GUEST_BASE_IDTR, idt_descr.base); 1234337166aaSJan Kiszka vmcs_write(GUEST_LIMIT_GDTR, gdt64_desc.limit); 1235337166aaSJan Kiszka vmcs_write(GUEST_LIMIT_IDTR, idt_descr.limit); 12369d7eaa29SArthur Chunqi Li 12379d7eaa29SArthur Chunqi Li /* 26.3.1.4 */ 12389d7eaa29SArthur Chunqi Li vmcs_write(GUEST_RIP, (u64)(&guest_entry)); 12399d7eaa29SArthur Chunqi Li vmcs_write(GUEST_RSP, (u64)(guest_stack + PAGE_SIZE - 1)); 1240a12e1d61SKrish Sadhukhan vmcs_write(GUEST_RFLAGS, X86_EFLAGS_FIXED); 12419d7eaa29SArthur Chunqi Li 12429d7eaa29SArthur Chunqi Li /* 26.3.1.5 */ 124317ba0dd0SJan Kiszka vmcs_write(GUEST_ACTV_STATE, ACTV_ACTIVE); 12449d7eaa29SArthur Chunqi Li vmcs_write(GUEST_INTR_STATE, 0); 12459d7eaa29SArthur Chunqi Li } 12469d7eaa29SArthur Chunqi Li 12479d7eaa29SArthur Chunqi Li static int init_vmcs(struct vmcs **vmcs) 12489d7eaa29SArthur Chunqi Li { 12499d7eaa29SArthur Chunqi Li *vmcs = alloc_page(); 12506c0ba6e7SLiran Alon (*vmcs)->hdr.revision_id = basic.revision; 12519d7eaa29SArthur Chunqi Li /* vmclear first to init vmcs */ 12529d7eaa29SArthur Chunqi Li if (vmcs_clear(*vmcs)) { 12539d7eaa29SArthur Chunqi Li printf("%s : vmcs_clear error\n", __func__); 12549d7eaa29SArthur Chunqi Li return 1; 12559d7eaa29SArthur Chunqi Li } 12569d7eaa29SArthur Chunqi Li 12579d7eaa29SArthur Chunqi Li if (make_vmcs_current(*vmcs)) { 12589d7eaa29SArthur Chunqi Li printf("%s : make_vmcs_current error\n", __func__); 12599d7eaa29SArthur Chunqi Li return 1; 12609d7eaa29SArthur Chunqi Li } 12619d7eaa29SArthur Chunqi Li 12629d7eaa29SArthur Chunqi Li /* All settings to pin/exit/enter/cpu 12639d7eaa29SArthur Chunqi Li control fields should be placed here */ 12649d7eaa29SArthur Chunqi Li ctrl_pin |= PIN_EXTINT | PIN_NMI | PIN_VIRT_NMI; 12659d7eaa29SArthur Chunqi Li ctrl_exit = EXI_LOAD_EFER | EXI_HOST_64; 12669d7eaa29SArthur Chunqi Li ctrl_enter = (ENT_LOAD_EFER | ENT_GUEST_64); 12679d7eaa29SArthur Chunqi Li /* DIsable IO instruction VMEXIT now */ 12689d7eaa29SArthur Chunqi Li ctrl_cpu[0] &= (~(CPU_IO | CPU_IO_BITMAP)); 12699d7eaa29SArthur Chunqi Li ctrl_cpu[1] = 0; 12709d7eaa29SArthur Chunqi Li 12719d7eaa29SArthur Chunqi Li ctrl_pin = (ctrl_pin | ctrl_pin_rev.set) & ctrl_pin_rev.clr; 12729d7eaa29SArthur Chunqi Li ctrl_enter = (ctrl_enter | ctrl_enter_rev.set) & ctrl_enter_rev.clr; 12739d7eaa29SArthur Chunqi Li ctrl_exit = (ctrl_exit | ctrl_exit_rev.set) & ctrl_exit_rev.clr; 12749d7eaa29SArthur Chunqi Li ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr; 12759d7eaa29SArthur Chunqi Li 12769d7eaa29SArthur Chunqi Li init_vmcs_ctrl(); 12779d7eaa29SArthur Chunqi Li init_vmcs_host(); 12789d7eaa29SArthur Chunqi Li init_vmcs_guest(); 12799d7eaa29SArthur Chunqi Li return 0; 12809d7eaa29SArthur Chunqi Li } 12819d7eaa29SArthur Chunqi Li 1282883f3fccSLiran Alon void enable_vmx(void) 1283883f3fccSLiran Alon { 1284883f3fccSLiran Alon bool vmx_enabled = 1285883f3fccSLiran Alon rdmsr(MSR_IA32_FEATURE_CONTROL) & 1286883f3fccSLiran Alon FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; 1287883f3fccSLiran Alon 1288883f3fccSLiran Alon if (!vmx_enabled) { 1289883f3fccSLiran Alon wrmsr(MSR_IA32_FEATURE_CONTROL, 1290883f3fccSLiran Alon FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX | 1291883f3fccSLiran Alon FEATURE_CONTROL_LOCKED); 1292883f3fccSLiran Alon } 1293883f3fccSLiran Alon } 1294883f3fccSLiran Alon 1295e836e27cSLiran Alon static void init_vmx_caps(void) 12969d7eaa29SArthur Chunqi Li { 12979d7eaa29SArthur Chunqi Li basic.val = rdmsr(MSR_IA32_VMX_BASIC); 12989d7eaa29SArthur Chunqi Li ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PIN 12999d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_PINBASED_CTLS); 13009d7eaa29SArthur Chunqi Li ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT 13019d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_EXIT_CTLS); 13029d7eaa29SArthur Chunqi Li ctrl_enter_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_ENTRY 13039d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_ENTRY_CTLS); 13049d7eaa29SArthur Chunqi Li ctrl_cpu_rev[0].val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PROC 13059d7eaa29SArthur Chunqi Li : MSR_IA32_VMX_PROCBASED_CTLS); 13066884af61SArthur Chunqi Li if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0) 13079d7eaa29SArthur Chunqi Li ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2); 13086884af61SArthur Chunqi Li else 13096884af61SArthur Chunqi Li ctrl_cpu_rev[1].val = 0; 13106884af61SArthur Chunqi Li if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0) 13119d7eaa29SArthur Chunqi Li ept_vpid.val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 13126884af61SArthur Chunqi Li else 13136884af61SArthur Chunqi Li ept_vpid.val = 0; 1314e836e27cSLiran Alon } 1315e836e27cSLiran Alon 13164f18f5deSLiran Alon void init_vmx(u64 *vmxon_region) 1317e836e27cSLiran Alon { 1318e836e27cSLiran Alon ulong fix_cr0_set, fix_cr0_clr; 1319e836e27cSLiran Alon ulong fix_cr4_set, fix_cr4_clr; 1320e836e27cSLiran Alon 1321e836e27cSLiran Alon fix_cr0_set = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 1322e836e27cSLiran Alon fix_cr0_clr = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 1323e836e27cSLiran Alon fix_cr4_set = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 1324e836e27cSLiran Alon fix_cr4_clr = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 1325e836e27cSLiran Alon 13269d7eaa29SArthur Chunqi Li write_cr0((read_cr0() & fix_cr0_clr) | fix_cr0_set); 13279d7eaa29SArthur Chunqi Li write_cr4((read_cr4() & fix_cr4_clr) | fix_cr4_set | X86_CR4_VMXE); 13289d7eaa29SArthur Chunqi Li 13299d7eaa29SArthur Chunqi Li *vmxon_region = basic.revision; 133093f10d6fSLiran Alon } 13319d7eaa29SArthur Chunqi Li 133293f10d6fSLiran Alon static void alloc_bsp_vmx_pages(void) 133393f10d6fSLiran Alon { 1334c937d495SLiran Alon bsp_vmxon_region = alloc_page(); 13359d7eaa29SArthur Chunqi Li guest_stack = alloc_page(); 13369d7eaa29SArthur Chunqi Li guest_syscall_stack = alloc_page(); 133793f10d6fSLiran Alon vmcs_root = alloc_page(); 133893f10d6fSLiran Alon } 133993f10d6fSLiran Alon 134093f10d6fSLiran Alon static void init_bsp_vmx(void) 134193f10d6fSLiran Alon { 134293f10d6fSLiran Alon init_vmx_caps(); 134393f10d6fSLiran Alon alloc_bsp_vmx_pages(); 1344c937d495SLiran Alon init_vmx(bsp_vmxon_region); 13459d7eaa29SArthur Chunqi Li } 13469d7eaa29SArthur Chunqi Li 1347e3f363c4SJan Kiszka static void do_vmxon_off(void *data) 13489d7eaa29SArthur Chunqi Li { 13493b127446SJan Kiszka vmx_on(); 13503b127446SJan Kiszka vmx_off(); 135103f37ef2SPaolo Bonzini } 13523b127446SJan Kiszka 1353e3f363c4SJan Kiszka static void do_write_feature_control(void *data) 13543b127446SJan Kiszka { 13553b127446SJan Kiszka wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 135603f37ef2SPaolo Bonzini } 13573b127446SJan Kiszka 13583b127446SJan Kiszka static int test_vmx_feature_control(void) 13593b127446SJan Kiszka { 13603b127446SJan Kiszka u64 ia32_feature_control; 13613b127446SJan Kiszka bool vmx_enabled; 13624e38e9dfSLiran Alon bool feature_control_locked; 13633b127446SJan Kiszka 13643b127446SJan Kiszka ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); 13654e38e9dfSLiran Alon vmx_enabled = 13664e38e9dfSLiran Alon ia32_feature_control & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; 13674e38e9dfSLiran Alon feature_control_locked = 13684e38e9dfSLiran Alon ia32_feature_control & FEATURE_CONTROL_LOCKED; 13694e38e9dfSLiran Alon 13704e38e9dfSLiran Alon if (vmx_enabled && feature_control_locked) { 13713b127446SJan Kiszka printf("VMX enabled and locked by BIOS\n"); 13723b127446SJan Kiszka return 0; 13734e38e9dfSLiran Alon } else if (feature_control_locked) { 13743b127446SJan Kiszka printf("ERROR: VMX locked out by BIOS!?\n"); 13753b127446SJan Kiszka return 1; 13763b127446SJan Kiszka } 13773b127446SJan Kiszka 13783b127446SJan Kiszka wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 1379a299895bSThomas Huth report(test_for_exception(GP_VECTOR, &do_vmxon_off, NULL), 1380a299895bSThomas Huth "test vmxon with FEATURE_CONTROL cleared"); 13813b127446SJan Kiszka 13824e38e9dfSLiran Alon wrmsr(MSR_IA32_FEATURE_CONTROL, FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX); 1383a299895bSThomas Huth report(test_for_exception(GP_VECTOR, &do_vmxon_off, NULL), 1384a299895bSThomas Huth "test vmxon without FEATURE_CONTROL lock"); 13853b127446SJan Kiszka 13864e38e9dfSLiran Alon wrmsr(MSR_IA32_FEATURE_CONTROL, 13874e38e9dfSLiran Alon FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX | 13884e38e9dfSLiran Alon FEATURE_CONTROL_LOCKED); 13894e38e9dfSLiran Alon 13904e38e9dfSLiran Alon ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); 13914e38e9dfSLiran Alon vmx_enabled = 13924e38e9dfSLiran Alon ia32_feature_control & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; 1393a299895bSThomas Huth report(vmx_enabled, "test enable VMX in FEATURE_CONTROL"); 13943b127446SJan Kiszka 1395a299895bSThomas Huth report(test_for_exception(GP_VECTOR, &do_write_feature_control, NULL), 1396a299895bSThomas Huth "test FEATURE_CONTROL lock bit"); 13973b127446SJan Kiszka 13983b127446SJan Kiszka return !vmx_enabled; 13999d7eaa29SArthur Chunqi Li } 14009d7eaa29SArthur Chunqi Li 14019d7eaa29SArthur Chunqi Li static int test_vmxon(void) 14029d7eaa29SArthur Chunqi Li { 1403ce21d809SBandan Das int ret, ret1; 1404c937d495SLiran Alon u64 *vmxon_region; 1405e2cf1c9dSEduardo Habkost int width = cpuid_maxphyaddr(); 14069d7eaa29SArthur Chunqi Li 1407ce21d809SBandan Das /* Unaligned page access */ 1408c937d495SLiran Alon vmxon_region = (u64 *)((intptr_t)bsp_vmxon_region + 1); 1409c937d495SLiran Alon ret1 = _vmx_on(vmxon_region); 1410a299895bSThomas Huth report(ret1, "test vmxon with unaligned vmxon region"); 1411ce21d809SBandan Das if (!ret1) { 1412ce21d809SBandan Das ret = 1; 1413ce21d809SBandan Das goto out; 1414ce21d809SBandan Das } 1415ce21d809SBandan Das 1416ce21d809SBandan Das /* gpa bits beyond physical address width are set*/ 1417c937d495SLiran Alon vmxon_region = (u64 *)((intptr_t)bsp_vmxon_region | ((u64)1 << (width+1))); 1418c937d495SLiran Alon ret1 = _vmx_on(vmxon_region); 1419a299895bSThomas Huth report(ret1, "test vmxon with bits set beyond physical address width"); 1420ce21d809SBandan Das if (!ret1) { 1421ce21d809SBandan Das ret = 1; 1422ce21d809SBandan Das goto out; 1423ce21d809SBandan Das } 1424ce21d809SBandan Das 1425ce21d809SBandan Das /* invalid revision indentifier */ 1426c937d495SLiran Alon *bsp_vmxon_region = 0xba9da9; 1427ce21d809SBandan Das ret1 = vmx_on(); 1428a299895bSThomas Huth report(ret1, "test vmxon with invalid revision identifier"); 1429ce21d809SBandan Das if (!ret1) { 1430ce21d809SBandan Das ret = 1; 1431ce21d809SBandan Das goto out; 1432ce21d809SBandan Das } 1433ce21d809SBandan Das 1434ce21d809SBandan Das /* and finally a valid region */ 1435c937d495SLiran Alon *bsp_vmxon_region = basic.revision; 14369d7eaa29SArthur Chunqi Li ret = vmx_on(); 1437a299895bSThomas Huth report(!ret, "test vmxon with valid vmxon region"); 1438ce21d809SBandan Das 1439ce21d809SBandan Das out: 14409d7eaa29SArthur Chunqi Li return ret; 14419d7eaa29SArthur Chunqi Li } 14429d7eaa29SArthur Chunqi Li 14439d7eaa29SArthur Chunqi Li static void test_vmptrld(void) 14449d7eaa29SArthur Chunqi Li { 1445daeec979SBandan Das struct vmcs *vmcs, *tmp_root; 1446e2cf1c9dSEduardo Habkost int width = cpuid_maxphyaddr(); 14479d7eaa29SArthur Chunqi Li 14489d7eaa29SArthur Chunqi Li vmcs = alloc_page(); 14496c0ba6e7SLiran Alon vmcs->hdr.revision_id = basic.revision; 1450daeec979SBandan Das 1451daeec979SBandan Das /* Unaligned page access */ 1452daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs + 1); 1453a299895bSThomas Huth report(make_vmcs_current(tmp_root) == 1, 1454a299895bSThomas Huth "test vmptrld with unaligned vmcs"); 1455daeec979SBandan Das 1456daeec979SBandan Das /* gpa bits beyond physical address width are set*/ 1457daeec979SBandan Das tmp_root = (struct vmcs *)((intptr_t)vmcs | 1458daeec979SBandan Das ((u64)1 << (width+1))); 1459a299895bSThomas Huth report(make_vmcs_current(tmp_root) == 1, 1460a299895bSThomas Huth "test vmptrld with vmcs address bits set beyond physical address width"); 1461daeec979SBandan Das 1462daeec979SBandan Das /* Pass VMXON region */ 14631c90aec0SJim Mattson assert(!vmcs_clear(vmcs)); 14641c90aec0SJim Mattson assert(!make_vmcs_current(vmcs)); 1465c937d495SLiran Alon tmp_root = (struct vmcs *)bsp_vmxon_region; 1466a299895bSThomas Huth report(make_vmcs_current(tmp_root) == 1, 1467a299895bSThomas Huth "test vmptrld with vmxon region"); 1468a299895bSThomas Huth report(vmcs_read(VMX_INST_ERROR) == VMXERR_VMPTRLD_VMXON_POINTER, 1469a299895bSThomas Huth "test vmptrld with vmxon region vm-instruction error"); 1470daeec979SBandan Das 1471a299895bSThomas Huth report(make_vmcs_current(vmcs) == 0, 1472a299895bSThomas Huth "test vmptrld with valid vmcs region"); 14739d7eaa29SArthur Chunqi Li } 14749d7eaa29SArthur Chunqi Li 14759d7eaa29SArthur Chunqi Li static void test_vmptrst(void) 14769d7eaa29SArthur Chunqi Li { 14779d7eaa29SArthur Chunqi Li int ret; 14789d7eaa29SArthur Chunqi Li struct vmcs *vmcs1, *vmcs2; 14799d7eaa29SArthur Chunqi Li 14809d7eaa29SArthur Chunqi Li vmcs1 = alloc_page(); 14819d7eaa29SArthur Chunqi Li init_vmcs(&vmcs1); 14829d7eaa29SArthur Chunqi Li ret = vmcs_save(&vmcs2); 1483a299895bSThomas Huth report((!ret) && (vmcs1 == vmcs2), "test vmptrst"); 14849d7eaa29SArthur Chunqi Li } 14859d7eaa29SArthur Chunqi Li 148669c8d31cSJan Kiszka struct vmx_ctl_msr { 148769c8d31cSJan Kiszka const char *name; 148869c8d31cSJan Kiszka u32 index, true_index; 148969c8d31cSJan Kiszka u32 default1; 149069c8d31cSJan Kiszka } vmx_ctl_msr[] = { 149169c8d31cSJan Kiszka { "MSR_IA32_VMX_PINBASED_CTLS", MSR_IA32_VMX_PINBASED_CTLS, 149269c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_PIN, 0x16 }, 149369c8d31cSJan Kiszka { "MSR_IA32_VMX_PROCBASED_CTLS", MSR_IA32_VMX_PROCBASED_CTLS, 149469c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_PROC, 0x401e172 }, 149569c8d31cSJan Kiszka { "MSR_IA32_VMX_PROCBASED_CTLS2", MSR_IA32_VMX_PROCBASED_CTLS2, 149669c8d31cSJan Kiszka MSR_IA32_VMX_PROCBASED_CTLS2, 0 }, 149769c8d31cSJan Kiszka { "MSR_IA32_VMX_EXIT_CTLS", MSR_IA32_VMX_EXIT_CTLS, 149869c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_EXIT, 0x36dff }, 149969c8d31cSJan Kiszka { "MSR_IA32_VMX_ENTRY_CTLS", MSR_IA32_VMX_ENTRY_CTLS, 150069c8d31cSJan Kiszka MSR_IA32_VMX_TRUE_ENTRY, 0x11ff }, 150169c8d31cSJan Kiszka }; 150269c8d31cSJan Kiszka 150369c8d31cSJan Kiszka static void test_vmx_caps(void) 150469c8d31cSJan Kiszka { 150569c8d31cSJan Kiszka u64 val, default1, fixed0, fixed1; 150669c8d31cSJan Kiszka union vmx_ctrl_msr ctrl, true_ctrl; 150769c8d31cSJan Kiszka unsigned int n; 150869c8d31cSJan Kiszka bool ok; 150969c8d31cSJan Kiszka 151069c8d31cSJan Kiszka printf("\nTest suite: VMX capability reporting\n"); 151169c8d31cSJan Kiszka 1512a299895bSThomas Huth report((basic.revision & (1ul << 31)) == 0 && 151369c8d31cSJan Kiszka basic.size > 0 && basic.size <= 4096 && 151469c8d31cSJan Kiszka (basic.type == 0 || basic.type == 6) && 1515a299895bSThomas Huth basic.reserved1 == 0 && basic.reserved2 == 0, 1516a299895bSThomas Huth "MSR_IA32_VMX_BASIC"); 151769c8d31cSJan Kiszka 151869c8d31cSJan Kiszka val = rdmsr(MSR_IA32_VMX_MISC); 1519a299895bSThomas Huth report((!(ctrl_cpu_rev[1].clr & CPU_URG) || val & (1ul << 5)) && 152069c8d31cSJan Kiszka ((val >> 16) & 0x1ff) <= 256 && 1521a299895bSThomas Huth (val & 0x80007e00) == 0, 1522a299895bSThomas Huth "MSR_IA32_VMX_MISC"); 152369c8d31cSJan Kiszka 152469c8d31cSJan Kiszka for (n = 0; n < ARRAY_SIZE(vmx_ctl_msr); n++) { 152569c8d31cSJan Kiszka ctrl.val = rdmsr(vmx_ctl_msr[n].index); 152669c8d31cSJan Kiszka default1 = vmx_ctl_msr[n].default1; 152769c8d31cSJan Kiszka ok = (ctrl.set & default1) == default1; 152869c8d31cSJan Kiszka ok = ok && (ctrl.set & ~ctrl.clr) == 0; 152969c8d31cSJan Kiszka if (ok && basic.ctrl) { 153069c8d31cSJan Kiszka true_ctrl.val = rdmsr(vmx_ctl_msr[n].true_index); 153169c8d31cSJan Kiszka ok = ctrl.clr == true_ctrl.clr; 153269c8d31cSJan Kiszka ok = ok && ctrl.set == (true_ctrl.set | default1); 153369c8d31cSJan Kiszka } 1534a299895bSThomas Huth report(ok, "%s", vmx_ctl_msr[n].name); 153569c8d31cSJan Kiszka } 153669c8d31cSJan Kiszka 153769c8d31cSJan Kiszka fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 153869c8d31cSJan Kiszka fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 1539a299895bSThomas Huth report(((fixed0 ^ fixed1) & ~fixed1) == 0, 1540a299895bSThomas Huth "MSR_IA32_VMX_IA32_VMX_CR0_FIXED0/1"); 154169c8d31cSJan Kiszka 154269c8d31cSJan Kiszka fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 154369c8d31cSJan Kiszka fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 1544a299895bSThomas Huth report(((fixed0 ^ fixed1) & ~fixed1) == 0, 1545a299895bSThomas Huth "MSR_IA32_VMX_IA32_VMX_CR4_FIXED0/1"); 154669c8d31cSJan Kiszka 154769c8d31cSJan Kiszka val = rdmsr(MSR_IA32_VMX_VMCS_ENUM); 1548a299895bSThomas Huth report((val & VMCS_FIELD_INDEX_MASK) >= 0x2a && 1549a299895bSThomas Huth (val & 0xfffffffffffffc01Ull) == 0, 1550a299895bSThomas Huth "MSR_IA32_VMX_VMCS_ENUM"); 155169c8d31cSJan Kiszka 155269c8d31cSJan Kiszka val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 1553a299895bSThomas Huth report((val & 0xfffff07ef98cbebeUll) == 0, 1554a299895bSThomas Huth "MSR_IA32_VMX_EPT_VPID_CAP"); 155569c8d31cSJan Kiszka } 155669c8d31cSJan Kiszka 15579d7eaa29SArthur Chunqi Li /* This function can only be called in guest */ 15589d7eaa29SArthur Chunqi Li static void __attribute__((__used__)) hypercall(u32 hypercall_no) 15599d7eaa29SArthur Chunqi Li { 15609d7eaa29SArthur Chunqi Li u64 val = 0; 15619d7eaa29SArthur Chunqi Li val = (hypercall_no & HYPERCALL_MASK) | HYPERCALL_BIT; 15629d7eaa29SArthur Chunqi Li hypercall_field = val; 15639d7eaa29SArthur Chunqi Li asm volatile("vmcall\n\t"); 15649d7eaa29SArthur Chunqi Li } 15659d7eaa29SArthur Chunqi Li 15667db17e21SThomas Huth static bool is_hypercall(void) 15679d7eaa29SArthur Chunqi Li { 15689d7eaa29SArthur Chunqi Li ulong reason, hyper_bit; 15699d7eaa29SArthur Chunqi Li 15709d7eaa29SArthur Chunqi Li reason = vmcs_read(EXI_REASON) & 0xff; 15719d7eaa29SArthur Chunqi Li hyper_bit = hypercall_field & HYPERCALL_BIT; 15729d7eaa29SArthur Chunqi Li if (reason == VMX_VMCALL && hyper_bit) 15739d7eaa29SArthur Chunqi Li return true; 15749d7eaa29SArthur Chunqi Li return false; 15759d7eaa29SArthur Chunqi Li } 15769d7eaa29SArthur Chunqi Li 15777db17e21SThomas Huth static int handle_hypercall(void) 15789d7eaa29SArthur Chunqi Li { 15799d7eaa29SArthur Chunqi Li ulong hypercall_no; 15809d7eaa29SArthur Chunqi Li 15819d7eaa29SArthur Chunqi Li hypercall_no = hypercall_field & HYPERCALL_MASK; 15829d7eaa29SArthur Chunqi Li hypercall_field = 0; 15839d7eaa29SArthur Chunqi Li switch (hypercall_no) { 15849d7eaa29SArthur Chunqi Li case HYPERCALL_VMEXIT: 15859d7eaa29SArthur Chunqi Li return VMX_TEST_VMEXIT; 1586794c67a9SPeter Feiner case HYPERCALL_VMABORT: 1587794c67a9SPeter Feiner return VMX_TEST_VMABORT; 1588794c67a9SPeter Feiner case HYPERCALL_VMSKIP: 1589794c67a9SPeter Feiner return VMX_TEST_VMSKIP; 15909d7eaa29SArthur Chunqi Li default: 1591b006d7ebSAndrew Jones printf("ERROR : Invalid hypercall number : %ld\n", hypercall_no); 15929d7eaa29SArthur Chunqi Li } 15939d7eaa29SArthur Chunqi Li return VMX_TEST_EXIT; 15949d7eaa29SArthur Chunqi Li } 15959d7eaa29SArthur Chunqi Li 1596794c67a9SPeter Feiner static void continue_abort(void) 1597794c67a9SPeter Feiner { 1598794c67a9SPeter Feiner assert(!in_guest); 1599794c67a9SPeter Feiner printf("Host was here when guest aborted:\n"); 1600794c67a9SPeter Feiner dump_stack(); 1601794c67a9SPeter Feiner longjmp(abort_target, 1); 1602794c67a9SPeter Feiner abort(); 1603794c67a9SPeter Feiner } 1604794c67a9SPeter Feiner 1605794c67a9SPeter Feiner void __abort_test(void) 1606794c67a9SPeter Feiner { 1607794c67a9SPeter Feiner if (in_guest) 1608794c67a9SPeter Feiner hypercall(HYPERCALL_VMABORT); 1609794c67a9SPeter Feiner else 1610794c67a9SPeter Feiner longjmp(abort_target, 1); 1611794c67a9SPeter Feiner abort(); 1612794c67a9SPeter Feiner } 1613794c67a9SPeter Feiner 1614794c67a9SPeter Feiner static void continue_skip(void) 1615794c67a9SPeter Feiner { 1616794c67a9SPeter Feiner assert(!in_guest); 1617794c67a9SPeter Feiner longjmp(abort_target, 1); 1618794c67a9SPeter Feiner abort(); 1619794c67a9SPeter Feiner } 1620794c67a9SPeter Feiner 1621794c67a9SPeter Feiner void test_skip(const char *msg) 1622794c67a9SPeter Feiner { 1623794c67a9SPeter Feiner printf("%s skipping test: %s\n", in_guest ? "Guest" : "Host", msg); 1624794c67a9SPeter Feiner if (in_guest) 1625794c67a9SPeter Feiner hypercall(HYPERCALL_VMABORT); 1626794c67a9SPeter Feiner else 1627794c67a9SPeter Feiner longjmp(abort_target, 1); 1628794c67a9SPeter Feiner abort(); 1629794c67a9SPeter Feiner } 1630794c67a9SPeter Feiner 16317db17e21SThomas Huth static int exit_handler(void) 16329d7eaa29SArthur Chunqi Li { 16339d7eaa29SArthur Chunqi Li int ret; 16349d7eaa29SArthur Chunqi Li 16359d7eaa29SArthur Chunqi Li current->exits++; 16361d9284d0SArthur Chunqi Li regs.rflags = vmcs_read(GUEST_RFLAGS); 16379d7eaa29SArthur Chunqi Li if (is_hypercall()) 16389d7eaa29SArthur Chunqi Li ret = handle_hypercall(); 16399d7eaa29SArthur Chunqi Li else 16409d7eaa29SArthur Chunqi Li ret = current->exit_handler(); 16411d9284d0SArthur Chunqi Li vmcs_write(GUEST_RFLAGS, regs.rflags); 16423b50efe3SPeter Feiner 16439d7eaa29SArthur Chunqi Li return ret; 16449d7eaa29SArthur Chunqi Li } 16453b50efe3SPeter Feiner 16463b50efe3SPeter Feiner /* 16473b50efe3SPeter Feiner * Called if vmlaunch or vmresume fails. 16483b50efe3SPeter Feiner * @early - failure due to "VMX controls and host-state area" (26.2) 16493b50efe3SPeter Feiner * @vmlaunch - was this a vmlaunch or vmresume 16503b50efe3SPeter Feiner * @rflags - host rflags 16513b50efe3SPeter Feiner */ 16523b50efe3SPeter Feiner static int 16533b50efe3SPeter Feiner entry_failure_handler(struct vmentry_failure *failure) 16543b50efe3SPeter Feiner { 16553b50efe3SPeter Feiner if (current->entry_failure_handler) 16563b50efe3SPeter Feiner return current->entry_failure_handler(failure); 16573b50efe3SPeter Feiner else 16583b50efe3SPeter Feiner return VMX_TEST_EXIT; 16599d7eaa29SArthur Chunqi Li } 16609d7eaa29SArthur Chunqi Li 1661c76ddf06SPeter Feiner /* 166274f7e9b2SKrish Sadhukhan * Tries to enter the guest. Returns true if entry succeeded. Otherwise, 1663c76ddf06SPeter Feiner * populates @failure. 1664c76ddf06SPeter Feiner */ 166574f7e9b2SKrish Sadhukhan static void vmx_enter_guest(struct vmentry_failure *failure) 16669d7eaa29SArthur Chunqi Li { 1667c76ddf06SPeter Feiner failure->early = 0; 16684e809db5SPeter Feiner 1669794c67a9SPeter Feiner in_guest = 1; 16709d7eaa29SArthur Chunqi Li asm volatile ( 1671897d8365SPeter Feiner "mov %[HOST_RSP], %%rdi\n\t" 1672897d8365SPeter Feiner "vmwrite %%rsp, %%rdi\n\t" 16739d7eaa29SArthur Chunqi Li LOAD_GPR_C 167444417388SPaolo Bonzini "cmpb $0, %[launched]\n\t" 16759d7eaa29SArthur Chunqi Li "jne 1f\n\t" 16769d7eaa29SArthur Chunqi Li "vmlaunch\n\t" 16779d7eaa29SArthur Chunqi Li "jmp 2f\n\t" 16789d7eaa29SArthur Chunqi Li "1: " 16799d7eaa29SArthur Chunqi Li "vmresume\n\t" 16809d7eaa29SArthur Chunqi Li "2: " 1681f37cf4e2SPeter Feiner SAVE_GPR_C 1682897d8365SPeter Feiner "pushf\n\t" 1683897d8365SPeter Feiner "pop %%rdi\n\t" 1684c76ddf06SPeter Feiner "mov %%rdi, %[failure_flags]\n\t" 1685e5adf54bSPaolo Bonzini "movl $1, %[failure_early]\n\t" 1686f37cf4e2SPeter Feiner "jmp 3f\n\t" 16879d7eaa29SArthur Chunqi Li "vmx_return:\n\t" 16889d7eaa29SArthur Chunqi Li SAVE_GPR_C 1689f37cf4e2SPeter Feiner "3: \n\t" 1690c76ddf06SPeter Feiner : [failure_early]"+m"(failure->early), 1691c76ddf06SPeter Feiner [failure_flags]"=m"(failure->flags) 1692897d8365SPeter Feiner : [launched]"m"(launched), [HOST_RSP]"i"(HOST_RSP) 1693897d8365SPeter Feiner : "rdi", "memory", "cc" 16949d7eaa29SArthur Chunqi Li ); 1695794c67a9SPeter Feiner in_guest = 0; 16963b50efe3SPeter Feiner 1697c76ddf06SPeter Feiner failure->vmlaunch = !launched; 1698c76ddf06SPeter Feiner failure->instr = launched ? "vmresume" : "vmlaunch"; 1699c76ddf06SPeter Feiner } 1700c76ddf06SPeter Feiner 17017db17e21SThomas Huth static int vmx_run(void) 1702c76ddf06SPeter Feiner { 1703c76ddf06SPeter Feiner while (1) { 1704c76ddf06SPeter Feiner u32 ret; 1705c76ddf06SPeter Feiner bool entered; 1706c76ddf06SPeter Feiner struct vmentry_failure failure; 1707c76ddf06SPeter Feiner 170874f7e9b2SKrish Sadhukhan vmx_enter_guest(&failure); 170974f7e9b2SKrish Sadhukhan entered = !failure.early && 171074f7e9b2SKrish Sadhukhan !(vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE); 17113b50efe3SPeter Feiner 17123b50efe3SPeter Feiner if (entered) { 17133b50efe3SPeter Feiner /* 17143b50efe3SPeter Feiner * VMCS isn't in "launched" state if there's been any 17153b50efe3SPeter Feiner * entry failure (early or otherwise). 17163b50efe3SPeter Feiner */ 17179d7eaa29SArthur Chunqi Li launched = 1; 17189d7eaa29SArthur Chunqi Li ret = exit_handler(); 17193b50efe3SPeter Feiner } else { 17203b50efe3SPeter Feiner ret = entry_failure_handler(&failure); 17219d7eaa29SArthur Chunqi Li } 17223b50efe3SPeter Feiner 17239d7eaa29SArthur Chunqi Li switch (ret) { 17243b50efe3SPeter Feiner case VMX_TEST_RESUME: 17253b50efe3SPeter Feiner continue; 17269d7eaa29SArthur Chunqi Li case VMX_TEST_VMEXIT: 1727794c67a9SPeter Feiner guest_finished = 1; 17289d7eaa29SArthur Chunqi Li return 0; 17293b50efe3SPeter Feiner case VMX_TEST_EXIT: 17309d7eaa29SArthur Chunqi Li break; 17319d7eaa29SArthur Chunqi Li default: 17323b50efe3SPeter Feiner printf("ERROR : Invalid %s_handler return val %d.\n", 17333b50efe3SPeter Feiner entered ? "exit" : "entry_failure", 17343b50efe3SPeter Feiner ret); 17359d7eaa29SArthur Chunqi Li break; 17369d7eaa29SArthur Chunqi Li } 17373b50efe3SPeter Feiner 17383b50efe3SPeter Feiner if (entered) 17393b50efe3SPeter Feiner print_vmexit_info(); 17403b50efe3SPeter Feiner else 17413b50efe3SPeter Feiner print_vmentry_failure_info(&failure); 17423b50efe3SPeter Feiner abort(); 17433b50efe3SPeter Feiner } 17449d7eaa29SArthur Chunqi Li } 17459d7eaa29SArthur Chunqi Li 1746794c67a9SPeter Feiner static void run_teardown_step(struct test_teardown_step *step) 1747794c67a9SPeter Feiner { 1748794c67a9SPeter Feiner step->func(step->data); 1749794c67a9SPeter Feiner } 1750794c67a9SPeter Feiner 17519d7eaa29SArthur Chunqi Li static int test_run(struct vmx_test *test) 17529d7eaa29SArthur Chunqi Li { 1753794c67a9SPeter Feiner int r; 1754794c67a9SPeter Feiner 1755794c67a9SPeter Feiner /* Validate V2 interface. */ 1756794c67a9SPeter Feiner if (test->v2) { 1757794c67a9SPeter Feiner int ret = 0; 1758794c67a9SPeter Feiner if (test->init || test->guest_main || test->exit_handler || 1759794c67a9SPeter Feiner test->syscall_handler) { 1760a299895bSThomas Huth report(0, "V2 test cannot specify V1 callbacks."); 1761794c67a9SPeter Feiner ret = 1; 1762794c67a9SPeter Feiner } 1763794c67a9SPeter Feiner if (ret) 1764794c67a9SPeter Feiner return ret; 1765794c67a9SPeter Feiner } 1766794c67a9SPeter Feiner 17679d7eaa29SArthur Chunqi Li if (test->name == NULL) 17689d7eaa29SArthur Chunqi Li test->name = "(no name)"; 17699d7eaa29SArthur Chunqi Li if (vmx_on()) { 17709d7eaa29SArthur Chunqi Li printf("%s : vmxon failed.\n", __func__); 17719d7eaa29SArthur Chunqi Li return 1; 17729d7eaa29SArthur Chunqi Li } 1773794c67a9SPeter Feiner 17749d7eaa29SArthur Chunqi Li init_vmcs(&(test->vmcs)); 17759d7eaa29SArthur Chunqi Li /* Directly call test->init is ok here, init_vmcs has done 17769d7eaa29SArthur Chunqi Li vmcs init, vmclear and vmptrld*/ 1777c592c151SJan Kiszka if (test->init && test->init(test->vmcs) != VMX_TEST_START) 1778a0e30e71SPaolo Bonzini goto out; 1779794c67a9SPeter Feiner teardown_count = 0; 1780794c67a9SPeter Feiner v2_guest_main = NULL; 17819d7eaa29SArthur Chunqi Li test->exits = 0; 17829d7eaa29SArthur Chunqi Li current = test; 17839d7eaa29SArthur Chunqi Li regs = test->guest_regs; 1784a12e1d61SKrish Sadhukhan vmcs_write(GUEST_RFLAGS, regs.rflags | X86_EFLAGS_FIXED); 17859d7eaa29SArthur Chunqi Li launched = 0; 1786794c67a9SPeter Feiner guest_finished = 0; 17879d7eaa29SArthur Chunqi Li printf("\nTest suite: %s\n", test->name); 1788794c67a9SPeter Feiner 1789794c67a9SPeter Feiner r = setjmp(abort_target); 1790794c67a9SPeter Feiner if (r) { 1791794c67a9SPeter Feiner assert(!in_guest); 1792794c67a9SPeter Feiner goto out; 1793794c67a9SPeter Feiner } 1794794c67a9SPeter Feiner 1795794c67a9SPeter Feiner 1796794c67a9SPeter Feiner if (test->v2) 1797794c67a9SPeter Feiner test->v2(); 1798794c67a9SPeter Feiner else 17999d7eaa29SArthur Chunqi Li vmx_run(); 1800794c67a9SPeter Feiner 1801794c67a9SPeter Feiner while (teardown_count > 0) 1802794c67a9SPeter Feiner run_teardown_step(&teardown_steps[--teardown_count]); 1803794c67a9SPeter Feiner 1804794c67a9SPeter Feiner if (launched && !guest_finished) 1805a299895bSThomas Huth report(0, "Guest didn't run to completion."); 1806794c67a9SPeter Feiner 1807a0e30e71SPaolo Bonzini out: 18089d7eaa29SArthur Chunqi Li if (vmx_off()) { 18099d7eaa29SArthur Chunqi Li printf("%s : vmxoff failed.\n", __func__); 18109d7eaa29SArthur Chunqi Li return 1; 18119d7eaa29SArthur Chunqi Li } 18129d7eaa29SArthur Chunqi Li return 0; 18139d7eaa29SArthur Chunqi Li } 18149d7eaa29SArthur Chunqi Li 1815794c67a9SPeter Feiner /* 1816794c67a9SPeter Feiner * Add a teardown step. Executed after the test's main function returns. 1817794c67a9SPeter Feiner * Teardown steps executed in reverse order. 1818794c67a9SPeter Feiner */ 1819794c67a9SPeter Feiner void test_add_teardown(test_teardown_func func, void *data) 1820794c67a9SPeter Feiner { 1821794c67a9SPeter Feiner struct test_teardown_step *step; 1822794c67a9SPeter Feiner 1823794c67a9SPeter Feiner TEST_ASSERT_MSG(teardown_count < MAX_TEST_TEARDOWN_STEPS, 1824794c67a9SPeter Feiner "There are already %d teardown steps.", 1825794c67a9SPeter Feiner teardown_count); 1826794c67a9SPeter Feiner step = &teardown_steps[teardown_count++]; 1827794c67a9SPeter Feiner step->func = func; 1828794c67a9SPeter Feiner step->data = data; 1829794c67a9SPeter Feiner } 1830794c67a9SPeter Feiner 1831794c67a9SPeter Feiner /* 1832794c67a9SPeter Feiner * Set the target of the first enter_guest call. Can only be called once per 1833794c67a9SPeter Feiner * test. Must be called before first enter_guest call. 1834794c67a9SPeter Feiner */ 1835794c67a9SPeter Feiner void test_set_guest(test_guest_func func) 1836794c67a9SPeter Feiner { 1837794c67a9SPeter Feiner assert(current->v2); 1838794c67a9SPeter Feiner TEST_ASSERT_MSG(!v2_guest_main, "Already set guest func."); 1839794c67a9SPeter Feiner v2_guest_main = func; 1840794c67a9SPeter Feiner } 1841794c67a9SPeter Feiner 18424ce739beSMarc Orr static void check_for_guest_termination(void) 18434ce739beSMarc Orr { 18444ce739beSMarc Orr if (is_hypercall()) { 18454ce739beSMarc Orr int ret; 18464ce739beSMarc Orr 18474ce739beSMarc Orr ret = handle_hypercall(); 18484ce739beSMarc Orr switch (ret) { 18494ce739beSMarc Orr case VMX_TEST_VMEXIT: 18504ce739beSMarc Orr guest_finished = 1; 18514ce739beSMarc Orr break; 18524ce739beSMarc Orr case VMX_TEST_VMABORT: 18534ce739beSMarc Orr continue_abort(); 18544ce739beSMarc Orr break; 18554ce739beSMarc Orr case VMX_TEST_VMSKIP: 18564ce739beSMarc Orr continue_skip(); 18574ce739beSMarc Orr break; 18584ce739beSMarc Orr default: 18594ce739beSMarc Orr printf("ERROR : Invalid handle_hypercall return %d.\n", 18604ce739beSMarc Orr ret); 18614ce739beSMarc Orr abort(); 18624ce739beSMarc Orr } 18634ce739beSMarc Orr } 18644ce739beSMarc Orr } 18654ce739beSMarc Orr 186674f7e9b2SKrish Sadhukhan #define ABORT_ON_EARLY_VMENTRY_FAIL 0x1 186774f7e9b2SKrish Sadhukhan #define ABORT_ON_INVALID_GUEST_STATE 0x2 186874f7e9b2SKrish Sadhukhan 1869794c67a9SPeter Feiner /* 1870794c67a9SPeter Feiner * Enters the guest (or launches it for the first time). Error to call once the 187174f7e9b2SKrish Sadhukhan * guest has returned (i.e., run past the end of its guest() function). 1872794c67a9SPeter Feiner */ 187374f7e9b2SKrish Sadhukhan static void __enter_guest(u8 abort_flag, struct vmentry_failure *failure) 1874794c67a9SPeter Feiner { 1875794c67a9SPeter Feiner TEST_ASSERT_MSG(v2_guest_main, 1876794c67a9SPeter Feiner "Never called test_set_guest_func!"); 1877794c67a9SPeter Feiner 1878794c67a9SPeter Feiner TEST_ASSERT_MSG(!guest_finished, 1879794c67a9SPeter Feiner "Called enter_guest() after guest returned."); 1880794c67a9SPeter Feiner 188174f7e9b2SKrish Sadhukhan vmx_enter_guest(failure); 188274f7e9b2SKrish Sadhukhan if ((abort_flag & ABORT_ON_EARLY_VMENTRY_FAIL && failure->early) || 188374f7e9b2SKrish Sadhukhan (abort_flag & ABORT_ON_INVALID_GUEST_STATE && 188474f7e9b2SKrish Sadhukhan vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE)) { 188574f7e9b2SKrish Sadhukhan 188674f7e9b2SKrish Sadhukhan print_vmentry_failure_info(failure); 1887794c67a9SPeter Feiner abort(); 1888794c67a9SPeter Feiner } 1889794c67a9SPeter Feiner 1890e9554497SMarc Orr if (!failure->early && !(vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE)) { 1891794c67a9SPeter Feiner launched = 1; 18924ce739beSMarc Orr check_for_guest_termination(); 18934ce739beSMarc Orr } 189474f7e9b2SKrish Sadhukhan } 1895794c67a9SPeter Feiner 18964ce739beSMarc Orr void enter_guest_with_bad_controls(void) 18974ce739beSMarc Orr { 189874f7e9b2SKrish Sadhukhan struct vmentry_failure failure = {0}; 18994ce739beSMarc Orr 19004ce739beSMarc Orr TEST_ASSERT_MSG(v2_guest_main, 19014ce739beSMarc Orr "Never called test_set_guest_func!"); 19024ce739beSMarc Orr 19034ce739beSMarc Orr TEST_ASSERT_MSG(!guest_finished, 19044ce739beSMarc Orr "Called enter_guest() after guest returned."); 19054ce739beSMarc Orr 190674f7e9b2SKrish Sadhukhan __enter_guest(ABORT_ON_INVALID_GUEST_STATE, &failure); 1907a299895bSThomas Huth report(failure.early, "failure occurred early"); 1908a299895bSThomas Huth report((failure.flags & VMX_ENTRY_FLAGS) == X86_EFLAGS_ZF, 1909a299895bSThomas Huth "FLAGS set correctly"); 1910a299895bSThomas Huth report(vmcs_read(VMX_INST_ERROR) == VMXERR_ENTRY_INVALID_CONTROL_FIELD, 1911a299895bSThomas Huth "VM-Inst Error # is %d (VM entry with invalid control field(s))", 19124ce739beSMarc Orr VMXERR_ENTRY_INVALID_CONTROL_FIELD); 19134ce739beSMarc Orr 19144ce739beSMarc Orr /* 19154ce739beSMarc Orr * This if statement shouldn't fire, as the entire premise of this 19164ce739beSMarc Orr * function is that VM entry is expected to fail, rather than succeed 19174ce739beSMarc Orr * and execute to termination. However, if the VM entry does 19184ce739beSMarc Orr * unexpectedly succeed, it's nice to check whether the guest has 19194ce739beSMarc Orr * terminated, to reduce the number of error messages. 19204ce739beSMarc Orr */ 192174f7e9b2SKrish Sadhukhan if (!failure.early) 19224ce739beSMarc Orr check_for_guest_termination(); 1923794c67a9SPeter Feiner } 1924794c67a9SPeter Feiner 192574f7e9b2SKrish Sadhukhan void enter_guest(void) 192674f7e9b2SKrish Sadhukhan { 192774f7e9b2SKrish Sadhukhan struct vmentry_failure failure = {0}; 192874f7e9b2SKrish Sadhukhan 192974f7e9b2SKrish Sadhukhan __enter_guest(ABORT_ON_EARLY_VMENTRY_FAIL | 193074f7e9b2SKrish Sadhukhan ABORT_ON_INVALID_GUEST_STATE, &failure); 193174f7e9b2SKrish Sadhukhan } 193274f7e9b2SKrish Sadhukhan 193374f7e9b2SKrish Sadhukhan void enter_guest_with_invalid_guest_state(void) 193474f7e9b2SKrish Sadhukhan { 193574f7e9b2SKrish Sadhukhan struct vmentry_failure failure = {0}; 193674f7e9b2SKrish Sadhukhan 193774f7e9b2SKrish Sadhukhan __enter_guest(ABORT_ON_EARLY_VMENTRY_FAIL, &failure); 193874f7e9b2SKrish Sadhukhan } 193974f7e9b2SKrish Sadhukhan 19403ee34093SArthur Chunqi Li extern struct vmx_test vmx_tests[]; 19419d7eaa29SArthur Chunqi Li 1942875b97b3SPeter Feiner static bool 1943875b97b3SPeter Feiner test_wanted(const char *name, const char *filters[], int filter_count) 19448029cac7SPeter Feiner { 1945875b97b3SPeter Feiner int i; 1946875b97b3SPeter Feiner bool positive = false; 1947875b97b3SPeter Feiner bool match = false; 1948875b97b3SPeter Feiner char clean_name[strlen(name) + 1]; 1949875b97b3SPeter Feiner char *c; 19508029cac7SPeter Feiner const char *n; 19518029cac7SPeter Feiner 1952875b97b3SPeter Feiner /* Replace spaces with underscores. */ 1953875b97b3SPeter Feiner n = name; 1954875b97b3SPeter Feiner c = &clean_name[0]; 1955875b97b3SPeter Feiner do *c++ = (*n == ' ') ? '_' : *n; 1956875b97b3SPeter Feiner while (*n++); 1957875b97b3SPeter Feiner 1958875b97b3SPeter Feiner for (i = 0; i < filter_count; i++) { 1959875b97b3SPeter Feiner const char *filter = filters[i]; 1960875b97b3SPeter Feiner 1961875b97b3SPeter Feiner if (filter[0] == '-') { 1962875b97b3SPeter Feiner if (simple_glob(clean_name, filter + 1)) 1963875b97b3SPeter Feiner return false; 1964875b97b3SPeter Feiner } else { 1965875b97b3SPeter Feiner positive = true; 1966875b97b3SPeter Feiner match |= simple_glob(clean_name, filter); 1967875b97b3SPeter Feiner } 1968875b97b3SPeter Feiner } 1969875b97b3SPeter Feiner 1970875b97b3SPeter Feiner if (!positive || match) { 1971875b97b3SPeter Feiner matched++; 1972875b97b3SPeter Feiner return true; 1973875b97b3SPeter Feiner } else { 19748029cac7SPeter Feiner return false; 19758029cac7SPeter Feiner } 19768029cac7SPeter Feiner } 19778029cac7SPeter Feiner 1978875b97b3SPeter Feiner int main(int argc, const char *argv[]) 19799d7eaa29SArthur Chunqi Li { 19803ee34093SArthur Chunqi Li int i = 0; 19819d7eaa29SArthur Chunqi Li 19829d7eaa29SArthur Chunqi Li setup_vm(); 1983706cad23SArbel Moshe smp_init(); 19843ee34093SArthur Chunqi Li hypercall_field = 0; 19859d7eaa29SArthur Chunqi Li 19867371c622SVitaly Kuznetsov /* We want xAPIC mode to test MMIO passthrough from L1 (us) to L2. */ 19877371c622SVitaly Kuznetsov reset_apic(); 19887371c622SVitaly Kuznetsov 1989c04259ffSDavid Matlack argv++; 1990c04259ffSDavid Matlack argc--; 1991c04259ffSDavid Matlack 1992badc98caSKrish Sadhukhan if (!this_cpu_has(X86_FEATURE_VMX)) { 19933b127446SJan Kiszka printf("WARNING: vmx not supported, add '-cpu host'\n"); 19949d7eaa29SArthur Chunqi Li goto exit; 19959d7eaa29SArthur Chunqi Li } 199693f10d6fSLiran Alon init_bsp_vmx(); 1997c04259ffSDavid Matlack if (test_wanted("test_vmx_feature_control", argv, argc)) { 1998c04259ffSDavid Matlack /* Sets MSR_IA32_FEATURE_CONTROL to 0x5 */ 19993b127446SJan Kiszka if (test_vmx_feature_control() != 0) 20003b127446SJan Kiszka goto exit; 2001c04259ffSDavid Matlack } else { 2002883f3fccSLiran Alon enable_vmx(); 2003c04259ffSDavid Matlack } 2004c04259ffSDavid Matlack 2005c04259ffSDavid Matlack if (test_wanted("test_vmxon", argv, argc)) { 2006c04259ffSDavid Matlack /* Enables VMX */ 20079d7eaa29SArthur Chunqi Li if (test_vmxon() != 0) 20089d7eaa29SArthur Chunqi Li goto exit; 2009c04259ffSDavid Matlack } else { 2010c04259ffSDavid Matlack if (vmx_on()) { 2011a299895bSThomas Huth report(0, "vmxon"); 2012c04259ffSDavid Matlack goto exit; 2013c04259ffSDavid Matlack } 2014c04259ffSDavid Matlack } 2015c04259ffSDavid Matlack 2016c04259ffSDavid Matlack if (test_wanted("test_vmptrld", argv, argc)) 20179d7eaa29SArthur Chunqi Li test_vmptrld(); 2018c04259ffSDavid Matlack if (test_wanted("test_vmclear", argv, argc)) 20199d7eaa29SArthur Chunqi Li test_vmclear(); 2020c04259ffSDavid Matlack if (test_wanted("test_vmptrst", argv, argc)) 20219d7eaa29SArthur Chunqi Li test_vmptrst(); 2022ecd5b431SDavid Matlack if (test_wanted("test_vmwrite_vmread", argv, argc)) 2023ecd5b431SDavid Matlack test_vmwrite_vmread(); 202459161cfaSJim Mattson if (test_wanted("test_vmcs_high", argv, argc)) 202559161cfaSJim Mattson test_vmcs_high(); 20266b72cf76SDavid Matlack if (test_wanted("test_vmcs_lifecycle", argv, argc)) 20276b72cf76SDavid Matlack test_vmcs_lifecycle(); 2028c04259ffSDavid Matlack if (test_wanted("test_vmx_caps", argv, argc)) 202969c8d31cSJan Kiszka test_vmx_caps(); 20309d7eaa29SArthur Chunqi Li 203134439b1aSPeter Feiner /* Balance vmxon from test_vmxon. */ 203234439b1aSPeter Feiner vmx_off(); 203334439b1aSPeter Feiner 203434439b1aSPeter Feiner for (; vmx_tests[i].name != NULL; i++) { 2035c04259ffSDavid Matlack if (!test_wanted(vmx_tests[i].name, argv, argc)) 20368029cac7SPeter Feiner continue; 20379d7eaa29SArthur Chunqi Li if (test_run(&vmx_tests[i])) 20389d7eaa29SArthur Chunqi Li goto exit; 20398029cac7SPeter Feiner } 20408029cac7SPeter Feiner 20418029cac7SPeter Feiner if (!matched) 2042a299895bSThomas Huth report(matched, "command line didn't match any tests!"); 20439d7eaa29SArthur Chunqi Li 20449d7eaa29SArthur Chunqi Li exit: 2045f3cdd159SJan Kiszka return report_summary(); 20469d7eaa29SArthur Chunqi Li } 2047