1 #include "libcflat.h" 2 #include "desc.h" 3 #include "apic-defs.h" 4 #include "apic.h" 5 #include "processor.h" 6 #include "vm.h" 7 8 #define FREE_GDT_INDEX 6 9 #define MAIN_TSS_INDEX (FREE_GDT_INDEX + 0) 10 #define VM86_TSS_INDEX (FREE_GDT_INDEX + 1) 11 12 static volatile int test_count; 13 static volatile unsigned int test_divider; 14 15 static char *fault_addr; 16 static ulong fault_phys; 17 18 static inline void io_delay(void) 19 { 20 } 21 22 static void nmi_tss(void) 23 { 24 start: 25 printf("NMI task is running\n"); 26 print_current_tss_info(); 27 test_count++; 28 asm volatile ("iret"); 29 goto start; 30 } 31 32 static void de_tss(void) 33 { 34 start: 35 printf("DE task is running\n"); 36 print_current_tss_info(); 37 test_divider = 10; 38 test_count++; 39 asm volatile ("iret"); 40 goto start; 41 } 42 43 static void of_tss(void) 44 { 45 start: 46 printf("OF task is running\n"); 47 print_current_tss_info(); 48 test_count++; 49 asm volatile ("iret"); 50 goto start; 51 } 52 53 static void bp_tss(void) 54 { 55 start: 56 printf("BP task is running\n"); 57 print_current_tss_info(); 58 test_count++; 59 asm volatile ("iret"); 60 goto start; 61 } 62 63 void do_pf_tss(ulong *error_code) 64 { 65 printf("PF task is running %x %x\n", error_code, *(ulong*)error_code); 66 print_current_tss_info(); 67 if (*(ulong*)error_code == 0x2) /* write access, not present */ 68 test_count++; 69 install_pte(phys_to_virt(read_cr3()), 1, fault_addr, 70 fault_phys | PTE_PRESENT | PTE_WRITE, 0); 71 } 72 73 extern void pf_tss(void); 74 75 asm ( 76 "pf_tss: \n\t" 77 "push %esp \n\t" 78 "call do_pf_tss \n\t" 79 "add $4, %esp \n\t" 80 "iret\n\t" 81 "jmp pf_tss\n\t" 82 ); 83 84 static void jmp_tss(void) 85 { 86 start: 87 printf("JMP to task succeeded\n"); 88 print_current_tss_info(); 89 test_count++; 90 asm volatile ("ljmp $" xstr(TSS_MAIN) ", $0"); 91 goto start; 92 } 93 94 static void irq_tss(void) 95 { 96 start: 97 printf("IRQ task is running\n"); 98 print_current_tss_info(); 99 test_count++; 100 asm volatile ("iret"); 101 test_count++; 102 printf("IRQ task restarts after iret.\n"); 103 goto start; 104 } 105 106 void test_kernel_mode_int() 107 { 108 unsigned int res; 109 110 /* test that int $2 triggers task gate */ 111 test_count = 0; 112 set_intr_task_gate(2, nmi_tss); 113 printf("Triggering nmi 2\n"); 114 asm volatile ("int $2"); 115 printf("Return from nmi %d\n", test_count); 116 report("NMI int $2", test_count == 1); 117 118 /* test that external NMI triggers task gate */ 119 test_count = 0; 120 set_intr_task_gate(2, nmi_tss); 121 printf("Triggering nmi through APIC\n"); 122 apic_icr_write(APIC_DEST_PHYSICAL | APIC_DM_NMI | APIC_INT_ASSERT, 0); 123 io_delay(); 124 printf("Return from APIC nmi\n"); 125 report("NMI external", test_count == 1); 126 127 /* test that external interrupt triggesr task gate */ 128 test_count = 0; 129 printf("Trigger IRQ from APIC\n"); 130 set_intr_task_gate(0xf0, irq_tss); 131 irq_enable(); 132 apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_FIXED | APIC_INT_ASSERT | 0xf0, 0); 133 io_delay(); 134 irq_disable(); 135 printf("Return from APIC IRQ\n"); 136 report("IRQ external", test_count == 1); 137 138 /* test that HW exception triggesr task gate */ 139 set_intr_task_gate(0, de_tss); 140 printf("Try to devide by 0\n"); 141 asm volatile ("divl %3": "=a"(res) 142 : "d"(0), "a"(1500), "m"(test_divider)); 143 printf("Result is %d\n", res); 144 report("DE exeption", res == 150); 145 146 /* test if call HW exeption DE by int $0 triggers task gate */ 147 test_count = 0; 148 set_intr_task_gate(0, de_tss); 149 printf("Call int 0\n"); 150 asm volatile ("int $0"); 151 printf("Return from int 0\n"); 152 report("int $0", test_count == 1); 153 154 /* test if HW exception OF triggers task gate */ 155 test_count = 0; 156 set_intr_task_gate(4, of_tss); 157 printf("Call into\n"); 158 asm volatile ("addb $127, %b0\ninto"::"a"(127)); 159 printf("Return from into\n"); 160 report("OF exeption", test_count); 161 162 /* test if HW exception BP triggers task gate */ 163 test_count = 0; 164 set_intr_task_gate(3, bp_tss); 165 printf("Call int 3\n"); 166 asm volatile ("int $3"); 167 printf("Return from int 3\n"); 168 report("BP exeption", test_count == 1); 169 170 /* 171 * test that PF triggers task gate and error code is placed on 172 * exception task's stack 173 */ 174 fault_addr = alloc_vpage(); 175 fault_phys = (ulong)virt_to_phys(alloc_page()); 176 test_count = 0; 177 set_intr_task_gate(14, pf_tss); 178 printf("Access unmapped page\n"); 179 *fault_addr = 0; 180 printf("Return from pf tss\n"); 181 report("PF exeption", test_count == 1); 182 183 /* test that calling a task by lcall works */ 184 test_count = 0; 185 set_intr_task_gate(0, irq_tss); 186 printf("Calling task by lcall\n"); 187 /* hlt opcode is 0xf4 I use destination IP 0xf4f4f4f4 to catch 188 incorrect instruction length calculation */ 189 asm volatile("lcall $" xstr(TSS_INTR) ", $0xf4f4f4f4"); 190 printf("Return from call\n"); 191 report("lcall", test_count == 1); 192 193 /* call the same task again and check that it restarted after iret */ 194 test_count = 0; 195 asm volatile("lcall $" xstr(TSS_INTR) ", $0xf4f4f4f4"); 196 report("lcall2", test_count == 2); 197 198 /* test that calling a task by ljmp works */ 199 test_count = 0; 200 set_intr_task_gate(0, jmp_tss); 201 printf("Jumping to a task by ljmp\n"); 202 asm volatile ("ljmp $" xstr(TSS_INTR) ", $0xf4f4f4f4"); 203 printf("Jump back succeeded\n"); 204 report("ljmp", test_count == 1); 205 } 206 207 void test_vm86_switch(void) 208 { 209 static tss32_t main_tss; 210 static tss32_t vm86_tss; 211 212 u8 *vm86_start; 213 214 /* Write a 'ud2' instruction somewhere below 1 MB */ 215 vm86_start = (void*) 0x42000; 216 vm86_start[0] = 0x0f; 217 vm86_start[1] = 0x0b; 218 219 /* Main TSS */ 220 set_gdt_entry(MAIN_TSS_INDEX, (u32)&main_tss, sizeof(tss32_t) - 1, 0x89, 0); 221 ltr(MAIN_TSS_INDEX << 3); 222 main_tss = (tss32_t) { 223 .prev = VM86_TSS_INDEX << 3, 224 .cr3 = read_cr3(), 225 }; 226 227 /* VM86 TSS (marked as busy, so we can iret to it) */ 228 set_gdt_entry(VM86_TSS_INDEX, (u32)&vm86_tss, sizeof(tss32_t) - 1, 0x8b, 0); 229 vm86_tss = (tss32_t) { 230 .eflags = 0x20002, 231 .cr3 = read_cr3(), 232 .eip = (u32) vm86_start & 0x0f, 233 .cs = (u32) vm86_start >> 4, 234 .ds = 0x1234, 235 .es = 0x2345, 236 }; 237 238 /* Setup task gate to main TSS for #UD */ 239 set_idt_task_gate(6, MAIN_TSS_INDEX << 3); 240 241 /* Jump into VM86 task with iret, #UD lets it come back immediately */ 242 printf("Switch to VM86 task and back\n"); 243 asm volatile( 244 "pushf\n" 245 "orw $0x4000, (%esp)\n" 246 "popf\n" 247 "iret\n" 248 ); 249 report("VM86", 1); 250 } 251 252 int main() 253 { 254 setup_vm(); 255 setup_idt(); 256 setup_gdt(); 257 setup_tss32(); 258 259 test_kernel_mode_int(); 260 test_vm86_switch(); 261 262 return report_summary(); 263 } 264