1d21b4f12SGleb Natapov #include "libcflat.h" 2d21b4f12SGleb Natapov #include "desc.h" 3d21b4f12SGleb Natapov #include "apic-defs.h" 4d21b4f12SGleb Natapov #include "apic.h" 5d21b4f12SGleb Natapov #include "processor.h" 6ce71ddc7SGleb Natapov #include "vm.h" 7d21b4f12SGleb Natapov 867961d18SPaolo Bonzini #define MAIN_TSS_SEL (FIRST_SPARE_SEL + 0) 967961d18SPaolo Bonzini #define VM86_TSS_SEL (FIRST_SPARE_SEL + 8) 10*3cdcf179SNadav Amit #define CONFORM_CS_SEL (FIRST_SPARE_SEL + 16) 11b01c8823SKevin Wolf 12d21b4f12SGleb Natapov static volatile int test_count; 13d21b4f12SGleb Natapov static volatile unsigned int test_divider; 14d21b4f12SGleb Natapov 15ce71ddc7SGleb Natapov static char *fault_addr; 16ce71ddc7SGleb Natapov static ulong fault_phys; 17ce71ddc7SGleb Natapov 18d21b4f12SGleb Natapov static inline void io_delay(void) 19d21b4f12SGleb Natapov { 20d21b4f12SGleb Natapov } 21d21b4f12SGleb Natapov 22d21b4f12SGleb Natapov static void nmi_tss(void) 23d21b4f12SGleb Natapov { 24d21b4f12SGleb Natapov start: 25d21b4f12SGleb Natapov printf("NMI task is running\n"); 26d21b4f12SGleb Natapov print_current_tss_info(); 27d21b4f12SGleb Natapov test_count++; 28d21b4f12SGleb Natapov asm volatile ("iret"); 29d21b4f12SGleb Natapov goto start; 30d21b4f12SGleb Natapov } 31d21b4f12SGleb Natapov 32d21b4f12SGleb Natapov static void de_tss(void) 33d21b4f12SGleb Natapov { 34d21b4f12SGleb Natapov start: 35d21b4f12SGleb Natapov printf("DE task is running\n"); 36d21b4f12SGleb Natapov print_current_tss_info(); 37d21b4f12SGleb Natapov test_divider = 10; 38d21b4f12SGleb Natapov test_count++; 39d21b4f12SGleb Natapov asm volatile ("iret"); 40d21b4f12SGleb Natapov goto start; 41d21b4f12SGleb Natapov } 42d21b4f12SGleb Natapov 43d21b4f12SGleb Natapov static void of_tss(void) 44d21b4f12SGleb Natapov { 45d21b4f12SGleb Natapov start: 46d21b4f12SGleb Natapov printf("OF task is running\n"); 47d21b4f12SGleb Natapov print_current_tss_info(); 48d21b4f12SGleb Natapov test_count++; 49d21b4f12SGleb Natapov asm volatile ("iret"); 50d21b4f12SGleb Natapov goto start; 51d21b4f12SGleb Natapov } 52d21b4f12SGleb Natapov 53d21b4f12SGleb Natapov static void bp_tss(void) 54d21b4f12SGleb Natapov { 55d21b4f12SGleb Natapov start: 56d21b4f12SGleb Natapov printf("BP task is running\n"); 57d21b4f12SGleb Natapov print_current_tss_info(); 58d21b4f12SGleb Natapov test_count++; 59d21b4f12SGleb Natapov asm volatile ("iret"); 60d21b4f12SGleb Natapov goto start; 61d21b4f12SGleb Natapov } 62d21b4f12SGleb Natapov 63ce71ddc7SGleb Natapov void do_pf_tss(ulong *error_code) 64ce71ddc7SGleb Natapov { 65ce71ddc7SGleb Natapov printf("PF task is running %x %x\n", error_code, *(ulong*)error_code); 66ce71ddc7SGleb Natapov print_current_tss_info(); 67ce71ddc7SGleb Natapov if (*(ulong*)error_code == 0x2) /* write access, not present */ 68ce71ddc7SGleb Natapov test_count++; 69ce71ddc7SGleb Natapov install_pte(phys_to_virt(read_cr3()), 1, fault_addr, 70ce71ddc7SGleb Natapov fault_phys | PTE_PRESENT | PTE_WRITE, 0); 71ce71ddc7SGleb Natapov } 72ce71ddc7SGleb Natapov 73ce71ddc7SGleb Natapov extern void pf_tss(void); 74ce71ddc7SGleb Natapov 75ce71ddc7SGleb Natapov asm ( 76ce71ddc7SGleb Natapov "pf_tss: \n\t" 77ce71ddc7SGleb Natapov "push %esp \n\t" 78ce71ddc7SGleb Natapov "call do_pf_tss \n\t" 79ce71ddc7SGleb Natapov "add $4, %esp \n\t" 80ce71ddc7SGleb Natapov "iret\n\t" 81ce71ddc7SGleb Natapov "jmp pf_tss\n\t" 82ce71ddc7SGleb Natapov ); 83ce71ddc7SGleb Natapov 84d21b4f12SGleb Natapov static void jmp_tss(void) 85d21b4f12SGleb Natapov { 86d21b4f12SGleb Natapov start: 87d21b4f12SGleb Natapov printf("JMP to task succeeded\n"); 88d21b4f12SGleb Natapov print_current_tss_info(); 89d21b4f12SGleb Natapov test_count++; 90d21b4f12SGleb Natapov asm volatile ("ljmp $" xstr(TSS_MAIN) ", $0"); 91d21b4f12SGleb Natapov goto start; 92d21b4f12SGleb Natapov } 93d21b4f12SGleb Natapov 94d21b4f12SGleb Natapov static void irq_tss(void) 95d21b4f12SGleb Natapov { 96d21b4f12SGleb Natapov start: 97d21b4f12SGleb Natapov printf("IRQ task is running\n"); 98d21b4f12SGleb Natapov print_current_tss_info(); 99d21b4f12SGleb Natapov test_count++; 100d21b4f12SGleb Natapov asm volatile ("iret"); 101d21b4f12SGleb Natapov test_count++; 102d21b4f12SGleb Natapov printf("IRQ task restarts after iret.\n"); 103d21b4f12SGleb Natapov goto start; 104d21b4f12SGleb Natapov } 105d21b4f12SGleb Natapov 106*3cdcf179SNadav Amit static void user_tss(void) 107*3cdcf179SNadav Amit { 108*3cdcf179SNadav Amit start: 109*3cdcf179SNadav Amit test_count++; 110*3cdcf179SNadav Amit asm volatile ("iret"); 111*3cdcf179SNadav Amit goto start; 112*3cdcf179SNadav Amit } 113*3cdcf179SNadav Amit 114b01c8823SKevin Wolf void test_kernel_mode_int() 115d21b4f12SGleb Natapov { 116d21b4f12SGleb Natapov unsigned int res; 117d21b4f12SGleb Natapov 118d21b4f12SGleb Natapov /* test that int $2 triggers task gate */ 119d21b4f12SGleb Natapov test_count = 0; 120d21b4f12SGleb Natapov set_intr_task_gate(2, nmi_tss); 121d21b4f12SGleb Natapov printf("Triggering nmi 2\n"); 122d21b4f12SGleb Natapov asm volatile ("int $2"); 123d21b4f12SGleb Natapov printf("Return from nmi %d\n", test_count); 124d21b4f12SGleb Natapov report("NMI int $2", test_count == 1); 125d21b4f12SGleb Natapov 126d21b4f12SGleb Natapov /* test that external NMI triggers task gate */ 127d21b4f12SGleb Natapov test_count = 0; 128d21b4f12SGleb Natapov set_intr_task_gate(2, nmi_tss); 129d21b4f12SGleb Natapov printf("Triggering nmi through APIC\n"); 130d21b4f12SGleb Natapov apic_icr_write(APIC_DEST_PHYSICAL | APIC_DM_NMI | APIC_INT_ASSERT, 0); 131d21b4f12SGleb Natapov io_delay(); 132d21b4f12SGleb Natapov printf("Return from APIC nmi\n"); 133d21b4f12SGleb Natapov report("NMI external", test_count == 1); 134d21b4f12SGleb Natapov 135d21b4f12SGleb Natapov /* test that external interrupt triggesr task gate */ 136d21b4f12SGleb Natapov test_count = 0; 137d21b4f12SGleb Natapov printf("Trigger IRQ from APIC\n"); 138d21b4f12SGleb Natapov set_intr_task_gate(0xf0, irq_tss); 139d21b4f12SGleb Natapov irq_enable(); 140d21b4f12SGleb Natapov apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_FIXED | APIC_INT_ASSERT | 0xf0, 0); 141d21b4f12SGleb Natapov io_delay(); 142d21b4f12SGleb Natapov irq_disable(); 143d21b4f12SGleb Natapov printf("Return from APIC IRQ\n"); 144d21b4f12SGleb Natapov report("IRQ external", test_count == 1); 145d21b4f12SGleb Natapov 146d21b4f12SGleb Natapov /* test that HW exception triggesr task gate */ 147d21b4f12SGleb Natapov set_intr_task_gate(0, de_tss); 148d21b4f12SGleb Natapov printf("Try to devide by 0\n"); 149d21b4f12SGleb Natapov asm volatile ("divl %3": "=a"(res) 150d21b4f12SGleb Natapov : "d"(0), "a"(1500), "m"(test_divider)); 151d21b4f12SGleb Natapov printf("Result is %d\n", res); 152d21b4f12SGleb Natapov report("DE exeption", res == 150); 153d21b4f12SGleb Natapov 154d21b4f12SGleb Natapov /* test if call HW exeption DE by int $0 triggers task gate */ 155d21b4f12SGleb Natapov test_count = 0; 156d21b4f12SGleb Natapov set_intr_task_gate(0, de_tss); 157d21b4f12SGleb Natapov printf("Call int 0\n"); 158d21b4f12SGleb Natapov asm volatile ("int $0"); 159d21b4f12SGleb Natapov printf("Return from int 0\n"); 160d21b4f12SGleb Natapov report("int $0", test_count == 1); 161d21b4f12SGleb Natapov 162d21b4f12SGleb Natapov /* test if HW exception OF triggers task gate */ 163d21b4f12SGleb Natapov test_count = 0; 164d21b4f12SGleb Natapov set_intr_task_gate(4, of_tss); 165d21b4f12SGleb Natapov printf("Call into\n"); 166d21b4f12SGleb Natapov asm volatile ("addb $127, %b0\ninto"::"a"(127)); 167d21b4f12SGleb Natapov printf("Return from into\n"); 168d21b4f12SGleb Natapov report("OF exeption", test_count); 169d21b4f12SGleb Natapov 170d21b4f12SGleb Natapov /* test if HW exception BP triggers task gate */ 171d21b4f12SGleb Natapov test_count = 0; 172d21b4f12SGleb Natapov set_intr_task_gate(3, bp_tss); 173d21b4f12SGleb Natapov printf("Call int 3\n"); 174d21b4f12SGleb Natapov asm volatile ("int $3"); 175d21b4f12SGleb Natapov printf("Return from int 3\n"); 176d21b4f12SGleb Natapov report("BP exeption", test_count == 1); 177d21b4f12SGleb Natapov 178ce71ddc7SGleb Natapov /* 179ce71ddc7SGleb Natapov * test that PF triggers task gate and error code is placed on 180ce71ddc7SGleb Natapov * exception task's stack 181ce71ddc7SGleb Natapov */ 182ce71ddc7SGleb Natapov fault_addr = alloc_vpage(); 183ce71ddc7SGleb Natapov fault_phys = (ulong)virt_to_phys(alloc_page()); 184ce71ddc7SGleb Natapov test_count = 0; 185ce71ddc7SGleb Natapov set_intr_task_gate(14, pf_tss); 186ce71ddc7SGleb Natapov printf("Access unmapped page\n"); 187ce71ddc7SGleb Natapov *fault_addr = 0; 188ce71ddc7SGleb Natapov printf("Return from pf tss\n"); 189ce71ddc7SGleb Natapov report("PF exeption", test_count == 1); 190ce71ddc7SGleb Natapov 191d21b4f12SGleb Natapov /* test that calling a task by lcall works */ 192d21b4f12SGleb Natapov test_count = 0; 193d21b4f12SGleb Natapov set_intr_task_gate(0, irq_tss); 194d21b4f12SGleb Natapov printf("Calling task by lcall\n"); 195d21b4f12SGleb Natapov /* hlt opcode is 0xf4 I use destination IP 0xf4f4f4f4 to catch 196d21b4f12SGleb Natapov incorrect instruction length calculation */ 197d21b4f12SGleb Natapov asm volatile("lcall $" xstr(TSS_INTR) ", $0xf4f4f4f4"); 198d21b4f12SGleb Natapov printf("Return from call\n"); 199d21b4f12SGleb Natapov report("lcall", test_count == 1); 200d21b4f12SGleb Natapov 201d21b4f12SGleb Natapov /* call the same task again and check that it restarted after iret */ 202d21b4f12SGleb Natapov test_count = 0; 203d21b4f12SGleb Natapov asm volatile("lcall $" xstr(TSS_INTR) ", $0xf4f4f4f4"); 204d21b4f12SGleb Natapov report("lcall2", test_count == 2); 205d21b4f12SGleb Natapov 206d21b4f12SGleb Natapov /* test that calling a task by ljmp works */ 207d21b4f12SGleb Natapov test_count = 0; 208d21b4f12SGleb Natapov set_intr_task_gate(0, jmp_tss); 209d21b4f12SGleb Natapov printf("Jumping to a task by ljmp\n"); 210d21b4f12SGleb Natapov asm volatile ("ljmp $" xstr(TSS_INTR) ", $0xf4f4f4f4"); 211d21b4f12SGleb Natapov printf("Jump back succeeded\n"); 212d21b4f12SGleb Natapov report("ljmp", test_count == 1); 213b01c8823SKevin Wolf } 214b01c8823SKevin Wolf 215b01c8823SKevin Wolf void test_vm86_switch(void) 216b01c8823SKevin Wolf { 217b01c8823SKevin Wolf static tss32_t main_tss; 218b01c8823SKevin Wolf static tss32_t vm86_tss; 219b01c8823SKevin Wolf 220b01c8823SKevin Wolf u8 *vm86_start; 221b01c8823SKevin Wolf 222b01c8823SKevin Wolf /* Write a 'ud2' instruction somewhere below 1 MB */ 223b01c8823SKevin Wolf vm86_start = (void*) 0x42000; 224b01c8823SKevin Wolf vm86_start[0] = 0x0f; 225b01c8823SKevin Wolf vm86_start[1] = 0x0b; 226b01c8823SKevin Wolf 227b01c8823SKevin Wolf /* Main TSS */ 22867961d18SPaolo Bonzini set_gdt_entry(MAIN_TSS_SEL, (u32)&main_tss, sizeof(tss32_t) - 1, 0x89, 0); 22967961d18SPaolo Bonzini ltr(MAIN_TSS_SEL); 230b01c8823SKevin Wolf main_tss = (tss32_t) { 23167961d18SPaolo Bonzini .prev = VM86_TSS_SEL, 232b01c8823SKevin Wolf .cr3 = read_cr3(), 233b01c8823SKevin Wolf }; 234b01c8823SKevin Wolf 235b01c8823SKevin Wolf /* VM86 TSS (marked as busy, so we can iret to it) */ 23667961d18SPaolo Bonzini set_gdt_entry(VM86_TSS_SEL, (u32)&vm86_tss, sizeof(tss32_t) - 1, 0x8b, 0); 237b01c8823SKevin Wolf vm86_tss = (tss32_t) { 238b01c8823SKevin Wolf .eflags = 0x20002, 239b01c8823SKevin Wolf .cr3 = read_cr3(), 240b01c8823SKevin Wolf .eip = (u32) vm86_start & 0x0f, 241b01c8823SKevin Wolf .cs = (u32) vm86_start >> 4, 242b01c8823SKevin Wolf .ds = 0x1234, 243b01c8823SKevin Wolf .es = 0x2345, 244b01c8823SKevin Wolf }; 245b01c8823SKevin Wolf 246b01c8823SKevin Wolf /* Setup task gate to main TSS for #UD */ 24767961d18SPaolo Bonzini set_idt_task_gate(6, MAIN_TSS_SEL); 248b01c8823SKevin Wolf 249b01c8823SKevin Wolf /* Jump into VM86 task with iret, #UD lets it come back immediately */ 250b01c8823SKevin Wolf printf("Switch to VM86 task and back\n"); 251b01c8823SKevin Wolf asm volatile( 252b01c8823SKevin Wolf "pushf\n" 253b01c8823SKevin Wolf "orw $0x4000, (%esp)\n" 254b01c8823SKevin Wolf "popf\n" 255b01c8823SKevin Wolf "iret\n" 256b01c8823SKevin Wolf ); 257b01c8823SKevin Wolf report("VM86", 1); 258b01c8823SKevin Wolf } 259b01c8823SKevin Wolf 260*3cdcf179SNadav Amit void test_conforming_switch(void) 261*3cdcf179SNadav Amit { 262*3cdcf179SNadav Amit /* test lcall with conforming segment, cs.dpl != cs.rpl */ 263*3cdcf179SNadav Amit test_count = 0; 264*3cdcf179SNadav Amit 265*3cdcf179SNadav Amit tss_intr.cs = CONFORM_CS_SEL | 3; 266*3cdcf179SNadav Amit tss_intr.eip = (u32)user_tss; 267*3cdcf179SNadav Amit tss_intr.ds = tss_intr.gs = tss_intr.fs = tss_intr.ss = USER_DS; 268*3cdcf179SNadav Amit set_gdt_entry(CONFORM_CS_SEL, 0, 0xffffffff, 0x9f, 0xc0); 269*3cdcf179SNadav Amit asm volatile("lcall $" xstr(TSS_INTR) ", $0xf4f4f4f4"); 270*3cdcf179SNadav Amit report("lcall with cs.rpl != cs.dpl", test_count == 1); 271*3cdcf179SNadav Amit } 272*3cdcf179SNadav Amit 273b01c8823SKevin Wolf int main() 274b01c8823SKevin Wolf { 275b01c8823SKevin Wolf setup_vm(); 276b01c8823SKevin Wolf setup_idt(); 277b01c8823SKevin Wolf setup_tss32(); 278b01c8823SKevin Wolf 279b01c8823SKevin Wolf test_kernel_mode_int(); 280b01c8823SKevin Wolf test_vm86_switch(); 281*3cdcf179SNadav Amit test_conforming_switch(); 282d21b4f12SGleb Natapov 283f3cdd159SJan Kiszka return report_summary(); 284d21b4f12SGleb Natapov } 285