1ad879127SKrish Sadhukhan #include "svm.h" 2ad879127SKrish Sadhukhan #include "libcflat.h" 3ad879127SKrish Sadhukhan #include "processor.h" 4ad879127SKrish Sadhukhan #include "desc.h" 5ad879127SKrish Sadhukhan #include "msr.h" 6ad879127SKrish Sadhukhan #include "vm.h" 7ad879127SKrish Sadhukhan #include "smp.h" 8ad879127SKrish Sadhukhan #include "types.h" 9ad879127SKrish Sadhukhan #include "alloc_page.h" 10ad879127SKrish Sadhukhan #include "isr.h" 11ad879127SKrish Sadhukhan #include "apic.h" 129da1f4d8SCathy Avery #include "delay.h" 13ad879127SKrish Sadhukhan 14ad879127SKrish Sadhukhan #define SVM_EXIT_MAX_DR_INTERCEPT 0x3f 15ad879127SKrish Sadhukhan 16ad879127SKrish Sadhukhan static void *scratch_page; 17ad879127SKrish Sadhukhan 18ad879127SKrish Sadhukhan #define LATENCY_RUNS 1000000 19ad879127SKrish Sadhukhan 20ad879127SKrish Sadhukhan u64 tsc_start; 21ad879127SKrish Sadhukhan u64 tsc_end; 22ad879127SKrish Sadhukhan 23ad879127SKrish Sadhukhan u64 vmrun_sum, vmexit_sum; 24ad879127SKrish Sadhukhan u64 vmsave_sum, vmload_sum; 25ad879127SKrish Sadhukhan u64 stgi_sum, clgi_sum; 26ad879127SKrish Sadhukhan u64 latvmrun_max; 27ad879127SKrish Sadhukhan u64 latvmrun_min; 28ad879127SKrish Sadhukhan u64 latvmexit_max; 29ad879127SKrish Sadhukhan u64 latvmexit_min; 30ad879127SKrish Sadhukhan u64 latvmload_max; 31ad879127SKrish Sadhukhan u64 latvmload_min; 32ad879127SKrish Sadhukhan u64 latvmsave_max; 33ad879127SKrish Sadhukhan u64 latvmsave_min; 34ad879127SKrish Sadhukhan u64 latstgi_max; 35ad879127SKrish Sadhukhan u64 latstgi_min; 36ad879127SKrish Sadhukhan u64 latclgi_max; 37ad879127SKrish Sadhukhan u64 latclgi_min; 38ad879127SKrish Sadhukhan u64 runs; 39ad879127SKrish Sadhukhan 40ad879127SKrish Sadhukhan static void null_test(struct svm_test *test) 41ad879127SKrish Sadhukhan { 42ad879127SKrish Sadhukhan } 43ad879127SKrish Sadhukhan 44ad879127SKrish Sadhukhan static bool null_check(struct svm_test *test) 45ad879127SKrish Sadhukhan { 46096cf7feSPaolo Bonzini return vmcb->control.exit_code == SVM_EXIT_VMMCALL; 47ad879127SKrish Sadhukhan } 48ad879127SKrish Sadhukhan 49ad879127SKrish Sadhukhan static void prepare_no_vmrun_int(struct svm_test *test) 50ad879127SKrish Sadhukhan { 51096cf7feSPaolo Bonzini vmcb->control.intercept &= ~(1ULL << INTERCEPT_VMRUN); 52ad879127SKrish Sadhukhan } 53ad879127SKrish Sadhukhan 54ad879127SKrish Sadhukhan static bool check_no_vmrun_int(struct svm_test *test) 55ad879127SKrish Sadhukhan { 56096cf7feSPaolo Bonzini return vmcb->control.exit_code == SVM_EXIT_ERR; 57ad879127SKrish Sadhukhan } 58ad879127SKrish Sadhukhan 59ad879127SKrish Sadhukhan static void test_vmrun(struct svm_test *test) 60ad879127SKrish Sadhukhan { 61096cf7feSPaolo Bonzini asm volatile ("vmrun %0" : : "a"(virt_to_phys(vmcb))); 62ad879127SKrish Sadhukhan } 63ad879127SKrish Sadhukhan 64ad879127SKrish Sadhukhan static bool check_vmrun(struct svm_test *test) 65ad879127SKrish Sadhukhan { 66096cf7feSPaolo Bonzini return vmcb->control.exit_code == SVM_EXIT_VMRUN; 67ad879127SKrish Sadhukhan } 68ad879127SKrish Sadhukhan 69ad879127SKrish Sadhukhan static void prepare_cr3_intercept(struct svm_test *test) 70ad879127SKrish Sadhukhan { 71ad879127SKrish Sadhukhan default_prepare(test); 72096cf7feSPaolo Bonzini vmcb->control.intercept_cr_read |= 1 << 3; 73ad879127SKrish Sadhukhan } 74ad879127SKrish Sadhukhan 75ad879127SKrish Sadhukhan static void test_cr3_intercept(struct svm_test *test) 76ad879127SKrish Sadhukhan { 77ad879127SKrish Sadhukhan asm volatile ("mov %%cr3, %0" : "=r"(test->scratch) : : "memory"); 78ad879127SKrish Sadhukhan } 79ad879127SKrish Sadhukhan 80ad879127SKrish Sadhukhan static bool check_cr3_intercept(struct svm_test *test) 81ad879127SKrish Sadhukhan { 82096cf7feSPaolo Bonzini return vmcb->control.exit_code == SVM_EXIT_READ_CR3; 83ad879127SKrish Sadhukhan } 84ad879127SKrish Sadhukhan 85ad879127SKrish Sadhukhan static bool check_cr3_nointercept(struct svm_test *test) 86ad879127SKrish Sadhukhan { 87ad879127SKrish Sadhukhan return null_check(test) && test->scratch == read_cr3(); 88ad879127SKrish Sadhukhan } 89ad879127SKrish Sadhukhan 90ad879127SKrish Sadhukhan static void corrupt_cr3_intercept_bypass(void *_test) 91ad879127SKrish Sadhukhan { 92ad879127SKrish Sadhukhan struct svm_test *test = _test; 93ad879127SKrish Sadhukhan extern volatile u32 mmio_insn; 94ad879127SKrish Sadhukhan 95ad879127SKrish Sadhukhan while (!__sync_bool_compare_and_swap(&test->scratch, 1, 2)) 96ad879127SKrish Sadhukhan pause(); 97ad879127SKrish Sadhukhan pause(); 98ad879127SKrish Sadhukhan pause(); 99ad879127SKrish Sadhukhan pause(); 100ad879127SKrish Sadhukhan mmio_insn = 0x90d8200f; // mov %cr3, %rax; nop 101ad879127SKrish Sadhukhan } 102ad879127SKrish Sadhukhan 103ad879127SKrish Sadhukhan static void prepare_cr3_intercept_bypass(struct svm_test *test) 104ad879127SKrish Sadhukhan { 105ad879127SKrish Sadhukhan default_prepare(test); 106096cf7feSPaolo Bonzini vmcb->control.intercept_cr_read |= 1 << 3; 107ad879127SKrish Sadhukhan on_cpu_async(1, corrupt_cr3_intercept_bypass, test); 108ad879127SKrish Sadhukhan } 109ad879127SKrish Sadhukhan 110ad879127SKrish Sadhukhan static void test_cr3_intercept_bypass(struct svm_test *test) 111ad879127SKrish Sadhukhan { 112ad879127SKrish Sadhukhan ulong a = 0xa0000; 113ad879127SKrish Sadhukhan 114ad879127SKrish Sadhukhan test->scratch = 1; 115ad879127SKrish Sadhukhan while (test->scratch != 2) 116ad879127SKrish Sadhukhan barrier(); 117ad879127SKrish Sadhukhan 118ad879127SKrish Sadhukhan asm volatile ("mmio_insn: mov %0, (%0); nop" 119ad879127SKrish Sadhukhan : "+a"(a) : : "memory"); 120ad879127SKrish Sadhukhan test->scratch = a; 121ad879127SKrish Sadhukhan } 122ad879127SKrish Sadhukhan 123ad879127SKrish Sadhukhan static void prepare_dr_intercept(struct svm_test *test) 124ad879127SKrish Sadhukhan { 125ad879127SKrish Sadhukhan default_prepare(test); 126096cf7feSPaolo Bonzini vmcb->control.intercept_dr_read = 0xff; 127096cf7feSPaolo Bonzini vmcb->control.intercept_dr_write = 0xff; 128ad879127SKrish Sadhukhan } 129ad879127SKrish Sadhukhan 130ad879127SKrish Sadhukhan static void test_dr_intercept(struct svm_test *test) 131ad879127SKrish Sadhukhan { 132ad879127SKrish Sadhukhan unsigned int i, failcnt = 0; 133ad879127SKrish Sadhukhan 134ad879127SKrish Sadhukhan /* Loop testing debug register reads */ 135ad879127SKrish Sadhukhan for (i = 0; i < 8; i++) { 136ad879127SKrish Sadhukhan 137ad879127SKrish Sadhukhan switch (i) { 138ad879127SKrish Sadhukhan case 0: 139ad879127SKrish Sadhukhan asm volatile ("mov %%dr0, %0" : "=r"(test->scratch) : : "memory"); 140ad879127SKrish Sadhukhan break; 141ad879127SKrish Sadhukhan case 1: 142ad879127SKrish Sadhukhan asm volatile ("mov %%dr1, %0" : "=r"(test->scratch) : : "memory"); 143ad879127SKrish Sadhukhan break; 144ad879127SKrish Sadhukhan case 2: 145ad879127SKrish Sadhukhan asm volatile ("mov %%dr2, %0" : "=r"(test->scratch) : : "memory"); 146ad879127SKrish Sadhukhan break; 147ad879127SKrish Sadhukhan case 3: 148ad879127SKrish Sadhukhan asm volatile ("mov %%dr3, %0" : "=r"(test->scratch) : : "memory"); 149ad879127SKrish Sadhukhan break; 150ad879127SKrish Sadhukhan case 4: 151ad879127SKrish Sadhukhan asm volatile ("mov %%dr4, %0" : "=r"(test->scratch) : : "memory"); 152ad879127SKrish Sadhukhan break; 153ad879127SKrish Sadhukhan case 5: 154ad879127SKrish Sadhukhan asm volatile ("mov %%dr5, %0" : "=r"(test->scratch) : : "memory"); 155ad879127SKrish Sadhukhan break; 156ad879127SKrish Sadhukhan case 6: 157ad879127SKrish Sadhukhan asm volatile ("mov %%dr6, %0" : "=r"(test->scratch) : : "memory"); 158ad879127SKrish Sadhukhan break; 159ad879127SKrish Sadhukhan case 7: 160ad879127SKrish Sadhukhan asm volatile ("mov %%dr7, %0" : "=r"(test->scratch) : : "memory"); 161ad879127SKrish Sadhukhan break; 162ad879127SKrish Sadhukhan } 163ad879127SKrish Sadhukhan 164ad879127SKrish Sadhukhan if (test->scratch != i) { 165ad879127SKrish Sadhukhan report(false, "dr%u read intercept", i); 166ad879127SKrish Sadhukhan failcnt++; 167ad879127SKrish Sadhukhan } 168ad879127SKrish Sadhukhan } 169ad879127SKrish Sadhukhan 170ad879127SKrish Sadhukhan /* Loop testing debug register writes */ 171ad879127SKrish Sadhukhan for (i = 0; i < 8; i++) { 172ad879127SKrish Sadhukhan 173ad879127SKrish Sadhukhan switch (i) { 174ad879127SKrish Sadhukhan case 0: 175ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr0" : : "r"(test->scratch) : "memory"); 176ad879127SKrish Sadhukhan break; 177ad879127SKrish Sadhukhan case 1: 178ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr1" : : "r"(test->scratch) : "memory"); 179ad879127SKrish Sadhukhan break; 180ad879127SKrish Sadhukhan case 2: 181ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr2" : : "r"(test->scratch) : "memory"); 182ad879127SKrish Sadhukhan break; 183ad879127SKrish Sadhukhan case 3: 184ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr3" : : "r"(test->scratch) : "memory"); 185ad879127SKrish Sadhukhan break; 186ad879127SKrish Sadhukhan case 4: 187ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr4" : : "r"(test->scratch) : "memory"); 188ad879127SKrish Sadhukhan break; 189ad879127SKrish Sadhukhan case 5: 190ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr5" : : "r"(test->scratch) : "memory"); 191ad879127SKrish Sadhukhan break; 192ad879127SKrish Sadhukhan case 6: 193ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr6" : : "r"(test->scratch) : "memory"); 194ad879127SKrish Sadhukhan break; 195ad879127SKrish Sadhukhan case 7: 196ad879127SKrish Sadhukhan asm volatile ("mov %0, %%dr7" : : "r"(test->scratch) : "memory"); 197ad879127SKrish Sadhukhan break; 198ad879127SKrish Sadhukhan } 199ad879127SKrish Sadhukhan 200ad879127SKrish Sadhukhan if (test->scratch != i) { 201ad879127SKrish Sadhukhan report(false, "dr%u write intercept", i); 202ad879127SKrish Sadhukhan failcnt++; 203ad879127SKrish Sadhukhan } 204ad879127SKrish Sadhukhan } 205ad879127SKrish Sadhukhan 206ad879127SKrish Sadhukhan test->scratch = failcnt; 207ad879127SKrish Sadhukhan } 208ad879127SKrish Sadhukhan 209ad879127SKrish Sadhukhan static bool dr_intercept_finished(struct svm_test *test) 210ad879127SKrish Sadhukhan { 211096cf7feSPaolo Bonzini ulong n = (vmcb->control.exit_code - SVM_EXIT_READ_DR0); 212ad879127SKrish Sadhukhan 213ad879127SKrish Sadhukhan /* Only expect DR intercepts */ 214ad879127SKrish Sadhukhan if (n > (SVM_EXIT_MAX_DR_INTERCEPT - SVM_EXIT_READ_DR0)) 215ad879127SKrish Sadhukhan return true; 216ad879127SKrish Sadhukhan 217ad879127SKrish Sadhukhan /* 218ad879127SKrish Sadhukhan * Compute debug register number. 219ad879127SKrish Sadhukhan * Per Appendix C "SVM Intercept Exit Codes" of AMD64 Architecture 220ad879127SKrish Sadhukhan * Programmer's Manual Volume 2 - System Programming: 221ad879127SKrish Sadhukhan * http://support.amd.com/TechDocs/24593.pdf 222ad879127SKrish Sadhukhan * there are 16 VMEXIT codes each for DR read and write. 223ad879127SKrish Sadhukhan */ 224ad879127SKrish Sadhukhan test->scratch = (n % 16); 225ad879127SKrish Sadhukhan 226ad879127SKrish Sadhukhan /* Jump over MOV instruction */ 227096cf7feSPaolo Bonzini vmcb->save.rip += 3; 228ad879127SKrish Sadhukhan 229ad879127SKrish Sadhukhan return false; 230ad879127SKrish Sadhukhan } 231ad879127SKrish Sadhukhan 232ad879127SKrish Sadhukhan static bool check_dr_intercept(struct svm_test *test) 233ad879127SKrish Sadhukhan { 234ad879127SKrish Sadhukhan return !test->scratch; 235ad879127SKrish Sadhukhan } 236ad879127SKrish Sadhukhan 237ad879127SKrish Sadhukhan static bool next_rip_supported(void) 238ad879127SKrish Sadhukhan { 239ad879127SKrish Sadhukhan return this_cpu_has(X86_FEATURE_NRIPS); 240ad879127SKrish Sadhukhan } 241ad879127SKrish Sadhukhan 242ad879127SKrish Sadhukhan static void prepare_next_rip(struct svm_test *test) 243ad879127SKrish Sadhukhan { 244096cf7feSPaolo Bonzini vmcb->control.intercept |= (1ULL << INTERCEPT_RDTSC); 245ad879127SKrish Sadhukhan } 246ad879127SKrish Sadhukhan 247ad879127SKrish Sadhukhan 248ad879127SKrish Sadhukhan static void test_next_rip(struct svm_test *test) 249ad879127SKrish Sadhukhan { 250ad879127SKrish Sadhukhan asm volatile ("rdtsc\n\t" 251ad879127SKrish Sadhukhan ".globl exp_next_rip\n\t" 252ad879127SKrish Sadhukhan "exp_next_rip:\n\t" ::: "eax", "edx"); 253ad879127SKrish Sadhukhan } 254ad879127SKrish Sadhukhan 255ad879127SKrish Sadhukhan static bool check_next_rip(struct svm_test *test) 256ad879127SKrish Sadhukhan { 257ad879127SKrish Sadhukhan extern char exp_next_rip; 258ad879127SKrish Sadhukhan unsigned long address = (unsigned long)&exp_next_rip; 259ad879127SKrish Sadhukhan 260096cf7feSPaolo Bonzini return address == vmcb->control.next_rip; 261ad879127SKrish Sadhukhan } 262ad879127SKrish Sadhukhan 263ad879127SKrish Sadhukhan extern u8 *msr_bitmap; 264ad879127SKrish Sadhukhan 265ad879127SKrish Sadhukhan static void prepare_msr_intercept(struct svm_test *test) 266ad879127SKrish Sadhukhan { 267ad879127SKrish Sadhukhan default_prepare(test); 268096cf7feSPaolo Bonzini vmcb->control.intercept |= (1ULL << INTERCEPT_MSR_PROT); 269096cf7feSPaolo Bonzini vmcb->control.intercept_exceptions |= (1ULL << GP_VECTOR); 270ad879127SKrish Sadhukhan memset(msr_bitmap, 0xff, MSR_BITMAP_SIZE); 271ad879127SKrish Sadhukhan } 272ad879127SKrish Sadhukhan 273ad879127SKrish Sadhukhan static void test_msr_intercept(struct svm_test *test) 274ad879127SKrish Sadhukhan { 275ad879127SKrish Sadhukhan unsigned long msr_value = 0xef8056791234abcd; /* Arbitrary value */ 276ad879127SKrish Sadhukhan unsigned long msr_index; 277ad879127SKrish Sadhukhan 278ad879127SKrish Sadhukhan for (msr_index = 0; msr_index <= 0xc0011fff; msr_index++) { 279ad879127SKrish Sadhukhan if (msr_index == 0xC0010131 /* MSR_SEV_STATUS */) { 280ad879127SKrish Sadhukhan /* 281ad879127SKrish Sadhukhan * Per section 15.34.10 "SEV_STATUS MSR" of AMD64 Architecture 282ad879127SKrish Sadhukhan * Programmer's Manual volume 2 - System Programming: 283ad879127SKrish Sadhukhan * http://support.amd.com/TechDocs/24593.pdf 284ad879127SKrish Sadhukhan * SEV_STATUS MSR (C001_0131) is a non-interceptable MSR. 285ad879127SKrish Sadhukhan */ 286ad879127SKrish Sadhukhan continue; 287ad879127SKrish Sadhukhan } 288ad879127SKrish Sadhukhan 289ad879127SKrish Sadhukhan /* Skips gaps between supported MSR ranges */ 290ad879127SKrish Sadhukhan if (msr_index == 0x2000) 291ad879127SKrish Sadhukhan msr_index = 0xc0000000; 292ad879127SKrish Sadhukhan else if (msr_index == 0xc0002000) 293ad879127SKrish Sadhukhan msr_index = 0xc0010000; 294ad879127SKrish Sadhukhan 295ad879127SKrish Sadhukhan test->scratch = -1; 296ad879127SKrish Sadhukhan 297ad879127SKrish Sadhukhan rdmsr(msr_index); 298ad879127SKrish Sadhukhan 299ad879127SKrish Sadhukhan /* Check that a read intercept occurred for MSR at msr_index */ 300ad879127SKrish Sadhukhan if (test->scratch != msr_index) 301ad879127SKrish Sadhukhan report(false, "MSR 0x%lx read intercept", msr_index); 302ad879127SKrish Sadhukhan 303ad879127SKrish Sadhukhan /* 304ad879127SKrish Sadhukhan * Poor man approach to generate a value that 305ad879127SKrish Sadhukhan * seems arbitrary each time around the loop. 306ad879127SKrish Sadhukhan */ 307ad879127SKrish Sadhukhan msr_value += (msr_value << 1); 308ad879127SKrish Sadhukhan 309ad879127SKrish Sadhukhan wrmsr(msr_index, msr_value); 310ad879127SKrish Sadhukhan 311ad879127SKrish Sadhukhan /* Check that a write intercept occurred for MSR with msr_value */ 312ad879127SKrish Sadhukhan if (test->scratch != msr_value) 313ad879127SKrish Sadhukhan report(false, "MSR 0x%lx write intercept", msr_index); 314ad879127SKrish Sadhukhan } 315ad879127SKrish Sadhukhan 316ad879127SKrish Sadhukhan test->scratch = -2; 317ad879127SKrish Sadhukhan } 318ad879127SKrish Sadhukhan 319ad879127SKrish Sadhukhan static bool msr_intercept_finished(struct svm_test *test) 320ad879127SKrish Sadhukhan { 321096cf7feSPaolo Bonzini u32 exit_code = vmcb->control.exit_code; 322ad879127SKrish Sadhukhan u64 exit_info_1; 323ad879127SKrish Sadhukhan u8 *opcode; 324ad879127SKrish Sadhukhan 325ad879127SKrish Sadhukhan if (exit_code == SVM_EXIT_MSR) { 326096cf7feSPaolo Bonzini exit_info_1 = vmcb->control.exit_info_1; 327ad879127SKrish Sadhukhan } else { 328ad879127SKrish Sadhukhan /* 329ad879127SKrish Sadhukhan * If #GP exception occurs instead, check that it was 330ad879127SKrish Sadhukhan * for RDMSR/WRMSR and set exit_info_1 accordingly. 331ad879127SKrish Sadhukhan */ 332ad879127SKrish Sadhukhan 333ad879127SKrish Sadhukhan if (exit_code != (SVM_EXIT_EXCP_BASE + GP_VECTOR)) 334ad879127SKrish Sadhukhan return true; 335ad879127SKrish Sadhukhan 336096cf7feSPaolo Bonzini opcode = (u8 *)vmcb->save.rip; 337ad879127SKrish Sadhukhan if (opcode[0] != 0x0f) 338ad879127SKrish Sadhukhan return true; 339ad879127SKrish Sadhukhan 340ad879127SKrish Sadhukhan switch (opcode[1]) { 341ad879127SKrish Sadhukhan case 0x30: /* WRMSR */ 342ad879127SKrish Sadhukhan exit_info_1 = 1; 343ad879127SKrish Sadhukhan break; 344ad879127SKrish Sadhukhan case 0x32: /* RDMSR */ 345ad879127SKrish Sadhukhan exit_info_1 = 0; 346ad879127SKrish Sadhukhan break; 347ad879127SKrish Sadhukhan default: 348ad879127SKrish Sadhukhan return true; 349ad879127SKrish Sadhukhan } 350ad879127SKrish Sadhukhan 351ad879127SKrish Sadhukhan /* 352ad879127SKrish Sadhukhan * Warn that #GP exception occured instead. 353ad879127SKrish Sadhukhan * RCX holds the MSR index. 354ad879127SKrish Sadhukhan */ 355ad879127SKrish Sadhukhan printf("%s 0x%lx #GP exception\n", 356ad879127SKrish Sadhukhan exit_info_1 ? "WRMSR" : "RDMSR", get_regs().rcx); 357ad879127SKrish Sadhukhan } 358ad879127SKrish Sadhukhan 359ad879127SKrish Sadhukhan /* Jump over RDMSR/WRMSR instruction */ 360096cf7feSPaolo Bonzini vmcb->save.rip += 2; 361ad879127SKrish Sadhukhan 362ad879127SKrish Sadhukhan /* 363ad879127SKrish Sadhukhan * Test whether the intercept was for RDMSR/WRMSR. 364ad879127SKrish Sadhukhan * For RDMSR, test->scratch is set to the MSR index; 365ad879127SKrish Sadhukhan * RCX holds the MSR index. 366ad879127SKrish Sadhukhan * For WRMSR, test->scratch is set to the MSR value; 367ad879127SKrish Sadhukhan * RDX holds the upper 32 bits of the MSR value, 368ad879127SKrish Sadhukhan * while RAX hold its lower 32 bits. 369ad879127SKrish Sadhukhan */ 370ad879127SKrish Sadhukhan if (exit_info_1) 371ad879127SKrish Sadhukhan test->scratch = 372096cf7feSPaolo Bonzini ((get_regs().rdx << 32) | (vmcb->save.rax & 0xffffffff)); 373ad879127SKrish Sadhukhan else 374ad879127SKrish Sadhukhan test->scratch = get_regs().rcx; 375ad879127SKrish Sadhukhan 376ad879127SKrish Sadhukhan return false; 377ad879127SKrish Sadhukhan } 378ad879127SKrish Sadhukhan 379ad879127SKrish Sadhukhan static bool check_msr_intercept(struct svm_test *test) 380ad879127SKrish Sadhukhan { 381ad879127SKrish Sadhukhan memset(msr_bitmap, 0, MSR_BITMAP_SIZE); 382ad879127SKrish Sadhukhan return (test->scratch == -2); 383ad879127SKrish Sadhukhan } 384ad879127SKrish Sadhukhan 385ad879127SKrish Sadhukhan static void prepare_mode_switch(struct svm_test *test) 386ad879127SKrish Sadhukhan { 387096cf7feSPaolo Bonzini vmcb->control.intercept_exceptions |= (1ULL << GP_VECTOR) 388ad879127SKrish Sadhukhan | (1ULL << UD_VECTOR) 389ad879127SKrish Sadhukhan | (1ULL << DF_VECTOR) 390ad879127SKrish Sadhukhan | (1ULL << PF_VECTOR); 391ad879127SKrish Sadhukhan test->scratch = 0; 392ad879127SKrish Sadhukhan } 393ad879127SKrish Sadhukhan 394ad879127SKrish Sadhukhan static void test_mode_switch(struct svm_test *test) 395ad879127SKrish Sadhukhan { 396ad879127SKrish Sadhukhan asm volatile(" cli\n" 397ad879127SKrish Sadhukhan " ljmp *1f\n" /* jump to 32-bit code segment */ 398ad879127SKrish Sadhukhan "1:\n" 399ad879127SKrish Sadhukhan " .long 2f\n" 400ad879127SKrish Sadhukhan " .long " xstr(KERNEL_CS32) "\n" 401ad879127SKrish Sadhukhan ".code32\n" 402ad879127SKrish Sadhukhan "2:\n" 403ad879127SKrish Sadhukhan " movl %%cr0, %%eax\n" 404ad879127SKrish Sadhukhan " btcl $31, %%eax\n" /* clear PG */ 405ad879127SKrish Sadhukhan " movl %%eax, %%cr0\n" 406ad879127SKrish Sadhukhan " movl $0xc0000080, %%ecx\n" /* EFER */ 407ad879127SKrish Sadhukhan " rdmsr\n" 408ad879127SKrish Sadhukhan " btcl $8, %%eax\n" /* clear LME */ 409ad879127SKrish Sadhukhan " wrmsr\n" 410ad879127SKrish Sadhukhan " movl %%cr4, %%eax\n" 411ad879127SKrish Sadhukhan " btcl $5, %%eax\n" /* clear PAE */ 412ad879127SKrish Sadhukhan " movl %%eax, %%cr4\n" 413ad879127SKrish Sadhukhan " movw %[ds16], %%ax\n" 414ad879127SKrish Sadhukhan " movw %%ax, %%ds\n" 415ad879127SKrish Sadhukhan " ljmpl %[cs16], $3f\n" /* jump to 16 bit protected-mode */ 416ad879127SKrish Sadhukhan ".code16\n" 417ad879127SKrish Sadhukhan "3:\n" 418ad879127SKrish Sadhukhan " movl %%cr0, %%eax\n" 419ad879127SKrish Sadhukhan " btcl $0, %%eax\n" /* clear PE */ 420ad879127SKrish Sadhukhan " movl %%eax, %%cr0\n" 421ad879127SKrish Sadhukhan " ljmpl $0, $4f\n" /* jump to real-mode */ 422ad879127SKrish Sadhukhan "4:\n" 423ad879127SKrish Sadhukhan " vmmcall\n" 424ad879127SKrish Sadhukhan " movl %%cr0, %%eax\n" 425ad879127SKrish Sadhukhan " btsl $0, %%eax\n" /* set PE */ 426ad879127SKrish Sadhukhan " movl %%eax, %%cr0\n" 427ad879127SKrish Sadhukhan " ljmpl %[cs32], $5f\n" /* back to protected mode */ 428ad879127SKrish Sadhukhan ".code32\n" 429ad879127SKrish Sadhukhan "5:\n" 430ad879127SKrish Sadhukhan " movl %%cr4, %%eax\n" 431ad879127SKrish Sadhukhan " btsl $5, %%eax\n" /* set PAE */ 432ad879127SKrish Sadhukhan " movl %%eax, %%cr4\n" 433ad879127SKrish Sadhukhan " movl $0xc0000080, %%ecx\n" /* EFER */ 434ad879127SKrish Sadhukhan " rdmsr\n" 435ad879127SKrish Sadhukhan " btsl $8, %%eax\n" /* set LME */ 436ad879127SKrish Sadhukhan " wrmsr\n" 437ad879127SKrish Sadhukhan " movl %%cr0, %%eax\n" 438ad879127SKrish Sadhukhan " btsl $31, %%eax\n" /* set PG */ 439ad879127SKrish Sadhukhan " movl %%eax, %%cr0\n" 440ad879127SKrish Sadhukhan " ljmpl %[cs64], $6f\n" /* back to long mode */ 441ad879127SKrish Sadhukhan ".code64\n\t" 442ad879127SKrish Sadhukhan "6:\n" 443ad879127SKrish Sadhukhan " vmmcall\n" 444ad879127SKrish Sadhukhan :: [cs16] "i"(KERNEL_CS16), [ds16] "i"(KERNEL_DS16), 445ad879127SKrish Sadhukhan [cs32] "i"(KERNEL_CS32), [cs64] "i"(KERNEL_CS64) 446ad879127SKrish Sadhukhan : "rax", "rbx", "rcx", "rdx", "memory"); 447ad879127SKrish Sadhukhan } 448ad879127SKrish Sadhukhan 449ad879127SKrish Sadhukhan static bool mode_switch_finished(struct svm_test *test) 450ad879127SKrish Sadhukhan { 451ad879127SKrish Sadhukhan u64 cr0, cr4, efer; 452ad879127SKrish Sadhukhan 453096cf7feSPaolo Bonzini cr0 = vmcb->save.cr0; 454096cf7feSPaolo Bonzini cr4 = vmcb->save.cr4; 455096cf7feSPaolo Bonzini efer = vmcb->save.efer; 456ad879127SKrish Sadhukhan 457ad879127SKrish Sadhukhan /* Only expect VMMCALL intercepts */ 458096cf7feSPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_VMMCALL) 459ad879127SKrish Sadhukhan return true; 460ad879127SKrish Sadhukhan 461ad879127SKrish Sadhukhan /* Jump over VMMCALL instruction */ 462096cf7feSPaolo Bonzini vmcb->save.rip += 3; 463ad879127SKrish Sadhukhan 464ad879127SKrish Sadhukhan /* Do sanity checks */ 465ad879127SKrish Sadhukhan switch (test->scratch) { 466ad879127SKrish Sadhukhan case 0: 467ad879127SKrish Sadhukhan /* Test should be in real mode now - check for this */ 468ad879127SKrish Sadhukhan if ((cr0 & 0x80000001) || /* CR0.PG, CR0.PE */ 469ad879127SKrish Sadhukhan (cr4 & 0x00000020) || /* CR4.PAE */ 470ad879127SKrish Sadhukhan (efer & 0x00000500)) /* EFER.LMA, EFER.LME */ 471ad879127SKrish Sadhukhan return true; 472ad879127SKrish Sadhukhan break; 473ad879127SKrish Sadhukhan case 2: 474ad879127SKrish Sadhukhan /* Test should be back in long-mode now - check for this */ 475ad879127SKrish Sadhukhan if (((cr0 & 0x80000001) != 0x80000001) || /* CR0.PG, CR0.PE */ 476ad879127SKrish Sadhukhan ((cr4 & 0x00000020) != 0x00000020) || /* CR4.PAE */ 477ad879127SKrish Sadhukhan ((efer & 0x00000500) != 0x00000500)) /* EFER.LMA, EFER.LME */ 478ad879127SKrish Sadhukhan return true; 479ad879127SKrish Sadhukhan break; 480ad879127SKrish Sadhukhan } 481ad879127SKrish Sadhukhan 482ad879127SKrish Sadhukhan /* one step forward */ 483ad879127SKrish Sadhukhan test->scratch += 1; 484ad879127SKrish Sadhukhan 485ad879127SKrish Sadhukhan return test->scratch == 2; 486ad879127SKrish Sadhukhan } 487ad879127SKrish Sadhukhan 488ad879127SKrish Sadhukhan static bool check_mode_switch(struct svm_test *test) 489ad879127SKrish Sadhukhan { 490ad879127SKrish Sadhukhan return test->scratch == 2; 491ad879127SKrish Sadhukhan } 492ad879127SKrish Sadhukhan 493ad879127SKrish Sadhukhan extern u8 *io_bitmap; 494ad879127SKrish Sadhukhan 495ad879127SKrish Sadhukhan static void prepare_ioio(struct svm_test *test) 496ad879127SKrish Sadhukhan { 497096cf7feSPaolo Bonzini vmcb->control.intercept |= (1ULL << INTERCEPT_IOIO_PROT); 498ad879127SKrish Sadhukhan test->scratch = 0; 499ad879127SKrish Sadhukhan memset(io_bitmap, 0, 8192); 500ad879127SKrish Sadhukhan io_bitmap[8192] = 0xFF; 501ad879127SKrish Sadhukhan } 502ad879127SKrish Sadhukhan 503ad879127SKrish Sadhukhan static void test_ioio(struct svm_test *test) 504ad879127SKrish Sadhukhan { 505ad879127SKrish Sadhukhan // stage 0, test IO pass 506ad879127SKrish Sadhukhan inb(0x5000); 507ad879127SKrish Sadhukhan outb(0x0, 0x5000); 508ad879127SKrish Sadhukhan if (get_test_stage(test) != 0) 509ad879127SKrish Sadhukhan goto fail; 510ad879127SKrish Sadhukhan 511ad879127SKrish Sadhukhan // test IO width, in/out 512ad879127SKrish Sadhukhan io_bitmap[0] = 0xFF; 513ad879127SKrish Sadhukhan inc_test_stage(test); 514ad879127SKrish Sadhukhan inb(0x0); 515ad879127SKrish Sadhukhan if (get_test_stage(test) != 2) 516ad879127SKrish Sadhukhan goto fail; 517ad879127SKrish Sadhukhan 518ad879127SKrish Sadhukhan outw(0x0, 0x0); 519ad879127SKrish Sadhukhan if (get_test_stage(test) != 3) 520ad879127SKrish Sadhukhan goto fail; 521ad879127SKrish Sadhukhan 522ad879127SKrish Sadhukhan inl(0x0); 523ad879127SKrish Sadhukhan if (get_test_stage(test) != 4) 524ad879127SKrish Sadhukhan goto fail; 525ad879127SKrish Sadhukhan 526ad879127SKrish Sadhukhan // test low/high IO port 527ad879127SKrish Sadhukhan io_bitmap[0x5000 / 8] = (1 << (0x5000 % 8)); 528ad879127SKrish Sadhukhan inb(0x5000); 529ad879127SKrish Sadhukhan if (get_test_stage(test) != 5) 530ad879127SKrish Sadhukhan goto fail; 531ad879127SKrish Sadhukhan 532ad879127SKrish Sadhukhan io_bitmap[0x9000 / 8] = (1 << (0x9000 % 8)); 533ad879127SKrish Sadhukhan inw(0x9000); 534ad879127SKrish Sadhukhan if (get_test_stage(test) != 6) 535ad879127SKrish Sadhukhan goto fail; 536ad879127SKrish Sadhukhan 537ad879127SKrish Sadhukhan // test partial pass 538ad879127SKrish Sadhukhan io_bitmap[0x5000 / 8] = (1 << (0x5000 % 8)); 539ad879127SKrish Sadhukhan inl(0x4FFF); 540ad879127SKrish Sadhukhan if (get_test_stage(test) != 7) 541ad879127SKrish Sadhukhan goto fail; 542ad879127SKrish Sadhukhan 543ad879127SKrish Sadhukhan // test across pages 544ad879127SKrish Sadhukhan inc_test_stage(test); 545ad879127SKrish Sadhukhan inl(0x7FFF); 546ad879127SKrish Sadhukhan if (get_test_stage(test) != 8) 547ad879127SKrish Sadhukhan goto fail; 548ad879127SKrish Sadhukhan 549ad879127SKrish Sadhukhan inc_test_stage(test); 550ad879127SKrish Sadhukhan io_bitmap[0x8000 / 8] = 1 << (0x8000 % 8); 551ad879127SKrish Sadhukhan inl(0x7FFF); 552ad879127SKrish Sadhukhan if (get_test_stage(test) != 10) 553ad879127SKrish Sadhukhan goto fail; 554ad879127SKrish Sadhukhan 555ad879127SKrish Sadhukhan io_bitmap[0] = 0; 556ad879127SKrish Sadhukhan inl(0xFFFF); 557ad879127SKrish Sadhukhan if (get_test_stage(test) != 11) 558ad879127SKrish Sadhukhan goto fail; 559ad879127SKrish Sadhukhan 560ad879127SKrish Sadhukhan io_bitmap[0] = 0xFF; 561ad879127SKrish Sadhukhan io_bitmap[8192] = 0; 562ad879127SKrish Sadhukhan inl(0xFFFF); 563ad879127SKrish Sadhukhan inc_test_stage(test); 564ad879127SKrish Sadhukhan if (get_test_stage(test) != 12) 565ad879127SKrish Sadhukhan goto fail; 566ad879127SKrish Sadhukhan 567ad879127SKrish Sadhukhan return; 568ad879127SKrish Sadhukhan 569ad879127SKrish Sadhukhan fail: 570ad879127SKrish Sadhukhan report(false, "stage %d", get_test_stage(test)); 571ad879127SKrish Sadhukhan test->scratch = -1; 572ad879127SKrish Sadhukhan } 573ad879127SKrish Sadhukhan 574ad879127SKrish Sadhukhan static bool ioio_finished(struct svm_test *test) 575ad879127SKrish Sadhukhan { 576ad879127SKrish Sadhukhan unsigned port, size; 577ad879127SKrish Sadhukhan 578ad879127SKrish Sadhukhan /* Only expect IOIO intercepts */ 579096cf7feSPaolo Bonzini if (vmcb->control.exit_code == SVM_EXIT_VMMCALL) 580ad879127SKrish Sadhukhan return true; 581ad879127SKrish Sadhukhan 582096cf7feSPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_IOIO) 583ad879127SKrish Sadhukhan return true; 584ad879127SKrish Sadhukhan 585ad879127SKrish Sadhukhan /* one step forward */ 586ad879127SKrish Sadhukhan test->scratch += 1; 587ad879127SKrish Sadhukhan 588096cf7feSPaolo Bonzini port = vmcb->control.exit_info_1 >> 16; 589096cf7feSPaolo Bonzini size = (vmcb->control.exit_info_1 >> SVM_IOIO_SIZE_SHIFT) & 7; 590ad879127SKrish Sadhukhan 591ad879127SKrish Sadhukhan while (size--) { 592ad879127SKrish Sadhukhan io_bitmap[port / 8] &= ~(1 << (port & 7)); 593ad879127SKrish Sadhukhan port++; 594ad879127SKrish Sadhukhan } 595ad879127SKrish Sadhukhan 596ad879127SKrish Sadhukhan return false; 597ad879127SKrish Sadhukhan } 598ad879127SKrish Sadhukhan 599ad879127SKrish Sadhukhan static bool check_ioio(struct svm_test *test) 600ad879127SKrish Sadhukhan { 601ad879127SKrish Sadhukhan memset(io_bitmap, 0, 8193); 602ad879127SKrish Sadhukhan return test->scratch != -1; 603ad879127SKrish Sadhukhan } 604ad879127SKrish Sadhukhan 605ad879127SKrish Sadhukhan static void prepare_asid_zero(struct svm_test *test) 606ad879127SKrish Sadhukhan { 607096cf7feSPaolo Bonzini vmcb->control.asid = 0; 608ad879127SKrish Sadhukhan } 609ad879127SKrish Sadhukhan 610ad879127SKrish Sadhukhan static void test_asid_zero(struct svm_test *test) 611ad879127SKrish Sadhukhan { 612ad879127SKrish Sadhukhan asm volatile ("vmmcall\n\t"); 613ad879127SKrish Sadhukhan } 614ad879127SKrish Sadhukhan 615ad879127SKrish Sadhukhan static bool check_asid_zero(struct svm_test *test) 616ad879127SKrish Sadhukhan { 617096cf7feSPaolo Bonzini return vmcb->control.exit_code == SVM_EXIT_ERR; 618ad879127SKrish Sadhukhan } 619ad879127SKrish Sadhukhan 620ad879127SKrish Sadhukhan static void sel_cr0_bug_prepare(struct svm_test *test) 621ad879127SKrish Sadhukhan { 622096cf7feSPaolo Bonzini vmcb_ident(vmcb); 623096cf7feSPaolo Bonzini vmcb->control.intercept |= (1ULL << INTERCEPT_SELECTIVE_CR0); 624ad879127SKrish Sadhukhan } 625ad879127SKrish Sadhukhan 626ad879127SKrish Sadhukhan static bool sel_cr0_bug_finished(struct svm_test *test) 627ad879127SKrish Sadhukhan { 628ad879127SKrish Sadhukhan return true; 629ad879127SKrish Sadhukhan } 630ad879127SKrish Sadhukhan 631ad879127SKrish Sadhukhan static void sel_cr0_bug_test(struct svm_test *test) 632ad879127SKrish Sadhukhan { 633ad879127SKrish Sadhukhan unsigned long cr0; 634ad879127SKrish Sadhukhan 635ad879127SKrish Sadhukhan /* read cr0, clear CD, and write back */ 636ad879127SKrish Sadhukhan cr0 = read_cr0(); 637ad879127SKrish Sadhukhan cr0 |= (1UL << 30); 638ad879127SKrish Sadhukhan write_cr0(cr0); 639ad879127SKrish Sadhukhan 640ad879127SKrish Sadhukhan /* 641ad879127SKrish Sadhukhan * If we are here the test failed, not sure what to do now because we 642ad879127SKrish Sadhukhan * are not in guest-mode anymore so we can't trigger an intercept. 643ad879127SKrish Sadhukhan * Trigger a tripple-fault for now. 644ad879127SKrish Sadhukhan */ 645ad879127SKrish Sadhukhan report(false, "sel_cr0 test. Can not recover from this - exiting"); 646ad879127SKrish Sadhukhan exit(report_summary()); 647ad879127SKrish Sadhukhan } 648ad879127SKrish Sadhukhan 649ad879127SKrish Sadhukhan static bool sel_cr0_bug_check(struct svm_test *test) 650ad879127SKrish Sadhukhan { 651096cf7feSPaolo Bonzini return vmcb->control.exit_code == SVM_EXIT_CR0_SEL_WRITE; 652ad879127SKrish Sadhukhan } 653ad879127SKrish Sadhukhan 654ad879127SKrish Sadhukhan static void npt_nx_prepare(struct svm_test *test) 655ad879127SKrish Sadhukhan { 656ad879127SKrish Sadhukhan 657ad879127SKrish Sadhukhan u64 *pte; 658ad879127SKrish Sadhukhan 659096cf7feSPaolo Bonzini vmcb_ident(vmcb); 660ad879127SKrish Sadhukhan pte = npt_get_pte((u64)null_test); 661ad879127SKrish Sadhukhan 662ad879127SKrish Sadhukhan *pte |= (1ULL << 63); 663ad879127SKrish Sadhukhan } 664ad879127SKrish Sadhukhan 665ad879127SKrish Sadhukhan static bool npt_nx_check(struct svm_test *test) 666ad879127SKrish Sadhukhan { 667ad879127SKrish Sadhukhan u64 *pte = npt_get_pte((u64)null_test); 668ad879127SKrish Sadhukhan 669ad879127SKrish Sadhukhan *pte &= ~(1ULL << 63); 670ad879127SKrish Sadhukhan 671096cf7feSPaolo Bonzini vmcb->save.efer |= (1 << 11); 672ad879127SKrish Sadhukhan 673096cf7feSPaolo Bonzini return (vmcb->control.exit_code == SVM_EXIT_NPF) 674096cf7feSPaolo Bonzini && (vmcb->control.exit_info_1 == 0x100000015ULL); 675ad879127SKrish Sadhukhan } 676ad879127SKrish Sadhukhan 677ad879127SKrish Sadhukhan static void npt_us_prepare(struct svm_test *test) 678ad879127SKrish Sadhukhan { 679ad879127SKrish Sadhukhan u64 *pte; 680ad879127SKrish Sadhukhan 681ad879127SKrish Sadhukhan scratch_page = alloc_page(); 682096cf7feSPaolo Bonzini vmcb_ident(vmcb); 683ad879127SKrish Sadhukhan pte = npt_get_pte((u64)scratch_page); 684ad879127SKrish Sadhukhan 685ad879127SKrish Sadhukhan *pte &= ~(1ULL << 2); 686ad879127SKrish Sadhukhan } 687ad879127SKrish Sadhukhan 688ad879127SKrish Sadhukhan static void npt_us_test(struct svm_test *test) 689ad879127SKrish Sadhukhan { 690ad879127SKrish Sadhukhan (void) *(volatile u64 *)scratch_page; 691ad879127SKrish Sadhukhan } 692ad879127SKrish Sadhukhan 693ad879127SKrish Sadhukhan static bool npt_us_check(struct svm_test *test) 694ad879127SKrish Sadhukhan { 695ad879127SKrish Sadhukhan u64 *pte = npt_get_pte((u64)scratch_page); 696ad879127SKrish Sadhukhan 697ad879127SKrish Sadhukhan *pte |= (1ULL << 2); 698ad879127SKrish Sadhukhan 699096cf7feSPaolo Bonzini return (vmcb->control.exit_code == SVM_EXIT_NPF) 700096cf7feSPaolo Bonzini && (vmcb->control.exit_info_1 == 0x100000005ULL); 701ad879127SKrish Sadhukhan } 702ad879127SKrish Sadhukhan 703ad879127SKrish Sadhukhan u64 save_pde; 704ad879127SKrish Sadhukhan 705ad879127SKrish Sadhukhan static void npt_rsvd_prepare(struct svm_test *test) 706ad879127SKrish Sadhukhan { 707ad879127SKrish Sadhukhan u64 *pde; 708ad879127SKrish Sadhukhan 709096cf7feSPaolo Bonzini vmcb_ident(vmcb); 710ad879127SKrish Sadhukhan pde = npt_get_pde((u64) null_test); 711ad879127SKrish Sadhukhan 712ad879127SKrish Sadhukhan save_pde = *pde; 713ad879127SKrish Sadhukhan *pde = (1ULL << 19) | (1ULL << 7) | 0x27; 714ad879127SKrish Sadhukhan } 715ad879127SKrish Sadhukhan 716ad879127SKrish Sadhukhan static bool npt_rsvd_check(struct svm_test *test) 717ad879127SKrish Sadhukhan { 718ad879127SKrish Sadhukhan u64 *pde = npt_get_pde((u64) null_test); 719ad879127SKrish Sadhukhan 720ad879127SKrish Sadhukhan *pde = save_pde; 721ad879127SKrish Sadhukhan 722096cf7feSPaolo Bonzini return (vmcb->control.exit_code == SVM_EXIT_NPF) 723096cf7feSPaolo Bonzini && (vmcb->control.exit_info_1 == 0x10000001dULL); 724ad879127SKrish Sadhukhan } 725ad879127SKrish Sadhukhan 726ad879127SKrish Sadhukhan static void npt_rw_prepare(struct svm_test *test) 727ad879127SKrish Sadhukhan { 728ad879127SKrish Sadhukhan 729ad879127SKrish Sadhukhan u64 *pte; 730ad879127SKrish Sadhukhan 731096cf7feSPaolo Bonzini vmcb_ident(vmcb); 732ad879127SKrish Sadhukhan pte = npt_get_pte(0x80000); 733ad879127SKrish Sadhukhan 734ad879127SKrish Sadhukhan *pte &= ~(1ULL << 1); 735ad879127SKrish Sadhukhan } 736ad879127SKrish Sadhukhan 737ad879127SKrish Sadhukhan static void npt_rw_test(struct svm_test *test) 738ad879127SKrish Sadhukhan { 739ad879127SKrish Sadhukhan u64 *data = (void*)(0x80000); 740ad879127SKrish Sadhukhan 741ad879127SKrish Sadhukhan *data = 0; 742ad879127SKrish Sadhukhan } 743ad879127SKrish Sadhukhan 744ad879127SKrish Sadhukhan static bool npt_rw_check(struct svm_test *test) 745ad879127SKrish Sadhukhan { 746ad879127SKrish Sadhukhan u64 *pte = npt_get_pte(0x80000); 747ad879127SKrish Sadhukhan 748ad879127SKrish Sadhukhan *pte |= (1ULL << 1); 749ad879127SKrish Sadhukhan 750096cf7feSPaolo Bonzini return (vmcb->control.exit_code == SVM_EXIT_NPF) 751096cf7feSPaolo Bonzini && (vmcb->control.exit_info_1 == 0x100000007ULL); 752ad879127SKrish Sadhukhan } 753ad879127SKrish Sadhukhan 754ad879127SKrish Sadhukhan static void npt_rw_pfwalk_prepare(struct svm_test *test) 755ad879127SKrish Sadhukhan { 756ad879127SKrish Sadhukhan 757ad879127SKrish Sadhukhan u64 *pte; 758ad879127SKrish Sadhukhan 759096cf7feSPaolo Bonzini vmcb_ident(vmcb); 760ad879127SKrish Sadhukhan pte = npt_get_pte(read_cr3()); 761ad879127SKrish Sadhukhan 762ad879127SKrish Sadhukhan *pte &= ~(1ULL << 1); 763ad879127SKrish Sadhukhan } 764ad879127SKrish Sadhukhan 765ad879127SKrish Sadhukhan static bool npt_rw_pfwalk_check(struct svm_test *test) 766ad879127SKrish Sadhukhan { 767ad879127SKrish Sadhukhan u64 *pte = npt_get_pte(read_cr3()); 768ad879127SKrish Sadhukhan 769ad879127SKrish Sadhukhan *pte |= (1ULL << 1); 770ad879127SKrish Sadhukhan 771096cf7feSPaolo Bonzini return (vmcb->control.exit_code == SVM_EXIT_NPF) 772096cf7feSPaolo Bonzini && (vmcb->control.exit_info_1 == 0x200000006ULL) 773096cf7feSPaolo Bonzini && (vmcb->control.exit_info_2 == read_cr3()); 774ad879127SKrish Sadhukhan } 775ad879127SKrish Sadhukhan 776ad879127SKrish Sadhukhan static void npt_rsvd_pfwalk_prepare(struct svm_test *test) 777ad879127SKrish Sadhukhan { 778ad879127SKrish Sadhukhan u64 *pdpe; 779096cf7feSPaolo Bonzini vmcb_ident(vmcb); 780ad879127SKrish Sadhukhan 781ad879127SKrish Sadhukhan pdpe = npt_get_pdpe(); 782ad879127SKrish Sadhukhan pdpe[0] |= (1ULL << 8); 783ad879127SKrish Sadhukhan } 784ad879127SKrish Sadhukhan 785ad879127SKrish Sadhukhan static bool npt_rsvd_pfwalk_check(struct svm_test *test) 786ad879127SKrish Sadhukhan { 787ad879127SKrish Sadhukhan u64 *pdpe = npt_get_pdpe(); 788ad879127SKrish Sadhukhan pdpe[0] &= ~(1ULL << 8); 789ad879127SKrish Sadhukhan 790096cf7feSPaolo Bonzini return (vmcb->control.exit_code == SVM_EXIT_NPF) 791096cf7feSPaolo Bonzini && (vmcb->control.exit_info_1 == 0x20000000eULL); 792ad879127SKrish Sadhukhan } 793ad879127SKrish Sadhukhan 794ad879127SKrish Sadhukhan static void npt_l1mmio_prepare(struct svm_test *test) 795ad879127SKrish Sadhukhan { 796096cf7feSPaolo Bonzini vmcb_ident(vmcb); 797ad879127SKrish Sadhukhan } 798ad879127SKrish Sadhukhan 799ad879127SKrish Sadhukhan u32 nested_apic_version1; 800ad879127SKrish Sadhukhan u32 nested_apic_version2; 801ad879127SKrish Sadhukhan 802ad879127SKrish Sadhukhan static void npt_l1mmio_test(struct svm_test *test) 803ad879127SKrish Sadhukhan { 804ad879127SKrish Sadhukhan volatile u32 *data = (volatile void*)(0xfee00030UL); 805ad879127SKrish Sadhukhan 806ad879127SKrish Sadhukhan nested_apic_version1 = *data; 807ad879127SKrish Sadhukhan nested_apic_version2 = *data; 808ad879127SKrish Sadhukhan } 809ad879127SKrish Sadhukhan 810ad879127SKrish Sadhukhan static bool npt_l1mmio_check(struct svm_test *test) 811ad879127SKrish Sadhukhan { 812ad879127SKrish Sadhukhan volatile u32 *data = (volatile void*)(0xfee00030); 813ad879127SKrish Sadhukhan u32 lvr = *data; 814ad879127SKrish Sadhukhan 815ad879127SKrish Sadhukhan return nested_apic_version1 == lvr && nested_apic_version2 == lvr; 816ad879127SKrish Sadhukhan } 817ad879127SKrish Sadhukhan 818ad879127SKrish Sadhukhan static void npt_rw_l1mmio_prepare(struct svm_test *test) 819ad879127SKrish Sadhukhan { 820ad879127SKrish Sadhukhan 821ad879127SKrish Sadhukhan u64 *pte; 822ad879127SKrish Sadhukhan 823096cf7feSPaolo Bonzini vmcb_ident(vmcb); 824ad879127SKrish Sadhukhan pte = npt_get_pte(0xfee00080); 825ad879127SKrish Sadhukhan 826ad879127SKrish Sadhukhan *pte &= ~(1ULL << 1); 827ad879127SKrish Sadhukhan } 828ad879127SKrish Sadhukhan 829ad879127SKrish Sadhukhan static void npt_rw_l1mmio_test(struct svm_test *test) 830ad879127SKrish Sadhukhan { 831ad879127SKrish Sadhukhan volatile u32 *data = (volatile void*)(0xfee00080); 832ad879127SKrish Sadhukhan 833ad879127SKrish Sadhukhan *data = *data; 834ad879127SKrish Sadhukhan } 835ad879127SKrish Sadhukhan 836ad879127SKrish Sadhukhan static bool npt_rw_l1mmio_check(struct svm_test *test) 837ad879127SKrish Sadhukhan { 838ad879127SKrish Sadhukhan u64 *pte = npt_get_pte(0xfee00080); 839ad879127SKrish Sadhukhan 840ad879127SKrish Sadhukhan *pte |= (1ULL << 1); 841ad879127SKrish Sadhukhan 842096cf7feSPaolo Bonzini return (vmcb->control.exit_code == SVM_EXIT_NPF) 843096cf7feSPaolo Bonzini && (vmcb->control.exit_info_1 == 0x100000007ULL); 844ad879127SKrish Sadhukhan } 845ad879127SKrish Sadhukhan 846ad879127SKrish Sadhukhan #define TSC_ADJUST_VALUE (1ll << 32) 847ad879127SKrish Sadhukhan #define TSC_OFFSET_VALUE (-1ll << 48) 848ad879127SKrish Sadhukhan static bool ok; 849ad879127SKrish Sadhukhan 850ad879127SKrish Sadhukhan static void tsc_adjust_prepare(struct svm_test *test) 851ad879127SKrish Sadhukhan { 852ad879127SKrish Sadhukhan default_prepare(test); 853096cf7feSPaolo Bonzini vmcb->control.tsc_offset = TSC_OFFSET_VALUE; 854ad879127SKrish Sadhukhan 855ad879127SKrish Sadhukhan wrmsr(MSR_IA32_TSC_ADJUST, -TSC_ADJUST_VALUE); 856ad879127SKrish Sadhukhan int64_t adjust = rdmsr(MSR_IA32_TSC_ADJUST); 857ad879127SKrish Sadhukhan ok = adjust == -TSC_ADJUST_VALUE; 858ad879127SKrish Sadhukhan } 859ad879127SKrish Sadhukhan 860ad879127SKrish Sadhukhan static void tsc_adjust_test(struct svm_test *test) 861ad879127SKrish Sadhukhan { 862ad879127SKrish Sadhukhan int64_t adjust = rdmsr(MSR_IA32_TSC_ADJUST); 863ad879127SKrish Sadhukhan ok &= adjust == -TSC_ADJUST_VALUE; 864ad879127SKrish Sadhukhan 865ad879127SKrish Sadhukhan uint64_t l1_tsc = rdtsc() - TSC_OFFSET_VALUE; 866ad879127SKrish Sadhukhan wrmsr(MSR_IA32_TSC, l1_tsc - TSC_ADJUST_VALUE); 867ad879127SKrish Sadhukhan 868ad879127SKrish Sadhukhan adjust = rdmsr(MSR_IA32_TSC_ADJUST); 869ad879127SKrish Sadhukhan ok &= adjust <= -2 * TSC_ADJUST_VALUE; 870ad879127SKrish Sadhukhan 871ad879127SKrish Sadhukhan uint64_t l1_tsc_end = rdtsc() - TSC_OFFSET_VALUE; 872ad879127SKrish Sadhukhan ok &= (l1_tsc_end + TSC_ADJUST_VALUE - l1_tsc) < TSC_ADJUST_VALUE; 873ad879127SKrish Sadhukhan 874ad879127SKrish Sadhukhan uint64_t l1_tsc_msr = rdmsr(MSR_IA32_TSC) - TSC_OFFSET_VALUE; 875ad879127SKrish Sadhukhan ok &= (l1_tsc_msr + TSC_ADJUST_VALUE - l1_tsc) < TSC_ADJUST_VALUE; 876ad879127SKrish Sadhukhan } 877ad879127SKrish Sadhukhan 878ad879127SKrish Sadhukhan static bool tsc_adjust_check(struct svm_test *test) 879ad879127SKrish Sadhukhan { 880ad879127SKrish Sadhukhan int64_t adjust = rdmsr(MSR_IA32_TSC_ADJUST); 881ad879127SKrish Sadhukhan 882ad879127SKrish Sadhukhan wrmsr(MSR_IA32_TSC_ADJUST, 0); 883ad879127SKrish Sadhukhan return ok && adjust <= -2 * TSC_ADJUST_VALUE; 884ad879127SKrish Sadhukhan } 885ad879127SKrish Sadhukhan 886ad879127SKrish Sadhukhan static void latency_prepare(struct svm_test *test) 887ad879127SKrish Sadhukhan { 888ad879127SKrish Sadhukhan default_prepare(test); 889ad879127SKrish Sadhukhan runs = LATENCY_RUNS; 890ad879127SKrish Sadhukhan latvmrun_min = latvmexit_min = -1ULL; 891ad879127SKrish Sadhukhan latvmrun_max = latvmexit_max = 0; 892ad879127SKrish Sadhukhan vmrun_sum = vmexit_sum = 0; 893ad879127SKrish Sadhukhan tsc_start = rdtsc(); 894ad879127SKrish Sadhukhan } 895ad879127SKrish Sadhukhan 896ad879127SKrish Sadhukhan static void latency_test(struct svm_test *test) 897ad879127SKrish Sadhukhan { 898ad879127SKrish Sadhukhan u64 cycles; 899ad879127SKrish Sadhukhan 900ad879127SKrish Sadhukhan start: 901ad879127SKrish Sadhukhan tsc_end = rdtsc(); 902ad879127SKrish Sadhukhan 903ad879127SKrish Sadhukhan cycles = tsc_end - tsc_start; 904ad879127SKrish Sadhukhan 905ad879127SKrish Sadhukhan if (cycles > latvmrun_max) 906ad879127SKrish Sadhukhan latvmrun_max = cycles; 907ad879127SKrish Sadhukhan 908ad879127SKrish Sadhukhan if (cycles < latvmrun_min) 909ad879127SKrish Sadhukhan latvmrun_min = cycles; 910ad879127SKrish Sadhukhan 911ad879127SKrish Sadhukhan vmrun_sum += cycles; 912ad879127SKrish Sadhukhan 913ad879127SKrish Sadhukhan tsc_start = rdtsc(); 914ad879127SKrish Sadhukhan 915ad879127SKrish Sadhukhan asm volatile ("vmmcall" : : : "memory"); 916ad879127SKrish Sadhukhan goto start; 917ad879127SKrish Sadhukhan } 918ad879127SKrish Sadhukhan 919ad879127SKrish Sadhukhan static bool latency_finished(struct svm_test *test) 920ad879127SKrish Sadhukhan { 921ad879127SKrish Sadhukhan u64 cycles; 922ad879127SKrish Sadhukhan 923ad879127SKrish Sadhukhan tsc_end = rdtsc(); 924ad879127SKrish Sadhukhan 925ad879127SKrish Sadhukhan cycles = tsc_end - tsc_start; 926ad879127SKrish Sadhukhan 927ad879127SKrish Sadhukhan if (cycles > latvmexit_max) 928ad879127SKrish Sadhukhan latvmexit_max = cycles; 929ad879127SKrish Sadhukhan 930ad879127SKrish Sadhukhan if (cycles < latvmexit_min) 931ad879127SKrish Sadhukhan latvmexit_min = cycles; 932ad879127SKrish Sadhukhan 933ad879127SKrish Sadhukhan vmexit_sum += cycles; 934ad879127SKrish Sadhukhan 935096cf7feSPaolo Bonzini vmcb->save.rip += 3; 936ad879127SKrish Sadhukhan 937ad879127SKrish Sadhukhan runs -= 1; 938ad879127SKrish Sadhukhan 939ad879127SKrish Sadhukhan tsc_end = rdtsc(); 940ad879127SKrish Sadhukhan 941ad879127SKrish Sadhukhan return runs == 0; 942ad879127SKrish Sadhukhan } 943ad879127SKrish Sadhukhan 944ad879127SKrish Sadhukhan static bool latency_check(struct svm_test *test) 945ad879127SKrish Sadhukhan { 946ad879127SKrish Sadhukhan printf(" Latency VMRUN : max: %ld min: %ld avg: %ld\n", latvmrun_max, 947ad879127SKrish Sadhukhan latvmrun_min, vmrun_sum / LATENCY_RUNS); 948ad879127SKrish Sadhukhan printf(" Latency VMEXIT: max: %ld min: %ld avg: %ld\n", latvmexit_max, 949ad879127SKrish Sadhukhan latvmexit_min, vmexit_sum / LATENCY_RUNS); 950ad879127SKrish Sadhukhan return true; 951ad879127SKrish Sadhukhan } 952ad879127SKrish Sadhukhan 953ad879127SKrish Sadhukhan static void lat_svm_insn_prepare(struct svm_test *test) 954ad879127SKrish Sadhukhan { 955ad879127SKrish Sadhukhan default_prepare(test); 956ad879127SKrish Sadhukhan runs = LATENCY_RUNS; 957ad879127SKrish Sadhukhan latvmload_min = latvmsave_min = latstgi_min = latclgi_min = -1ULL; 958ad879127SKrish Sadhukhan latvmload_max = latvmsave_max = latstgi_max = latclgi_max = 0; 959ad879127SKrish Sadhukhan vmload_sum = vmsave_sum = stgi_sum = clgi_sum; 960ad879127SKrish Sadhukhan } 961ad879127SKrish Sadhukhan 962ad879127SKrish Sadhukhan static bool lat_svm_insn_finished(struct svm_test *test) 963ad879127SKrish Sadhukhan { 964096cf7feSPaolo Bonzini u64 vmcb_phys = virt_to_phys(vmcb); 965ad879127SKrish Sadhukhan u64 cycles; 966ad879127SKrish Sadhukhan 967ad879127SKrish Sadhukhan for ( ; runs != 0; runs--) { 968ad879127SKrish Sadhukhan tsc_start = rdtsc(); 969ad879127SKrish Sadhukhan asm volatile("vmload %0\n\t" : : "a"(vmcb_phys) : "memory"); 970ad879127SKrish Sadhukhan cycles = rdtsc() - tsc_start; 971ad879127SKrish Sadhukhan if (cycles > latvmload_max) 972ad879127SKrish Sadhukhan latvmload_max = cycles; 973ad879127SKrish Sadhukhan if (cycles < latvmload_min) 974ad879127SKrish Sadhukhan latvmload_min = cycles; 975ad879127SKrish Sadhukhan vmload_sum += cycles; 976ad879127SKrish Sadhukhan 977ad879127SKrish Sadhukhan tsc_start = rdtsc(); 978ad879127SKrish Sadhukhan asm volatile("vmsave %0\n\t" : : "a"(vmcb_phys) : "memory"); 979ad879127SKrish Sadhukhan cycles = rdtsc() - tsc_start; 980ad879127SKrish Sadhukhan if (cycles > latvmsave_max) 981ad879127SKrish Sadhukhan latvmsave_max = cycles; 982ad879127SKrish Sadhukhan if (cycles < latvmsave_min) 983ad879127SKrish Sadhukhan latvmsave_min = cycles; 984ad879127SKrish Sadhukhan vmsave_sum += cycles; 985ad879127SKrish Sadhukhan 986ad879127SKrish Sadhukhan tsc_start = rdtsc(); 987ad879127SKrish Sadhukhan asm volatile("stgi\n\t"); 988ad879127SKrish Sadhukhan cycles = rdtsc() - tsc_start; 989ad879127SKrish Sadhukhan if (cycles > latstgi_max) 990ad879127SKrish Sadhukhan latstgi_max = cycles; 991ad879127SKrish Sadhukhan if (cycles < latstgi_min) 992ad879127SKrish Sadhukhan latstgi_min = cycles; 993ad879127SKrish Sadhukhan stgi_sum += cycles; 994ad879127SKrish Sadhukhan 995ad879127SKrish Sadhukhan tsc_start = rdtsc(); 996ad879127SKrish Sadhukhan asm volatile("clgi\n\t"); 997ad879127SKrish Sadhukhan cycles = rdtsc() - tsc_start; 998ad879127SKrish Sadhukhan if (cycles > latclgi_max) 999ad879127SKrish Sadhukhan latclgi_max = cycles; 1000ad879127SKrish Sadhukhan if (cycles < latclgi_min) 1001ad879127SKrish Sadhukhan latclgi_min = cycles; 1002ad879127SKrish Sadhukhan clgi_sum += cycles; 1003ad879127SKrish Sadhukhan } 1004ad879127SKrish Sadhukhan 1005ad879127SKrish Sadhukhan tsc_end = rdtsc(); 1006ad879127SKrish Sadhukhan 1007ad879127SKrish Sadhukhan return true; 1008ad879127SKrish Sadhukhan } 1009ad879127SKrish Sadhukhan 1010ad879127SKrish Sadhukhan static bool lat_svm_insn_check(struct svm_test *test) 1011ad879127SKrish Sadhukhan { 1012ad879127SKrish Sadhukhan printf(" Latency VMLOAD: max: %ld min: %ld avg: %ld\n", latvmload_max, 1013ad879127SKrish Sadhukhan latvmload_min, vmload_sum / LATENCY_RUNS); 1014ad879127SKrish Sadhukhan printf(" Latency VMSAVE: max: %ld min: %ld avg: %ld\n", latvmsave_max, 1015ad879127SKrish Sadhukhan latvmsave_min, vmsave_sum / LATENCY_RUNS); 1016ad879127SKrish Sadhukhan printf(" Latency STGI: max: %ld min: %ld avg: %ld\n", latstgi_max, 1017ad879127SKrish Sadhukhan latstgi_min, stgi_sum / LATENCY_RUNS); 1018ad879127SKrish Sadhukhan printf(" Latency CLGI: max: %ld min: %ld avg: %ld\n", latclgi_max, 1019ad879127SKrish Sadhukhan latclgi_min, clgi_sum / LATENCY_RUNS); 1020ad879127SKrish Sadhukhan return true; 1021ad879127SKrish Sadhukhan } 1022ad879127SKrish Sadhukhan 1023ad879127SKrish Sadhukhan bool pending_event_ipi_fired; 1024ad879127SKrish Sadhukhan bool pending_event_guest_run; 1025ad879127SKrish Sadhukhan 1026ad879127SKrish Sadhukhan static void pending_event_ipi_isr(isr_regs_t *regs) 1027ad879127SKrish Sadhukhan { 1028ad879127SKrish Sadhukhan pending_event_ipi_fired = true; 1029ad879127SKrish Sadhukhan eoi(); 1030ad879127SKrish Sadhukhan } 1031ad879127SKrish Sadhukhan 1032ad879127SKrish Sadhukhan static void pending_event_prepare(struct svm_test *test) 1033ad879127SKrish Sadhukhan { 1034ad879127SKrish Sadhukhan int ipi_vector = 0xf1; 1035ad879127SKrish Sadhukhan 1036ad879127SKrish Sadhukhan default_prepare(test); 1037ad879127SKrish Sadhukhan 1038ad879127SKrish Sadhukhan pending_event_ipi_fired = false; 1039ad879127SKrish Sadhukhan 1040ad879127SKrish Sadhukhan handle_irq(ipi_vector, pending_event_ipi_isr); 1041ad879127SKrish Sadhukhan 1042ad879127SKrish Sadhukhan pending_event_guest_run = false; 1043ad879127SKrish Sadhukhan 1044096cf7feSPaolo Bonzini vmcb->control.intercept |= (1ULL << INTERCEPT_INTR); 1045096cf7feSPaolo Bonzini vmcb->control.int_ctl |= V_INTR_MASKING_MASK; 1046ad879127SKrish Sadhukhan 1047ad879127SKrish Sadhukhan apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | 1048ad879127SKrish Sadhukhan APIC_DM_FIXED | ipi_vector, 0); 1049ad879127SKrish Sadhukhan 1050ad879127SKrish Sadhukhan set_test_stage(test, 0); 1051ad879127SKrish Sadhukhan } 1052ad879127SKrish Sadhukhan 1053ad879127SKrish Sadhukhan static void pending_event_test(struct svm_test *test) 1054ad879127SKrish Sadhukhan { 1055ad879127SKrish Sadhukhan pending_event_guest_run = true; 1056ad879127SKrish Sadhukhan } 1057ad879127SKrish Sadhukhan 1058ad879127SKrish Sadhukhan static bool pending_event_finished(struct svm_test *test) 1059ad879127SKrish Sadhukhan { 1060ad879127SKrish Sadhukhan switch (get_test_stage(test)) { 1061ad879127SKrish Sadhukhan case 0: 1062096cf7feSPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_INTR) { 1063ad879127SKrish Sadhukhan report(false, "VMEXIT not due to pending interrupt. Exit reason 0x%x", 1064096cf7feSPaolo Bonzini vmcb->control.exit_code); 1065ad879127SKrish Sadhukhan return true; 1066ad879127SKrish Sadhukhan } 1067ad879127SKrish Sadhukhan 1068096cf7feSPaolo Bonzini vmcb->control.intercept &= ~(1ULL << INTERCEPT_INTR); 1069096cf7feSPaolo Bonzini vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK; 1070ad879127SKrish Sadhukhan 1071ad879127SKrish Sadhukhan if (pending_event_guest_run) { 1072ad879127SKrish Sadhukhan report(false, "Guest ran before host received IPI\n"); 1073ad879127SKrish Sadhukhan return true; 1074ad879127SKrish Sadhukhan } 1075ad879127SKrish Sadhukhan 1076ad879127SKrish Sadhukhan irq_enable(); 1077ad879127SKrish Sadhukhan asm volatile ("nop"); 1078ad879127SKrish Sadhukhan irq_disable(); 1079ad879127SKrish Sadhukhan 1080ad879127SKrish Sadhukhan if (!pending_event_ipi_fired) { 1081ad879127SKrish Sadhukhan report(false, "Pending interrupt not dispatched after IRQ enabled\n"); 1082ad879127SKrish Sadhukhan return true; 1083ad879127SKrish Sadhukhan } 1084ad879127SKrish Sadhukhan break; 1085ad879127SKrish Sadhukhan 1086ad879127SKrish Sadhukhan case 1: 1087ad879127SKrish Sadhukhan if (!pending_event_guest_run) { 1088ad879127SKrish Sadhukhan report(false, "Guest did not resume when no interrupt\n"); 1089ad879127SKrish Sadhukhan return true; 1090ad879127SKrish Sadhukhan } 1091ad879127SKrish Sadhukhan break; 1092ad879127SKrish Sadhukhan } 1093ad879127SKrish Sadhukhan 1094ad879127SKrish Sadhukhan inc_test_stage(test); 1095ad879127SKrish Sadhukhan 1096ad879127SKrish Sadhukhan return get_test_stage(test) == 2; 1097ad879127SKrish Sadhukhan } 1098ad879127SKrish Sadhukhan 1099ad879127SKrish Sadhukhan static bool pending_event_check(struct svm_test *test) 1100ad879127SKrish Sadhukhan { 1101ad879127SKrish Sadhukhan return get_test_stage(test) == 2; 1102ad879127SKrish Sadhukhan } 1103ad879127SKrish Sadhukhan 110485dc2aceSPaolo Bonzini static void pending_event_cli_prepare(struct svm_test *test) 1105ad879127SKrish Sadhukhan { 1106ad879127SKrish Sadhukhan default_prepare(test); 1107ad879127SKrish Sadhukhan 1108ad879127SKrish Sadhukhan pending_event_ipi_fired = false; 1109ad879127SKrish Sadhukhan 1110ad879127SKrish Sadhukhan handle_irq(0xf1, pending_event_ipi_isr); 1111ad879127SKrish Sadhukhan 1112ad879127SKrish Sadhukhan apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | 1113ad879127SKrish Sadhukhan APIC_DM_FIXED | 0xf1, 0); 1114ad879127SKrish Sadhukhan 1115ad879127SKrish Sadhukhan set_test_stage(test, 0); 1116ad879127SKrish Sadhukhan } 1117ad879127SKrish Sadhukhan 111885dc2aceSPaolo Bonzini static void pending_event_cli_prepare_gif_clear(struct svm_test *test) 1119ad879127SKrish Sadhukhan { 1120ad879127SKrish Sadhukhan asm("cli"); 1121ad879127SKrish Sadhukhan } 1122ad879127SKrish Sadhukhan 112385dc2aceSPaolo Bonzini static void pending_event_cli_test(struct svm_test *test) 1124ad879127SKrish Sadhukhan { 1125ad879127SKrish Sadhukhan if (pending_event_ipi_fired == true) { 1126ad879127SKrish Sadhukhan set_test_stage(test, -1); 1127ad879127SKrish Sadhukhan report(false, "Interrupt preceeded guest"); 1128ad879127SKrish Sadhukhan vmmcall(); 1129ad879127SKrish Sadhukhan } 1130ad879127SKrish Sadhukhan 113185dc2aceSPaolo Bonzini /* VINTR_MASKING is zero. This should cause the IPI to fire. */ 1132ad879127SKrish Sadhukhan irq_enable(); 1133ad879127SKrish Sadhukhan asm volatile ("nop"); 1134ad879127SKrish Sadhukhan irq_disable(); 1135ad879127SKrish Sadhukhan 1136ad879127SKrish Sadhukhan if (pending_event_ipi_fired != true) { 1137ad879127SKrish Sadhukhan set_test_stage(test, -1); 1138ad879127SKrish Sadhukhan report(false, "Interrupt not triggered by guest"); 1139ad879127SKrish Sadhukhan } 1140ad879127SKrish Sadhukhan 1141ad879127SKrish Sadhukhan vmmcall(); 1142ad879127SKrish Sadhukhan 114385dc2aceSPaolo Bonzini /* 114485dc2aceSPaolo Bonzini * Now VINTR_MASKING=1, but no interrupt is pending so 114585dc2aceSPaolo Bonzini * the VINTR interception should be clear in VMCB02. Check 114685dc2aceSPaolo Bonzini * that L0 did not leave a stale VINTR in the VMCB. 114785dc2aceSPaolo Bonzini */ 1148ad879127SKrish Sadhukhan irq_enable(); 1149ad879127SKrish Sadhukhan asm volatile ("nop"); 1150ad879127SKrish Sadhukhan irq_disable(); 1151ad879127SKrish Sadhukhan } 1152ad879127SKrish Sadhukhan 115385dc2aceSPaolo Bonzini static bool pending_event_cli_finished(struct svm_test *test) 1154ad879127SKrish Sadhukhan { 1155096cf7feSPaolo Bonzini if ( vmcb->control.exit_code != SVM_EXIT_VMMCALL) { 1156ad879127SKrish Sadhukhan report(false, "VM_EXIT return to host is not EXIT_VMMCALL exit reason 0x%x", 1157096cf7feSPaolo Bonzini vmcb->control.exit_code); 1158ad879127SKrish Sadhukhan return true; 1159ad879127SKrish Sadhukhan } 1160ad879127SKrish Sadhukhan 1161ad879127SKrish Sadhukhan switch (get_test_stage(test)) { 1162ad879127SKrish Sadhukhan case 0: 1163096cf7feSPaolo Bonzini vmcb->save.rip += 3; 1164ad879127SKrish Sadhukhan 1165ad879127SKrish Sadhukhan pending_event_ipi_fired = false; 1166ad879127SKrish Sadhukhan 1167096cf7feSPaolo Bonzini vmcb->control.int_ctl |= V_INTR_MASKING_MASK; 1168ad879127SKrish Sadhukhan 116985dc2aceSPaolo Bonzini /* Now entering again with VINTR_MASKING=1. */ 1170ad879127SKrish Sadhukhan apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | 1171ad879127SKrish Sadhukhan APIC_DM_FIXED | 0xf1, 0); 1172ad879127SKrish Sadhukhan 1173ad879127SKrish Sadhukhan break; 1174ad879127SKrish Sadhukhan 1175ad879127SKrish Sadhukhan case 1: 1176ad879127SKrish Sadhukhan if (pending_event_ipi_fired == true) { 1177ad879127SKrish Sadhukhan report(false, "Interrupt triggered by guest"); 1178ad879127SKrish Sadhukhan return true; 1179ad879127SKrish Sadhukhan } 1180ad879127SKrish Sadhukhan 1181ad879127SKrish Sadhukhan irq_enable(); 1182ad879127SKrish Sadhukhan asm volatile ("nop"); 1183ad879127SKrish Sadhukhan irq_disable(); 1184ad879127SKrish Sadhukhan 1185ad879127SKrish Sadhukhan if (pending_event_ipi_fired != true) { 1186ad879127SKrish Sadhukhan report(false, "Interrupt not triggered by host"); 1187ad879127SKrish Sadhukhan return true; 1188ad879127SKrish Sadhukhan } 1189ad879127SKrish Sadhukhan 1190ad879127SKrish Sadhukhan break; 1191ad879127SKrish Sadhukhan 1192ad879127SKrish Sadhukhan default: 1193ad879127SKrish Sadhukhan return true; 1194ad879127SKrish Sadhukhan } 1195ad879127SKrish Sadhukhan 1196ad879127SKrish Sadhukhan inc_test_stage(test); 1197ad879127SKrish Sadhukhan 1198ad879127SKrish Sadhukhan return get_test_stage(test) == 2; 1199ad879127SKrish Sadhukhan } 1200ad879127SKrish Sadhukhan 120185dc2aceSPaolo Bonzini static bool pending_event_cli_check(struct svm_test *test) 1202ad879127SKrish Sadhukhan { 1203ad879127SKrish Sadhukhan return get_test_stage(test) == 2; 1204ad879127SKrish Sadhukhan } 1205ad879127SKrish Sadhukhan 120685dc2aceSPaolo Bonzini #define TIMER_VECTOR 222 120785dc2aceSPaolo Bonzini 120885dc2aceSPaolo Bonzini static volatile bool timer_fired; 120985dc2aceSPaolo Bonzini 121085dc2aceSPaolo Bonzini static void timer_isr(isr_regs_t *regs) 121185dc2aceSPaolo Bonzini { 121285dc2aceSPaolo Bonzini timer_fired = true; 121385dc2aceSPaolo Bonzini apic_write(APIC_EOI, 0); 121485dc2aceSPaolo Bonzini } 121585dc2aceSPaolo Bonzini 121685dc2aceSPaolo Bonzini static void interrupt_prepare(struct svm_test *test) 121785dc2aceSPaolo Bonzini { 121885dc2aceSPaolo Bonzini default_prepare(test); 121985dc2aceSPaolo Bonzini handle_irq(TIMER_VECTOR, timer_isr); 122085dc2aceSPaolo Bonzini timer_fired = false; 122185dc2aceSPaolo Bonzini set_test_stage(test, 0); 122285dc2aceSPaolo Bonzini } 122385dc2aceSPaolo Bonzini 122485dc2aceSPaolo Bonzini static void interrupt_test(struct svm_test *test) 122585dc2aceSPaolo Bonzini { 122685dc2aceSPaolo Bonzini long long start, loops; 122785dc2aceSPaolo Bonzini 122885dc2aceSPaolo Bonzini apic_write(APIC_LVTT, TIMER_VECTOR); 122985dc2aceSPaolo Bonzini irq_enable(); 123085dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 1); //Timer Initial Count Register 0x380 one-shot 123185dc2aceSPaolo Bonzini for (loops = 0; loops < 10000000 && !timer_fired; loops++) 123285dc2aceSPaolo Bonzini asm volatile ("nop"); 123385dc2aceSPaolo Bonzini 123485dc2aceSPaolo Bonzini report(timer_fired, "direct interrupt while running guest"); 123585dc2aceSPaolo Bonzini 123685dc2aceSPaolo Bonzini if (!timer_fired) { 123785dc2aceSPaolo Bonzini set_test_stage(test, -1); 123885dc2aceSPaolo Bonzini vmmcall(); 123985dc2aceSPaolo Bonzini } 124085dc2aceSPaolo Bonzini 124185dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 0); 124285dc2aceSPaolo Bonzini irq_disable(); 124385dc2aceSPaolo Bonzini vmmcall(); 124485dc2aceSPaolo Bonzini 124585dc2aceSPaolo Bonzini timer_fired = false; 124685dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 1); 124785dc2aceSPaolo Bonzini for (loops = 0; loops < 10000000 && !timer_fired; loops++) 124885dc2aceSPaolo Bonzini asm volatile ("nop"); 124985dc2aceSPaolo Bonzini 125085dc2aceSPaolo Bonzini report(timer_fired, "intercepted interrupt while running guest"); 125185dc2aceSPaolo Bonzini 125285dc2aceSPaolo Bonzini if (!timer_fired) { 125385dc2aceSPaolo Bonzini set_test_stage(test, -1); 125485dc2aceSPaolo Bonzini vmmcall(); 125585dc2aceSPaolo Bonzini } 125685dc2aceSPaolo Bonzini 125785dc2aceSPaolo Bonzini irq_enable(); 125885dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 0); 125985dc2aceSPaolo Bonzini irq_disable(); 126085dc2aceSPaolo Bonzini 126185dc2aceSPaolo Bonzini timer_fired = false; 126285dc2aceSPaolo Bonzini start = rdtsc(); 126385dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 1000000); 126485dc2aceSPaolo Bonzini asm volatile ("sti; hlt"); 126585dc2aceSPaolo Bonzini 126685dc2aceSPaolo Bonzini report(rdtsc() - start > 10000 && timer_fired, 126785dc2aceSPaolo Bonzini "direct interrupt + hlt"); 126885dc2aceSPaolo Bonzini 126985dc2aceSPaolo Bonzini if (!timer_fired) { 127085dc2aceSPaolo Bonzini set_test_stage(test, -1); 127185dc2aceSPaolo Bonzini vmmcall(); 127285dc2aceSPaolo Bonzini } 127385dc2aceSPaolo Bonzini 127485dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 0); 127585dc2aceSPaolo Bonzini irq_disable(); 127685dc2aceSPaolo Bonzini vmmcall(); 127785dc2aceSPaolo Bonzini 127885dc2aceSPaolo Bonzini timer_fired = false; 127985dc2aceSPaolo Bonzini start = rdtsc(); 128085dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 1000000); 128185dc2aceSPaolo Bonzini asm volatile ("hlt"); 128285dc2aceSPaolo Bonzini 128385dc2aceSPaolo Bonzini report(rdtsc() - start > 10000 && timer_fired, 128485dc2aceSPaolo Bonzini "intercepted interrupt + hlt"); 128585dc2aceSPaolo Bonzini 128685dc2aceSPaolo Bonzini if (!timer_fired) { 128785dc2aceSPaolo Bonzini set_test_stage(test, -1); 128885dc2aceSPaolo Bonzini vmmcall(); 128985dc2aceSPaolo Bonzini } 129085dc2aceSPaolo Bonzini 129185dc2aceSPaolo Bonzini apic_write(APIC_TMICT, 0); 129285dc2aceSPaolo Bonzini irq_disable(); 129385dc2aceSPaolo Bonzini } 129485dc2aceSPaolo Bonzini 129585dc2aceSPaolo Bonzini static bool interrupt_finished(struct svm_test *test) 129685dc2aceSPaolo Bonzini { 129785dc2aceSPaolo Bonzini switch (get_test_stage(test)) { 129885dc2aceSPaolo Bonzini case 0: 129985dc2aceSPaolo Bonzini case 2: 1300096cf7feSPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_VMMCALL) { 130185dc2aceSPaolo Bonzini report(false, "VMEXIT not due to vmmcall. Exit reason 0x%x", 1302096cf7feSPaolo Bonzini vmcb->control.exit_code); 130385dc2aceSPaolo Bonzini return true; 130485dc2aceSPaolo Bonzini } 1305096cf7feSPaolo Bonzini vmcb->save.rip += 3; 130685dc2aceSPaolo Bonzini 1307096cf7feSPaolo Bonzini vmcb->control.intercept |= (1ULL << INTERCEPT_INTR); 1308096cf7feSPaolo Bonzini vmcb->control.int_ctl |= V_INTR_MASKING_MASK; 130985dc2aceSPaolo Bonzini break; 131085dc2aceSPaolo Bonzini 131185dc2aceSPaolo Bonzini case 1: 131285dc2aceSPaolo Bonzini case 3: 1313096cf7feSPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_INTR) { 131485dc2aceSPaolo Bonzini report(false, "VMEXIT not due to intr intercept. Exit reason 0x%x", 1315096cf7feSPaolo Bonzini vmcb->control.exit_code); 131685dc2aceSPaolo Bonzini return true; 131785dc2aceSPaolo Bonzini } 131885dc2aceSPaolo Bonzini 131985dc2aceSPaolo Bonzini irq_enable(); 132085dc2aceSPaolo Bonzini asm volatile ("nop"); 132185dc2aceSPaolo Bonzini irq_disable(); 132285dc2aceSPaolo Bonzini 1323096cf7feSPaolo Bonzini vmcb->control.intercept &= ~(1ULL << INTERCEPT_INTR); 1324096cf7feSPaolo Bonzini vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK; 132585dc2aceSPaolo Bonzini break; 132685dc2aceSPaolo Bonzini 132785dc2aceSPaolo Bonzini case 4: 132885dc2aceSPaolo Bonzini break; 132985dc2aceSPaolo Bonzini 133085dc2aceSPaolo Bonzini default: 133185dc2aceSPaolo Bonzini return true; 133285dc2aceSPaolo Bonzini } 133385dc2aceSPaolo Bonzini 133485dc2aceSPaolo Bonzini inc_test_stage(test); 133585dc2aceSPaolo Bonzini 133685dc2aceSPaolo Bonzini return get_test_stage(test) == 5; 133785dc2aceSPaolo Bonzini } 133885dc2aceSPaolo Bonzini 133985dc2aceSPaolo Bonzini static bool interrupt_check(struct svm_test *test) 134085dc2aceSPaolo Bonzini { 134185dc2aceSPaolo Bonzini return get_test_stage(test) == 5; 134285dc2aceSPaolo Bonzini } 134385dc2aceSPaolo Bonzini 1344d4db486bSCathy Avery static volatile bool nmi_fired; 1345d4db486bSCathy Avery 1346d4db486bSCathy Avery static void nmi_handler(isr_regs_t *regs) 1347d4db486bSCathy Avery { 1348d4db486bSCathy Avery nmi_fired = true; 1349d4db486bSCathy Avery apic_write(APIC_EOI, 0); 1350d4db486bSCathy Avery } 1351d4db486bSCathy Avery 1352d4db486bSCathy Avery static void nmi_prepare(struct svm_test *test) 1353d4db486bSCathy Avery { 1354d4db486bSCathy Avery default_prepare(test); 1355d4db486bSCathy Avery nmi_fired = false; 1356d4db486bSCathy Avery handle_irq(NMI_VECTOR, nmi_handler); 1357d4db486bSCathy Avery set_test_stage(test, 0); 1358d4db486bSCathy Avery } 1359d4db486bSCathy Avery 1360d4db486bSCathy Avery static void nmi_test(struct svm_test *test) 1361d4db486bSCathy Avery { 1362d4db486bSCathy Avery apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_NMI | APIC_INT_ASSERT, 0); 1363d4db486bSCathy Avery 1364d4db486bSCathy Avery report(nmi_fired, "direct NMI while running guest"); 1365d4db486bSCathy Avery 1366d4db486bSCathy Avery if (!nmi_fired) 1367d4db486bSCathy Avery set_test_stage(test, -1); 1368d4db486bSCathy Avery 1369d4db486bSCathy Avery vmmcall(); 1370d4db486bSCathy Avery 1371d4db486bSCathy Avery nmi_fired = false; 1372d4db486bSCathy Avery 1373d4db486bSCathy Avery apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_NMI | APIC_INT_ASSERT, 0); 1374d4db486bSCathy Avery 1375d4db486bSCathy Avery if (!nmi_fired) { 1376d4db486bSCathy Avery report(nmi_fired, "intercepted pending NMI not dispatched"); 1377d4db486bSCathy Avery set_test_stage(test, -1); 1378d4db486bSCathy Avery } 1379d4db486bSCathy Avery 1380d4db486bSCathy Avery } 1381d4db486bSCathy Avery 1382d4db486bSCathy Avery static bool nmi_finished(struct svm_test *test) 1383d4db486bSCathy Avery { 1384d4db486bSCathy Avery switch (get_test_stage(test)) { 1385d4db486bSCathy Avery case 0: 1386d4db486bSCathy Avery if (vmcb->control.exit_code != SVM_EXIT_VMMCALL) { 1387d4db486bSCathy Avery report(false, "VMEXIT not due to vmmcall. Exit reason 0x%x", 1388d4db486bSCathy Avery vmcb->control.exit_code); 1389d4db486bSCathy Avery return true; 1390d4db486bSCathy Avery } 1391d4db486bSCathy Avery vmcb->save.rip += 3; 1392d4db486bSCathy Avery 1393d4db486bSCathy Avery vmcb->control.intercept |= (1ULL << INTERCEPT_NMI); 1394d4db486bSCathy Avery break; 1395d4db486bSCathy Avery 1396d4db486bSCathy Avery case 1: 1397d4db486bSCathy Avery if (vmcb->control.exit_code != SVM_EXIT_NMI) { 1398d4db486bSCathy Avery report(false, "VMEXIT not due to NMI intercept. Exit reason 0x%x", 1399d4db486bSCathy Avery vmcb->control.exit_code); 1400d4db486bSCathy Avery return true; 1401d4db486bSCathy Avery } 1402d4db486bSCathy Avery 1403d4db486bSCathy Avery report(true, "NMI intercept while running guest"); 1404d4db486bSCathy Avery break; 1405d4db486bSCathy Avery 1406d4db486bSCathy Avery case 2: 1407d4db486bSCathy Avery break; 1408d4db486bSCathy Avery 1409d4db486bSCathy Avery default: 1410d4db486bSCathy Avery return true; 1411d4db486bSCathy Avery } 1412d4db486bSCathy Avery 1413d4db486bSCathy Avery inc_test_stage(test); 1414d4db486bSCathy Avery 1415d4db486bSCathy Avery return get_test_stage(test) == 3; 1416d4db486bSCathy Avery } 1417d4db486bSCathy Avery 1418d4db486bSCathy Avery static bool nmi_check(struct svm_test *test) 1419d4db486bSCathy Avery { 1420d4db486bSCathy Avery return get_test_stage(test) == 3; 1421d4db486bSCathy Avery } 1422d4db486bSCathy Avery 14239da1f4d8SCathy Avery #define NMI_DELAY 100000000ULL 14249da1f4d8SCathy Avery 14259da1f4d8SCathy Avery static void nmi_message_thread(void *_test) 14269da1f4d8SCathy Avery { 14279da1f4d8SCathy Avery struct svm_test *test = _test; 14289da1f4d8SCathy Avery 14299da1f4d8SCathy Avery while (get_test_stage(test) != 1) 14309da1f4d8SCathy Avery pause(); 14319da1f4d8SCathy Avery 14329da1f4d8SCathy Avery delay(NMI_DELAY); 14339da1f4d8SCathy Avery 14349da1f4d8SCathy Avery apic_icr_write(APIC_DEST_PHYSICAL | APIC_DM_NMI | APIC_INT_ASSERT, id_map[0]); 14359da1f4d8SCathy Avery 14369da1f4d8SCathy Avery while (get_test_stage(test) != 2) 14379da1f4d8SCathy Avery pause(); 14389da1f4d8SCathy Avery 14399da1f4d8SCathy Avery delay(NMI_DELAY); 14409da1f4d8SCathy Avery 14419da1f4d8SCathy Avery apic_icr_write(APIC_DEST_PHYSICAL | APIC_DM_NMI | APIC_INT_ASSERT, id_map[0]); 14429da1f4d8SCathy Avery } 14439da1f4d8SCathy Avery 14449da1f4d8SCathy Avery static void nmi_hlt_test(struct svm_test *test) 14459da1f4d8SCathy Avery { 14469da1f4d8SCathy Avery long long start; 14479da1f4d8SCathy Avery 14489da1f4d8SCathy Avery on_cpu_async(1, nmi_message_thread, test); 14499da1f4d8SCathy Avery 14509da1f4d8SCathy Avery start = rdtsc(); 14519da1f4d8SCathy Avery 14529da1f4d8SCathy Avery set_test_stage(test, 1); 14539da1f4d8SCathy Avery 14549da1f4d8SCathy Avery asm volatile ("hlt"); 14559da1f4d8SCathy Avery 14569da1f4d8SCathy Avery report((rdtsc() - start > NMI_DELAY) && nmi_fired, 14579da1f4d8SCathy Avery "direct NMI + hlt"); 14589da1f4d8SCathy Avery 14599da1f4d8SCathy Avery if (!nmi_fired) 14609da1f4d8SCathy Avery set_test_stage(test, -1); 14619da1f4d8SCathy Avery 14629da1f4d8SCathy Avery nmi_fired = false; 14639da1f4d8SCathy Avery 14649da1f4d8SCathy Avery vmmcall(); 14659da1f4d8SCathy Avery 14669da1f4d8SCathy Avery start = rdtsc(); 14679da1f4d8SCathy Avery 14689da1f4d8SCathy Avery set_test_stage(test, 2); 14699da1f4d8SCathy Avery 14709da1f4d8SCathy Avery asm volatile ("hlt"); 14719da1f4d8SCathy Avery 14729da1f4d8SCathy Avery report((rdtsc() - start > NMI_DELAY) && nmi_fired, 14739da1f4d8SCathy Avery "intercepted NMI + hlt"); 14749da1f4d8SCathy Avery 14759da1f4d8SCathy Avery if (!nmi_fired) { 14769da1f4d8SCathy Avery report(nmi_fired, "intercepted pending NMI not dispatched"); 14779da1f4d8SCathy Avery set_test_stage(test, -1); 14789da1f4d8SCathy Avery } 14799da1f4d8SCathy Avery 14809da1f4d8SCathy Avery set_test_stage(test, 3); 14819da1f4d8SCathy Avery } 14829da1f4d8SCathy Avery 14839da1f4d8SCathy Avery static bool nmi_hlt_finished(struct svm_test *test) 14849da1f4d8SCathy Avery { 14859da1f4d8SCathy Avery switch (get_test_stage(test)) { 14869da1f4d8SCathy Avery case 1: 14879da1f4d8SCathy Avery if (vmcb->control.exit_code != SVM_EXIT_VMMCALL) { 14889da1f4d8SCathy Avery report(false, "VMEXIT not due to vmmcall. Exit reason 0x%x", 14899da1f4d8SCathy Avery vmcb->control.exit_code); 14909da1f4d8SCathy Avery return true; 14919da1f4d8SCathy Avery } 14929da1f4d8SCathy Avery vmcb->save.rip += 3; 14939da1f4d8SCathy Avery 14949da1f4d8SCathy Avery vmcb->control.intercept |= (1ULL << INTERCEPT_NMI); 14959da1f4d8SCathy Avery break; 14969da1f4d8SCathy Avery 14979da1f4d8SCathy Avery case 2: 14989da1f4d8SCathy Avery if (vmcb->control.exit_code != SVM_EXIT_NMI) { 14999da1f4d8SCathy Avery report(false, "VMEXIT not due to NMI intercept. Exit reason 0x%x", 15009da1f4d8SCathy Avery vmcb->control.exit_code); 15019da1f4d8SCathy Avery return true; 15029da1f4d8SCathy Avery } 15039da1f4d8SCathy Avery 15049da1f4d8SCathy Avery report(true, "NMI intercept while running guest"); 15059da1f4d8SCathy Avery break; 15069da1f4d8SCathy Avery 15079da1f4d8SCathy Avery case 3: 15089da1f4d8SCathy Avery break; 15099da1f4d8SCathy Avery 15109da1f4d8SCathy Avery default: 15119da1f4d8SCathy Avery return true; 15129da1f4d8SCathy Avery } 15139da1f4d8SCathy Avery 15149da1f4d8SCathy Avery return get_test_stage(test) == 3; 15159da1f4d8SCathy Avery } 15169da1f4d8SCathy Avery 15179da1f4d8SCathy Avery static bool nmi_hlt_check(struct svm_test *test) 15189da1f4d8SCathy Avery { 15199da1f4d8SCathy Avery return get_test_stage(test) == 3; 15209da1f4d8SCathy Avery } 15219da1f4d8SCathy Avery 15224b4fb247SPaolo Bonzini static volatile int count_exc = 0; 15234b4fb247SPaolo Bonzini 15244b4fb247SPaolo Bonzini static void my_isr(struct ex_regs *r) 15254b4fb247SPaolo Bonzini { 15264b4fb247SPaolo Bonzini count_exc++; 15274b4fb247SPaolo Bonzini } 15284b4fb247SPaolo Bonzini 15294b4fb247SPaolo Bonzini static void exc_inject_prepare(struct svm_test *test) 15304b4fb247SPaolo Bonzini { 1531*8634a266SPaolo Bonzini default_prepare(test); 15324b4fb247SPaolo Bonzini handle_exception(DE_VECTOR, my_isr); 15334b4fb247SPaolo Bonzini handle_exception(NMI_VECTOR, my_isr); 15344b4fb247SPaolo Bonzini } 15354b4fb247SPaolo Bonzini 15364b4fb247SPaolo Bonzini 15374b4fb247SPaolo Bonzini static void exc_inject_test(struct svm_test *test) 15384b4fb247SPaolo Bonzini { 15394b4fb247SPaolo Bonzini asm volatile ("vmmcall\n\tvmmcall\n\t"); 15404b4fb247SPaolo Bonzini } 15414b4fb247SPaolo Bonzini 15424b4fb247SPaolo Bonzini static bool exc_inject_finished(struct svm_test *test) 15434b4fb247SPaolo Bonzini { 15444b4fb247SPaolo Bonzini vmcb->save.rip += 3; 15454b4fb247SPaolo Bonzini 15464b4fb247SPaolo Bonzini switch (get_test_stage(test)) { 15474b4fb247SPaolo Bonzini case 0: 15484b4fb247SPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_VMMCALL) { 15494b4fb247SPaolo Bonzini report(false, "VMEXIT not due to vmmcall. Exit reason 0x%x", 15504b4fb247SPaolo Bonzini vmcb->control.exit_code); 15514b4fb247SPaolo Bonzini return true; 15524b4fb247SPaolo Bonzini } 15534b4fb247SPaolo Bonzini vmcb->control.event_inj = NMI_VECTOR | SVM_EVTINJ_TYPE_EXEPT | SVM_EVTINJ_VALID; 15544b4fb247SPaolo Bonzini break; 15554b4fb247SPaolo Bonzini 15564b4fb247SPaolo Bonzini case 1: 15574b4fb247SPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_ERR) { 15584b4fb247SPaolo Bonzini report(false, "VMEXIT not due to error. Exit reason 0x%x", 15594b4fb247SPaolo Bonzini vmcb->control.exit_code); 15604b4fb247SPaolo Bonzini return true; 15614b4fb247SPaolo Bonzini } 15624b4fb247SPaolo Bonzini report(count_exc == 0, "exception with vector 2 not injected"); 15634b4fb247SPaolo Bonzini vmcb->control.event_inj = DE_VECTOR | SVM_EVTINJ_TYPE_EXEPT | SVM_EVTINJ_VALID; 15644b4fb247SPaolo Bonzini break; 15654b4fb247SPaolo Bonzini 15664b4fb247SPaolo Bonzini case 2: 15674b4fb247SPaolo Bonzini if (vmcb->control.exit_code != SVM_EXIT_VMMCALL) { 15684b4fb247SPaolo Bonzini report(false, "VMEXIT not due to vmmcall. Exit reason 0x%x", 15694b4fb247SPaolo Bonzini vmcb->control.exit_code); 15704b4fb247SPaolo Bonzini return true; 15714b4fb247SPaolo Bonzini } 15724b4fb247SPaolo Bonzini report(count_exc == 1, "divide overflow exception injected"); 15734b4fb247SPaolo Bonzini report(!(vmcb->control.event_inj & SVM_EVTINJ_VALID), "eventinj.VALID cleared"); 15744b4fb247SPaolo Bonzini break; 15754b4fb247SPaolo Bonzini 15764b4fb247SPaolo Bonzini default: 15774b4fb247SPaolo Bonzini return true; 15784b4fb247SPaolo Bonzini } 15794b4fb247SPaolo Bonzini 15804b4fb247SPaolo Bonzini inc_test_stage(test); 15814b4fb247SPaolo Bonzini 15824b4fb247SPaolo Bonzini return get_test_stage(test) == 3; 15834b4fb247SPaolo Bonzini } 15844b4fb247SPaolo Bonzini 15854b4fb247SPaolo Bonzini static bool exc_inject_check(struct svm_test *test) 15864b4fb247SPaolo Bonzini { 15874b4fb247SPaolo Bonzini return count_exc == 1 && get_test_stage(test) == 3; 15884b4fb247SPaolo Bonzini } 15894b4fb247SPaolo Bonzini 15908660d1b5SKrish Sadhukhan #define TEST(name) { #name, .v2 = name } 15918660d1b5SKrish Sadhukhan 1592ba29942cSKrish Sadhukhan /* 1593ba29942cSKrish Sadhukhan * v2 tests 1594ba29942cSKrish Sadhukhan */ 1595ba29942cSKrish Sadhukhan 1596ba29942cSKrish Sadhukhan static void basic_guest_main(struct svm_test *test) 1597ba29942cSKrish Sadhukhan { 1598ba29942cSKrish Sadhukhan } 1599ba29942cSKrish Sadhukhan 1600ba29942cSKrish Sadhukhan static void svm_guest_state_test(void) 1601ba29942cSKrish Sadhukhan { 1602e8d7a8f6SKrish Sadhukhan test_set_guest(basic_guest_main); 1603e8d7a8f6SKrish Sadhukhan 1604e8d7a8f6SKrish Sadhukhan /* 1605e8d7a8f6SKrish Sadhukhan * Un-setting EFER.SVME is illegal 1606e8d7a8f6SKrish Sadhukhan */ 1607ba29942cSKrish Sadhukhan u64 efer_saved = vmcb->save.efer; 1608ba29942cSKrish Sadhukhan u64 efer = efer_saved; 1609ba29942cSKrish Sadhukhan 1610ba29942cSKrish Sadhukhan report (svm_vmrun() == SVM_EXIT_VMMCALL, "EFER.SVME: %lx", efer); 1611ba29942cSKrish Sadhukhan efer &= ~EFER_SVME; 1612ba29942cSKrish Sadhukhan vmcb->save.efer = efer; 1613ba29942cSKrish Sadhukhan report (svm_vmrun() == SVM_EXIT_ERR, "EFER.SVME: %lx", efer); 1614ba29942cSKrish Sadhukhan vmcb->save.efer = efer_saved; 1615e8d7a8f6SKrish Sadhukhan 1616e8d7a8f6SKrish Sadhukhan /* 1617e8d7a8f6SKrish Sadhukhan * Un-setting CR0.CD and setting CR0.NW is illegal combination 1618e8d7a8f6SKrish Sadhukhan */ 1619e8d7a8f6SKrish Sadhukhan u64 cr0_saved = vmcb->save.cr0; 1620e8d7a8f6SKrish Sadhukhan u64 cr0 = cr0_saved; 1621e8d7a8f6SKrish Sadhukhan 1622e8d7a8f6SKrish Sadhukhan cr0 |= X86_CR0_CD; 1623e8d7a8f6SKrish Sadhukhan cr0 &= ~X86_CR0_NW; 1624e8d7a8f6SKrish Sadhukhan vmcb->save.cr0 = cr0; 1625e8d7a8f6SKrish Sadhukhan report (svm_vmrun() == SVM_EXIT_VMMCALL, "CR0: %lx", cr0); 1626e8d7a8f6SKrish Sadhukhan cr0 |= X86_CR0_NW; 1627e8d7a8f6SKrish Sadhukhan vmcb->save.cr0 = cr0; 1628e8d7a8f6SKrish Sadhukhan report (svm_vmrun() == SVM_EXIT_VMMCALL, "CR0: %lx", cr0); 1629e8d7a8f6SKrish Sadhukhan cr0 &= ~X86_CR0_NW; 1630e8d7a8f6SKrish Sadhukhan cr0 &= ~X86_CR0_CD; 1631e8d7a8f6SKrish Sadhukhan vmcb->save.cr0 = cr0; 1632e8d7a8f6SKrish Sadhukhan report (svm_vmrun() == SVM_EXIT_VMMCALL, "CR0: %lx", cr0); 1633e8d7a8f6SKrish Sadhukhan cr0 |= X86_CR0_NW; 1634e8d7a8f6SKrish Sadhukhan vmcb->save.cr0 = cr0; 1635e8d7a8f6SKrish Sadhukhan report (svm_vmrun() == SVM_EXIT_ERR, "CR0: %lx", cr0); 1636e8d7a8f6SKrish Sadhukhan vmcb->save.cr0 = cr0_saved; 16375c052c90SKrish Sadhukhan 16385c052c90SKrish Sadhukhan /* 16395c052c90SKrish Sadhukhan * CR0[63:32] are not zero 16405c052c90SKrish Sadhukhan */ 16415c052c90SKrish Sadhukhan int i; 16425c052c90SKrish Sadhukhan 16435c052c90SKrish Sadhukhan cr0 = cr0_saved; 16445c052c90SKrish Sadhukhan for (i = 32; i < 63; i = i + 4) { 16455c052c90SKrish Sadhukhan cr0 = cr0_saved | (1ull << i); 16465c052c90SKrish Sadhukhan vmcb->save.cr0 = cr0; 16475c052c90SKrish Sadhukhan report (svm_vmrun() == SVM_EXIT_ERR, "CR0[63:32]: %lx", 16485c052c90SKrish Sadhukhan cr0 >> 32); 16495c052c90SKrish Sadhukhan } 16505c052c90SKrish Sadhukhan vmcb->save.cr0 = cr0_saved; 1651ba29942cSKrish Sadhukhan } 1652ba29942cSKrish Sadhukhan 1653ad879127SKrish Sadhukhan struct svm_test svm_tests[] = { 1654ad879127SKrish Sadhukhan { "null", default_supported, default_prepare, 1655ad879127SKrish Sadhukhan default_prepare_gif_clear, null_test, 1656ad879127SKrish Sadhukhan default_finished, null_check }, 1657ad879127SKrish Sadhukhan { "vmrun", default_supported, default_prepare, 1658ad879127SKrish Sadhukhan default_prepare_gif_clear, test_vmrun, 1659ad879127SKrish Sadhukhan default_finished, check_vmrun }, 1660ad879127SKrish Sadhukhan { "ioio", default_supported, prepare_ioio, 1661ad879127SKrish Sadhukhan default_prepare_gif_clear, test_ioio, 1662ad879127SKrish Sadhukhan ioio_finished, check_ioio }, 1663ad879127SKrish Sadhukhan { "vmrun intercept check", default_supported, prepare_no_vmrun_int, 1664ad879127SKrish Sadhukhan default_prepare_gif_clear, null_test, default_finished, 1665ad879127SKrish Sadhukhan check_no_vmrun_int }, 1666ad879127SKrish Sadhukhan { "cr3 read intercept", default_supported, 1667ad879127SKrish Sadhukhan prepare_cr3_intercept, default_prepare_gif_clear, 1668ad879127SKrish Sadhukhan test_cr3_intercept, default_finished, check_cr3_intercept }, 1669ad879127SKrish Sadhukhan { "cr3 read nointercept", default_supported, default_prepare, 1670ad879127SKrish Sadhukhan default_prepare_gif_clear, test_cr3_intercept, default_finished, 1671ad879127SKrish Sadhukhan check_cr3_nointercept }, 1672ad879127SKrish Sadhukhan { "cr3 read intercept emulate", smp_supported, 1673ad879127SKrish Sadhukhan prepare_cr3_intercept_bypass, default_prepare_gif_clear, 1674ad879127SKrish Sadhukhan test_cr3_intercept_bypass, default_finished, check_cr3_intercept }, 1675ad879127SKrish Sadhukhan { "dr intercept check", default_supported, prepare_dr_intercept, 1676ad879127SKrish Sadhukhan default_prepare_gif_clear, test_dr_intercept, dr_intercept_finished, 1677ad879127SKrish Sadhukhan check_dr_intercept }, 1678ad879127SKrish Sadhukhan { "next_rip", next_rip_supported, prepare_next_rip, 1679ad879127SKrish Sadhukhan default_prepare_gif_clear, test_next_rip, 1680ad879127SKrish Sadhukhan default_finished, check_next_rip }, 1681ad879127SKrish Sadhukhan { "msr intercept check", default_supported, prepare_msr_intercept, 1682ad879127SKrish Sadhukhan default_prepare_gif_clear, test_msr_intercept, 1683ad879127SKrish Sadhukhan msr_intercept_finished, check_msr_intercept }, 1684ad879127SKrish Sadhukhan { "mode_switch", default_supported, prepare_mode_switch, 1685ad879127SKrish Sadhukhan default_prepare_gif_clear, test_mode_switch, 1686ad879127SKrish Sadhukhan mode_switch_finished, check_mode_switch }, 1687ad879127SKrish Sadhukhan { "asid_zero", default_supported, prepare_asid_zero, 1688ad879127SKrish Sadhukhan default_prepare_gif_clear, test_asid_zero, 1689ad879127SKrish Sadhukhan default_finished, check_asid_zero }, 1690ad879127SKrish Sadhukhan { "sel_cr0_bug", default_supported, sel_cr0_bug_prepare, 1691ad879127SKrish Sadhukhan default_prepare_gif_clear, sel_cr0_bug_test, 1692ad879127SKrish Sadhukhan sel_cr0_bug_finished, sel_cr0_bug_check }, 1693ad879127SKrish Sadhukhan { "npt_nx", npt_supported, npt_nx_prepare, 1694ad879127SKrish Sadhukhan default_prepare_gif_clear, null_test, 1695ad879127SKrish Sadhukhan default_finished, npt_nx_check }, 1696ad879127SKrish Sadhukhan { "npt_us", npt_supported, npt_us_prepare, 1697ad879127SKrish Sadhukhan default_prepare_gif_clear, npt_us_test, 1698ad879127SKrish Sadhukhan default_finished, npt_us_check }, 1699ad879127SKrish Sadhukhan { "npt_rsvd", npt_supported, npt_rsvd_prepare, 1700ad879127SKrish Sadhukhan default_prepare_gif_clear, null_test, 1701ad879127SKrish Sadhukhan default_finished, npt_rsvd_check }, 1702ad879127SKrish Sadhukhan { "npt_rw", npt_supported, npt_rw_prepare, 1703ad879127SKrish Sadhukhan default_prepare_gif_clear, npt_rw_test, 1704ad879127SKrish Sadhukhan default_finished, npt_rw_check }, 1705ad879127SKrish Sadhukhan { "npt_rsvd_pfwalk", npt_supported, npt_rsvd_pfwalk_prepare, 1706ad879127SKrish Sadhukhan default_prepare_gif_clear, null_test, 1707ad879127SKrish Sadhukhan default_finished, npt_rsvd_pfwalk_check }, 1708ad879127SKrish Sadhukhan { "npt_rw_pfwalk", npt_supported, npt_rw_pfwalk_prepare, 1709ad879127SKrish Sadhukhan default_prepare_gif_clear, null_test, 1710ad879127SKrish Sadhukhan default_finished, npt_rw_pfwalk_check }, 1711ad879127SKrish Sadhukhan { "npt_l1mmio", npt_supported, npt_l1mmio_prepare, 1712ad879127SKrish Sadhukhan default_prepare_gif_clear, npt_l1mmio_test, 1713ad879127SKrish Sadhukhan default_finished, npt_l1mmio_check }, 1714ad879127SKrish Sadhukhan { "npt_rw_l1mmio", npt_supported, npt_rw_l1mmio_prepare, 1715ad879127SKrish Sadhukhan default_prepare_gif_clear, npt_rw_l1mmio_test, 1716ad879127SKrish Sadhukhan default_finished, npt_rw_l1mmio_check }, 1717ad879127SKrish Sadhukhan { "tsc_adjust", default_supported, tsc_adjust_prepare, 1718ad879127SKrish Sadhukhan default_prepare_gif_clear, tsc_adjust_test, 1719ad879127SKrish Sadhukhan default_finished, tsc_adjust_check }, 1720ad879127SKrish Sadhukhan { "latency_run_exit", default_supported, latency_prepare, 1721ad879127SKrish Sadhukhan default_prepare_gif_clear, latency_test, 1722ad879127SKrish Sadhukhan latency_finished, latency_check }, 1723ad879127SKrish Sadhukhan { "latency_svm_insn", default_supported, lat_svm_insn_prepare, 1724ad879127SKrish Sadhukhan default_prepare_gif_clear, null_test, 1725ad879127SKrish Sadhukhan lat_svm_insn_finished, lat_svm_insn_check }, 17264b4fb247SPaolo Bonzini { "exc_inject", default_supported, exc_inject_prepare, 17274b4fb247SPaolo Bonzini default_prepare_gif_clear, exc_inject_test, 17284b4fb247SPaolo Bonzini exc_inject_finished, exc_inject_check }, 1729ad879127SKrish Sadhukhan { "pending_event", default_supported, pending_event_prepare, 1730ad879127SKrish Sadhukhan default_prepare_gif_clear, 1731ad879127SKrish Sadhukhan pending_event_test, pending_event_finished, pending_event_check }, 173285dc2aceSPaolo Bonzini { "pending_event_cli", default_supported, pending_event_cli_prepare, 173385dc2aceSPaolo Bonzini pending_event_cli_prepare_gif_clear, 173485dc2aceSPaolo Bonzini pending_event_cli_test, pending_event_cli_finished, 173585dc2aceSPaolo Bonzini pending_event_cli_check }, 173685dc2aceSPaolo Bonzini { "interrupt", default_supported, interrupt_prepare, 173785dc2aceSPaolo Bonzini default_prepare_gif_clear, interrupt_test, 173885dc2aceSPaolo Bonzini interrupt_finished, interrupt_check }, 1739d4db486bSCathy Avery { "nmi", default_supported, nmi_prepare, 1740d4db486bSCathy Avery default_prepare_gif_clear, nmi_test, 1741d4db486bSCathy Avery nmi_finished, nmi_check }, 17429da1f4d8SCathy Avery { "nmi_hlt", smp_supported, nmi_prepare, 17439da1f4d8SCathy Avery default_prepare_gif_clear, nmi_hlt_test, 17449da1f4d8SCathy Avery nmi_hlt_finished, nmi_hlt_check }, 1745ba29942cSKrish Sadhukhan TEST(svm_guest_state_test), 1746ad879127SKrish Sadhukhan { NULL, NULL, NULL, NULL, NULL, NULL, NULL } 1747ad879127SKrish Sadhukhan }; 1748