1*c1bc863aSGleb Natapov #include "libcflat.h" 2*c1bc863aSGleb Natapov 3*c1bc863aSGleb Natapov struct rsdp_descriptor { /* Root System Descriptor Pointer */ 4*c1bc863aSGleb Natapov u64 signature; /* ACPI signature, contains "RSD PTR " */ 5*c1bc863aSGleb Natapov u8 checksum; /* To make sum of struct == 0 */ 6*c1bc863aSGleb Natapov u8 oem_id [6]; /* OEM identification */ 7*c1bc863aSGleb Natapov u8 revision; /* Must be 0 for 1.0, 2 for 2.0 */ 8*c1bc863aSGleb Natapov u32 rsdt_physical_address; /* 32-bit physical address of RSDT */ 9*c1bc863aSGleb Natapov u32 length; /* XSDT Length in bytes including hdr */ 10*c1bc863aSGleb Natapov u64 xsdt_physical_address; /* 64-bit physical address of XSDT */ 11*c1bc863aSGleb Natapov u8 extended_checksum; /* Checksum of entire table */ 12*c1bc863aSGleb Natapov u8 reserved [3]; /* Reserved field must be 0 */ 13*c1bc863aSGleb Natapov }; 14*c1bc863aSGleb Natapov 15*c1bc863aSGleb Natapov #define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \ 16*c1bc863aSGleb Natapov u32 signature; /* ACPI signature (4 ASCII characters) */ \ 17*c1bc863aSGleb Natapov u32 length; /* Length of table, in bytes, including header */ \ 18*c1bc863aSGleb Natapov u8 revision; /* ACPI Specification minor version # */ \ 19*c1bc863aSGleb Natapov u8 checksum; /* To make sum of entire table == 0 */ \ 20*c1bc863aSGleb Natapov u8 oem_id [6]; /* OEM identification */ \ 21*c1bc863aSGleb Natapov u8 oem_table_id [8]; /* OEM table identification */ \ 22*c1bc863aSGleb Natapov u32 oem_revision; /* OEM revision number */ \ 23*c1bc863aSGleb Natapov u8 asl_compiler_id [4]; /* ASL compiler vendor ID */ \ 24*c1bc863aSGleb Natapov u32 asl_compiler_revision; /* ASL compiler revision number */ 25*c1bc863aSGleb Natapov 26*c1bc863aSGleb Natapov #define RSDT_SIGNATURE 0x54445352 27*c1bc863aSGleb Natapov struct rsdt_descriptor_rev1 { 28*c1bc863aSGleb Natapov ACPI_TABLE_HEADER_DEF 29*c1bc863aSGleb Natapov u32 table_offset_entry[0]; 30*c1bc863aSGleb Natapov }; 31*c1bc863aSGleb Natapov 32*c1bc863aSGleb Natapov #define FACP_SIGNATURE 0x50434146 // FACP 33*c1bc863aSGleb Natapov struct fadt_descriptor_rev1 34*c1bc863aSGleb Natapov { 35*c1bc863aSGleb Natapov ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 36*c1bc863aSGleb Natapov u32 firmware_ctrl; /* Physical address of FACS */ 37*c1bc863aSGleb Natapov u32 dsdt; /* Physical address of DSDT */ 38*c1bc863aSGleb Natapov u8 model; /* System Interrupt Model */ 39*c1bc863aSGleb Natapov u8 reserved1; /* Reserved */ 40*c1bc863aSGleb Natapov u16 sci_int; /* System vector of SCI interrupt */ 41*c1bc863aSGleb Natapov u32 smi_cmd; /* Port address of SMI command port */ 42*c1bc863aSGleb Natapov u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ 43*c1bc863aSGleb Natapov u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ 44*c1bc863aSGleb Natapov u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ 45*c1bc863aSGleb Natapov u8 reserved2; /* Reserved - must be zero */ 46*c1bc863aSGleb Natapov u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ 47*c1bc863aSGleb Natapov u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ 48*c1bc863aSGleb Natapov u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ 49*c1bc863aSGleb Natapov u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ 50*c1bc863aSGleb Natapov u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ 51*c1bc863aSGleb Natapov u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ 52*c1bc863aSGleb Natapov u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ 53*c1bc863aSGleb Natapov u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ 54*c1bc863aSGleb Natapov u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ 55*c1bc863aSGleb Natapov u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ 56*c1bc863aSGleb Natapov u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ 57*c1bc863aSGleb Natapov u8 pm_tmr_len; /* Byte Length of ports at pm_tm_blk */ 58*c1bc863aSGleb Natapov u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ 59*c1bc863aSGleb Natapov u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ 60*c1bc863aSGleb Natapov u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ 61*c1bc863aSGleb Natapov u8 reserved3; /* Reserved */ 62*c1bc863aSGleb Natapov u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ 63*c1bc863aSGleb Natapov u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ 64*c1bc863aSGleb Natapov u16 flush_size; /* Size of area read to flush caches */ 65*c1bc863aSGleb Natapov u16 flush_stride; /* Stride used in flushing caches */ 66*c1bc863aSGleb Natapov u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */ 67*c1bc863aSGleb Natapov u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */ 68*c1bc863aSGleb Natapov u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ 69*c1bc863aSGleb Natapov u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ 70*c1bc863aSGleb Natapov u8 century; /* Index to century in RTC CMOS RAM */ 71*c1bc863aSGleb Natapov u8 reserved4; /* Reserved */ 72*c1bc863aSGleb Natapov u8 reserved4a; /* Reserved */ 73*c1bc863aSGleb Natapov u8 reserved4b; /* Reserved */ 74*c1bc863aSGleb Natapov }; 75*c1bc863aSGleb Natapov 76*c1bc863aSGleb Natapov #define FACS_SIGNATURE 0x53434146 // FACS 77*c1bc863aSGleb Natapov struct facs_descriptor_rev1 78*c1bc863aSGleb Natapov { 79*c1bc863aSGleb Natapov u32 signature; /* ACPI Signature */ 80*c1bc863aSGleb Natapov u32 length; /* Length of structure, in bytes */ 81*c1bc863aSGleb Natapov u32 hardware_signature; /* Hardware configuration signature */ 82*c1bc863aSGleb Natapov u32 firmware_waking_vector; /* ACPI OS waking vector */ 83*c1bc863aSGleb Natapov u32 global_lock; /* Global Lock */ 84*c1bc863aSGleb Natapov u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */ 85*c1bc863aSGleb Natapov u32 reserved1 : 31; /* Must be 0 */ 86*c1bc863aSGleb Natapov u8 resverved3 [40]; /* Reserved - must be zero */ 87*c1bc863aSGleb Natapov }; 88*c1bc863aSGleb Natapov 89*c1bc863aSGleb Natapov u32* find_resume_vector_addr(void) 90*c1bc863aSGleb Natapov { 91*c1bc863aSGleb Natapov unsigned long addr; 92*c1bc863aSGleb Natapov struct rsdp_descriptor *rsdp; 93*c1bc863aSGleb Natapov struct rsdt_descriptor_rev1 *rsdt; 94*c1bc863aSGleb Natapov void *end; 95*c1bc863aSGleb Natapov int i; 96*c1bc863aSGleb Natapov 97*c1bc863aSGleb Natapov for(addr = 0xf0000; addr < 0x100000; addr += 16) { 98*c1bc863aSGleb Natapov rsdp = (void*)addr; 99*c1bc863aSGleb Natapov if (rsdp->signature == 0x2052545020445352LL) 100*c1bc863aSGleb Natapov break; 101*c1bc863aSGleb Natapov } 102*c1bc863aSGleb Natapov if (addr == 0x100000) { 103*c1bc863aSGleb Natapov printf("Can't find RSDP\n"); 104*c1bc863aSGleb Natapov return 0; 105*c1bc863aSGleb Natapov } 106*c1bc863aSGleb Natapov 107*c1bc863aSGleb Natapov printf("RSDP is at %x\n", rsdp); 108*c1bc863aSGleb Natapov rsdt = (void*)(ulong)rsdp->rsdt_physical_address; 109*c1bc863aSGleb Natapov if (!rsdt || rsdt->signature != RSDT_SIGNATURE) 110*c1bc863aSGleb Natapov return 0; 111*c1bc863aSGleb Natapov 112*c1bc863aSGleb Natapov printf("RSDT is at %x\n", rsdt); 113*c1bc863aSGleb Natapov 114*c1bc863aSGleb Natapov end = (void*)rsdt + rsdt->length; 115*c1bc863aSGleb Natapov for (i=0; (void*)&rsdt->table_offset_entry[i] < end; i++) { 116*c1bc863aSGleb Natapov struct fadt_descriptor_rev1 *fadt = (void*)(ulong)rsdt->table_offset_entry[i]; 117*c1bc863aSGleb Natapov struct facs_descriptor_rev1 *facs; 118*c1bc863aSGleb Natapov if (!fadt || fadt->signature != FACP_SIGNATURE) 119*c1bc863aSGleb Natapov continue; 120*c1bc863aSGleb Natapov printf("FADT is at %x\n", fadt); 121*c1bc863aSGleb Natapov facs = (void*)(ulong)fadt->firmware_ctrl; 122*c1bc863aSGleb Natapov if (!facs || facs->signature != FACS_SIGNATURE) 123*c1bc863aSGleb Natapov return 0; 124*c1bc863aSGleb Natapov printf("FACS is at %x\n", facs); 125*c1bc863aSGleb Natapov return &facs->firmware_waking_vector; 126*c1bc863aSGleb Natapov } 127*c1bc863aSGleb Natapov return 0; 128*c1bc863aSGleb Natapov } 129*c1bc863aSGleb Natapov 130*c1bc863aSGleb Natapov extern char resume_start, resume_end; 131*c1bc863aSGleb Natapov 132*c1bc863aSGleb Natapov int main(int argc, char **argv) 133*c1bc863aSGleb Natapov { 134*c1bc863aSGleb Natapov volatile u32 *resume_vector_ptr = find_resume_vector_addr(); 135*c1bc863aSGleb Natapov char *addr, *resume_vec = (void*)0x1000; 136*c1bc863aSGleb Natapov 137*c1bc863aSGleb Natapov *resume_vector_ptr = (u32)(ulong)resume_vec; 138*c1bc863aSGleb Natapov 139*c1bc863aSGleb Natapov printf("resume vector addr is %x\n", resume_vector_ptr); 140*c1bc863aSGleb Natapov for (addr = &resume_start; addr < &resume_end; addr++) 141*c1bc863aSGleb Natapov *resume_vec++ = *addr; 142*c1bc863aSGleb Natapov printf("copy resume code from %x\n", &resume_start); 143*c1bc863aSGleb Natapov *(volatile int*)0 = 0; 144*c1bc863aSGleb Natapov asm volatile("out %0, %1" :: "a"(0x2400), "d"((short)0xb004):"memory"); 145*c1bc863aSGleb Natapov while(1) 146*c1bc863aSGleb Natapov *(volatile int*)0 = 1; 147*c1bc863aSGleb Natapov 148*c1bc863aSGleb Natapov return 0; 149*c1bc863aSGleb Natapov } 150*c1bc863aSGleb Natapov 151*c1bc863aSGleb Natapov asm ( 152*c1bc863aSGleb Natapov ".global resume_start\n" 153*c1bc863aSGleb Natapov ".global resume_end\n" 154*c1bc863aSGleb Natapov ".code16\n" 155*c1bc863aSGleb Natapov "resume_start:\n" 156*c1bc863aSGleb Natapov "mov 0x0, %eax\n" 157*c1bc863aSGleb Natapov "mov $0xf4, %dx\n" 158*c1bc863aSGleb Natapov "out %eax, %dx\n" 159*c1bc863aSGleb Natapov "1: hlt\n" 160*c1bc863aSGleb Natapov "jmp 1b\n" 161*c1bc863aSGleb Natapov "resume_end:\n" 162*c1bc863aSGleb Natapov #ifdef __i386__ 163*c1bc863aSGleb Natapov ".code32\n" 164*c1bc863aSGleb Natapov #else 165*c1bc863aSGleb Natapov ".code64\n" 166*c1bc863aSGleb Natapov #endif 167*c1bc863aSGleb Natapov ); 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