1 #include "libcflat.h" 2 #include "smp.h" 3 #include "atomic.h" 4 #include "processor.h" 5 #include "hyperv.h" 6 #include "vm.h" 7 8 #define MAX_CPU 4 9 #define TICKS_PER_SEC (1000000000 / 100) 10 11 struct hv_reference_tsc_page *hv_clock; 12 13 /* 14 * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction, 15 * yielding a 64-bit result. 16 */ 17 static inline u64 scale_delta(u64 delta, u64 mul_frac) 18 { 19 u64 product, unused; 20 21 __asm__ ( 22 "mulq %3" 23 : "=d" (product), "=a" (unused) : "1" (delta), "rm" ((u64)mul_frac) ); 24 25 return product; 26 } 27 28 static u64 hvclock_tsc_to_ticks(struct hv_reference_tsc_page *shadow, uint64_t tsc) 29 { 30 u64 delta = tsc; 31 return scale_delta(delta, shadow->tsc_scale) + shadow->tsc_offset; 32 } 33 34 /* 35 * Reads a consistent set of time-base values from hypervisor, 36 * into a shadow data area. 37 */ 38 static void hvclock_get_time_values(struct hv_reference_tsc_page *shadow, 39 struct hv_reference_tsc_page *page) 40 { 41 int seq; 42 do { 43 seq = page->tsc_sequence; 44 rmb(); /* fetch version before data */ 45 *shadow = *page; 46 rmb(); /* test version after fetching data */ 47 } while (shadow->tsc_sequence != seq); 48 } 49 50 uint64_t hv_clock_read(void) 51 { 52 struct hv_reference_tsc_page shadow; 53 54 hvclock_get_time_values(&shadow, hv_clock); 55 return hvclock_tsc_to_ticks(&shadow, rdtsc()); 56 } 57 58 atomic_t cpus_left; 59 bool ok[MAX_CPU]; 60 uint64_t loops[MAX_CPU]; 61 62 #define iabs(x) ((x) < 0 ? -(x) : (x)) 63 64 static void hv_clock_test(void *data) 65 { 66 int i = smp_id(); 67 uint64_t t = rdmsr(HV_X64_MSR_TIME_REF_COUNT); 68 uint64_t end = t + 3 * TICKS_PER_SEC; 69 uint64_t msr_sample = t + TICKS_PER_SEC; 70 int min_delta = 123456, max_delta = -123456; 71 bool got_drift = false; 72 bool got_warp = false; 73 74 ok[i] = true; 75 do { 76 uint64_t now = hv_clock_read(); 77 int delta = rdmsr(HV_X64_MSR_TIME_REF_COUNT) - now; 78 79 min_delta = delta < min_delta ? delta : min_delta; 80 if (t < msr_sample) { 81 max_delta = delta > max_delta ? delta: max_delta; 82 } else if (delta < 0 || delta > max_delta * 3 / 2) { 83 printf("suspecting drift on CPU %d? delta = %d, acceptable [0, %d)\n", smp_id(), 84 delta, max_delta); 85 ok[i] = false; 86 got_drift = true; 87 max_delta *= 2; 88 } 89 90 if (now < t && !got_warp) { 91 printf("warp on CPU %d!\n", smp_id()); 92 ok[i] = false; 93 got_warp = true; 94 break; 95 } 96 t = now; 97 } while(t < end); 98 99 if (!got_drift) 100 printf("delta on CPU %d was %d...%d\n", smp_id(), min_delta, max_delta); 101 barrier(); 102 atomic_dec(&cpus_left); 103 } 104 105 static void check_test(int ncpus) 106 { 107 int i; 108 bool pass; 109 110 atomic_set(&cpus_left, ncpus); 111 for (i = ncpus - 1; i >= 0; i--) 112 on_cpu_async(i, hv_clock_test, NULL); 113 114 /* Wait for the end of other vcpu */ 115 while(atomic_read(&cpus_left)) 116 ; 117 118 pass = true; 119 for (i = ncpus - 1; i >= 0; i--) 120 pass &= ok[i]; 121 122 report("TSC reference precision test", pass); 123 } 124 125 static void hv_perf_test(void *data) 126 { 127 uint64_t t = hv_clock_read(); 128 uint64_t end = t + 1000000000 / 100; 129 uint64_t local_loops = 0; 130 131 do { 132 t = hv_clock_read(); 133 local_loops++; 134 } while(t < end); 135 136 loops[smp_id()] = local_loops; 137 atomic_dec(&cpus_left); 138 } 139 140 static void perf_test(int ncpus) 141 { 142 int i; 143 uint64_t total_loops; 144 145 atomic_set(&cpus_left, ncpus); 146 for (i = ncpus - 1; i >= 0; i--) 147 on_cpu_async(i, hv_perf_test, NULL); 148 149 /* Wait for the end of other vcpu */ 150 while(atomic_read(&cpus_left)) 151 ; 152 153 total_loops = 0; 154 for (i = ncpus - 1; i >= 0; i--) 155 total_loops += loops[i]; 156 printf("iterations/sec: %" PRId64"\n", total_loops / ncpus); 157 } 158 159 int main(int ac, char **av) 160 { 161 int nerr = 0; 162 int ncpus; 163 struct hv_reference_tsc_page shadow; 164 uint64_t tsc1, t1, tsc2, t2; 165 uint64_t ref1, ref2; 166 167 setup_vm(); 168 smp_init(); 169 170 hv_clock = alloc_page(); 171 wrmsr(HV_X64_MSR_REFERENCE_TSC, (u64)(uintptr_t)hv_clock | 1); 172 report("MSR value after enabling", 173 rdmsr(HV_X64_MSR_REFERENCE_TSC) == ((u64)(uintptr_t)hv_clock | 1)); 174 175 hvclock_get_time_values(&shadow, hv_clock); 176 if (shadow.tsc_sequence == 0 || shadow.tsc_sequence == 0xFFFFFFFF) { 177 printf("Reference TSC page not available\n"); 178 exit(1); 179 } 180 181 printf("scale: %" PRIx64" offset: %" PRId64"\n", shadow.tsc_scale, shadow.tsc_offset); 182 ref1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT); 183 tsc1 = rdtsc(); 184 t1 = hvclock_tsc_to_ticks(&shadow, tsc1); 185 printf("refcnt %" PRId64", TSC %" PRIx64", TSC reference %" PRId64"\n", 186 ref1, tsc1, t1); 187 188 do 189 ref2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT); 190 while (ref2 < ref1 + 2 * TICKS_PER_SEC); 191 192 tsc2 = rdtsc(); 193 t2 = hvclock_tsc_to_ticks(&shadow, tsc2); 194 printf("refcnt %" PRId64" (delta %" PRId64"), TSC %" PRIx64", " 195 "TSC reference %" PRId64" (delta %" PRId64")\n", 196 ref2, ref2 - ref1, tsc2, t2, t2 - t1); 197 198 ncpus = cpu_count(); 199 if (ncpus > MAX_CPU) 200 ncpus = MAX_CPU; 201 202 check_test(ncpus); 203 perf_test(ncpus); 204 205 wrmsr(HV_X64_MSR_REFERENCE_TSC, 0LL); 206 report("MSR value after disabling", rdmsr(HV_X64_MSR_REFERENCE_TSC) == 0); 207 208 return nerr > 0 ? 1 : 0; 209 } 210