1 #ifndef __HYPERV_H 2 #define __HYPERV_H 3 4 #include "libcflat.h" 5 #include "processor.h" 6 #include "io.h" 7 8 #define HYPERV_CPUID_FEATURES 0x40000003 9 10 #define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2) 11 12 /* Define synthetic interrupt controller model specific registers. */ 13 #define HV_X64_MSR_SCONTROL 0x40000080 14 #define HV_X64_MSR_SVERSION 0x40000081 15 #define HV_X64_MSR_SIEFP 0x40000082 16 #define HV_X64_MSR_SIMP 0x40000083 17 #define HV_X64_MSR_EOM 0x40000084 18 #define HV_X64_MSR_SINT0 0x40000090 19 #define HV_X64_MSR_SINT1 0x40000091 20 #define HV_X64_MSR_SINT2 0x40000092 21 #define HV_X64_MSR_SINT3 0x40000093 22 #define HV_X64_MSR_SINT4 0x40000094 23 #define HV_X64_MSR_SINT5 0x40000095 24 #define HV_X64_MSR_SINT6 0x40000096 25 #define HV_X64_MSR_SINT7 0x40000097 26 #define HV_X64_MSR_SINT8 0x40000098 27 #define HV_X64_MSR_SINT9 0x40000099 28 #define HV_X64_MSR_SINT10 0x4000009A 29 #define HV_X64_MSR_SINT11 0x4000009B 30 #define HV_X64_MSR_SINT12 0x4000009C 31 #define HV_X64_MSR_SINT13 0x4000009D 32 #define HV_X64_MSR_SINT14 0x4000009E 33 #define HV_X64_MSR_SINT15 0x4000009F 34 35 #define HV_SYNIC_CONTROL_ENABLE (1ULL << 0) 36 #define HV_SYNIC_SIMP_ENABLE (1ULL << 0) 37 #define HV_SYNIC_SIEFP_ENABLE (1ULL << 0) 38 #define HV_SYNIC_SINT_MASKED (1ULL << 16) 39 #define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17) 40 #define HV_SYNIC_SINT_VECTOR_MASK (0xFF) 41 #define HV_SYNIC_SINT_COUNT 16 42 43 enum { 44 HV_TEST_DEV_SINT_ROUTE_CREATE = 1, 45 HV_TEST_DEV_SINT_ROUTE_DESTROY, 46 HV_TEST_DEV_SINT_ROUTE_SET_SINT 47 }; 48 49 static inline bool synic_supported(void) 50 { 51 return cpuid(HYPERV_CPUID_FEATURES).a & HV_X64_MSR_SYNIC_AVAILABLE; 52 } 53 54 void synic_sint_create(int vcpu, int sint, int vec, bool auto_eoi); 55 void synic_sint_set(int vcpu, int sint); 56 void synic_sint_destroy(int vcpu, int sint); 57 58 #endif 59