1 #include <asm/debugreg.h> 2 3 #include "ioram.h" 4 #include "vm.h" 5 #include "libcflat.h" 6 #include "desc.h" 7 #include "types.h" 8 #include "processor.h" 9 #include "vmalloc.h" 10 #include "alloc_page.h" 11 #include "usermode.h" 12 13 #define TESTDEV_IO_PORT 0xe0 14 15 #define MAGIC_NUM 0xdeadbeefdeadbeefUL 16 #define GS_BASE 0x400000 17 18 static int exceptions; 19 20 static char st1[] = "abcdefghijklmnop"; 21 22 static void test_stringio(void) 23 { 24 unsigned char r = 0; 25 asm volatile("cld \n\t" 26 "movw %0, %%dx \n\t" 27 "rep outsb \n\t" 28 : : "i"((short)TESTDEV_IO_PORT), 29 "S"(st1), "c"(sizeof(st1) - 1)); 30 asm volatile("inb %1, %0\n\t" : "=a"(r) : "i"((short)TESTDEV_IO_PORT)); 31 report(r == st1[sizeof(st1) - 2], "outsb up"); /* last char */ 32 33 asm volatile("std \n\t" 34 "movw %0, %%dx \n\t" 35 "rep outsb \n\t" 36 : : "i"((short)TESTDEV_IO_PORT), 37 "S"(st1 + sizeof(st1) - 2), "c"(sizeof(st1) - 1)); 38 asm volatile("cld \n\t" : : ); 39 asm volatile("in %1, %0\n\t" : "=a"(r) : "i"((short)TESTDEV_IO_PORT)); 40 report(r == st1[0], "outsb down"); 41 } 42 43 static void test_cmps_one(unsigned char *m1, unsigned char *m3) 44 { 45 void *rsi, *rdi; 46 long rcx, tmp; 47 48 rsi = m1; rdi = m3; rcx = 30; 49 asm volatile("xor %[tmp], %[tmp] \n\t" 50 "repe cmpsb" 51 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 52 : : "cc"); 53 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, "repe/cmpsb (1)"); 54 55 rsi = m1; rdi = m3; rcx = 30; 56 asm volatile("or $1, %[tmp]\n\t" // clear ZF 57 "repe cmpsb" 58 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 59 : : "cc"); 60 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, 61 "repe cmpsb (1.zf)"); 62 63 rsi = m1; rdi = m3; rcx = 15; 64 asm volatile("xor %[tmp], %[tmp] \n\t" 65 "repe cmpsw" 66 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 67 : : "cc"); 68 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, "repe cmpsw (1)"); 69 70 rsi = m1; rdi = m3; rcx = 7; 71 asm volatile("xor %[tmp], %[tmp] \n\t" 72 "repe cmpsl" 73 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 74 : : "cc"); 75 report(rcx == 0 && rsi == m1 + 28 && rdi == m3 + 28, "repe cmpll (1)"); 76 77 rsi = m1; rdi = m3; rcx = 4; 78 asm volatile("xor %[tmp], %[tmp] \n\t" 79 "repe cmpsq" 80 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 81 : : "cc"); 82 report(rcx == 0 && rsi == m1 + 32 && rdi == m3 + 32, "repe cmpsq (1)"); 83 84 rsi = m1; rdi = m3; rcx = 130; 85 asm volatile("xor %[tmp], %[tmp] \n\t" 86 "repe cmpsb" 87 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 88 : : "cc"); 89 report(rcx == 29 && rsi == m1 + 101 && rdi == m3 + 101, 90 "repe cmpsb (2)"); 91 92 rsi = m1; rdi = m3; rcx = 65; 93 asm volatile("xor %[tmp], %[tmp] \n\t" 94 "repe cmpsw" 95 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 96 : : "cc"); 97 report(rcx == 14 && rsi == m1 + 102 && rdi == m3 + 102, 98 "repe cmpsw (2)"); 99 100 rsi = m1; rdi = m3; rcx = 32; 101 asm volatile("xor %[tmp], %[tmp] \n\t" 102 "repe cmpsl" 103 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 104 : : "cc"); 105 report(rcx == 6 && rsi == m1 + 104 && rdi == m3 + 104, 106 "repe cmpll (2)"); 107 108 rsi = m1; rdi = m3; rcx = 16; 109 asm volatile("xor %[tmp], %[tmp] \n\t" 110 "repe cmpsq" 111 : "+S"(rsi), "+D"(rdi), "+c"(rcx), [tmp]"=&r"(tmp) 112 : : "cc"); 113 report(rcx == 3 && rsi == m1 + 104 && rdi == m3 + 104, 114 "repe cmpsq (2)"); 115 116 } 117 118 static void test_cmps(void *mem) 119 { 120 unsigned char *m1 = mem, *m2 = mem + 1024; 121 unsigned char m3[1024]; 122 123 for (int i = 0; i < 100; ++i) 124 m1[i] = m2[i] = m3[i] = i; 125 for (int i = 100; i < 200; ++i) 126 m1[i] = (m3[i] = m2[i] = i) + 1; 127 test_cmps_one(m1, m3); 128 test_cmps_one(m1, m2); 129 } 130 131 static void test_scas(void *mem) 132 { 133 bool z; 134 void *di; 135 136 *(ulong *)mem = 0x77665544332211; 137 138 di = mem; 139 asm ("scasb; setz %0" : "=rm"(z), "+D"(di) : "a"(0xff11)); 140 report(di == mem + 1 && z, "scasb match"); 141 142 di = mem; 143 asm ("scasb; setz %0" : "=rm"(z), "+D"(di) : "a"(0xff54)); 144 report(di == mem + 1 && !z, "scasb mismatch"); 145 146 di = mem; 147 asm ("scasw; setz %0" : "=rm"(z), "+D"(di) : "a"(0xff2211)); 148 report(di == mem + 2 && z, "scasw match"); 149 150 di = mem; 151 asm ("scasw; setz %0" : "=rm"(z), "+D"(di) : "a"(0xffdd11)); 152 report(di == mem + 2 && !z, "scasw mismatch"); 153 154 di = mem; 155 asm ("scasl; setz %0" : "=rm"(z), "+D"(di) : "a"(0xff44332211ul)); 156 report(di == mem + 4 && z, "scasd match"); 157 158 di = mem; 159 asm ("scasl; setz %0" : "=rm"(z), "+D"(di) : "a"(0x45332211)); 160 report(di == mem + 4 && !z, "scasd mismatch"); 161 162 di = mem; 163 asm ("scasq; setz %0" : "=rm"(z), "+D"(di) : "a"(0x77665544332211ul)); 164 report(di == mem + 8 && z, "scasq match"); 165 166 di = mem; 167 asm ("scasq; setz %0" : "=rm"(z), "+D"(di) : "a"(3)); 168 report(di == mem + 8 && !z, "scasq mismatch"); 169 } 170 171 static void test_cr8(void) 172 { 173 unsigned long src, dst; 174 175 dst = 777; 176 src = 3; 177 asm volatile("mov %[src], %%cr8; mov %%cr8, %[dst]" 178 : [dst]"+r"(dst), [src]"+r"(src)); 179 report(dst == 3 && src == 3, "mov %%cr8"); 180 } 181 182 static void test_push(void *mem) 183 { 184 unsigned long tmp; 185 unsigned long *stack_top = mem + 4096; 186 unsigned long *new_stack_top; 187 unsigned long memw = 0x123456789abcdeful; 188 189 memset(mem, 0x55, (void *)stack_top - mem); 190 191 asm volatile("mov %%rsp, %[tmp] \n\t" 192 "mov %[stack_top], %%rsp \n\t" 193 "pushq $-7 \n\t" 194 "pushq %[reg] \n\t" 195 "pushq (%[mem]) \n\t" 196 "pushq $-7070707 \n\t" 197 "mov %%rsp, %[new_stack_top] \n\t" 198 "mov %[tmp], %%rsp" 199 : [tmp]"=&r"(tmp), [new_stack_top]"=r"(new_stack_top) 200 : [stack_top]"r"(stack_top), 201 [reg]"r"(-17l), [mem]"r"(&memw) 202 : "memory"); 203 204 report(stack_top[-1] == -7ul, "push $imm8"); 205 report(stack_top[-2] == -17ul, "push %%reg"); 206 report(stack_top[-3] == 0x123456789abcdeful, "push mem"); 207 report(stack_top[-4] == -7070707, "push $imm"); 208 } 209 210 static void test_pop(void *mem) 211 { 212 unsigned long tmp, tmp3, rsp, rbp; 213 unsigned long *stack_top = mem + 4096; 214 unsigned long memw = 0x123456789abcdeful; 215 static unsigned long tmp2; 216 217 memset(mem, 0x55, (void *)stack_top - mem); 218 219 asm volatile("pushq %[val] \n\t" 220 "popq (%[mem])" 221 : : [val]"m"(memw), [mem]"r"(mem) : "memory"); 222 report(*(unsigned long *)mem == memw, "pop mem"); 223 224 memw = 7 - memw; 225 asm volatile("mov %%rsp, %[tmp] \n\t" 226 "mov %[stack_top], %%rsp \n\t" 227 "pushq %[val] \n\t" 228 "popq %[tmp2] \n\t" 229 "mov %[tmp], %%rsp" 230 : [tmp]"=&r"(tmp), [tmp2]"=m"(tmp2) 231 : [val]"r"(memw), [stack_top]"r"(stack_top) 232 : "memory"); 233 report(tmp2 == memw, "pop mem (2)"); 234 235 memw = 129443 - memw; 236 asm volatile("mov %%rsp, %[tmp] \n\t" 237 "mov %[stack_top], %%rsp \n\t" 238 "pushq %[val] \n\t" 239 "popq %[tmp2] \n\t" 240 "mov %[tmp], %%rsp" 241 : [tmp]"=&r"(tmp), [tmp2]"=r"(tmp2) 242 : [val]"r"(memw), [stack_top]"r"(stack_top) 243 : "memory"); 244 report(tmp2 == memw, "pop reg"); 245 246 asm volatile("mov %%rsp, %[tmp] \n\t" 247 "mov %[stack_top], %%rsp \n\t" 248 "lea 1f(%%rip), %%rax \n\t" 249 "push %%rax \n\t" 250 "ret \n\t" 251 "2: jmp 2b \n\t" 252 "1: mov %[tmp], %%rsp" 253 : [tmp]"=&r"(tmp) : [stack_top]"r"(stack_top) 254 : "memory", "rax"); 255 report_pass("ret"); 256 257 stack_top[-1] = 0x778899; 258 asm volatile("mov %[stack_top], %%r8 \n\t" 259 "mov %%rsp, %%r9 \n\t" 260 "xchg %%rbp, %%r8 \n\t" 261 "leave \n\t" 262 "xchg %%rsp, %%r9 \n\t" 263 "xchg %%rbp, %%r8 \n\t" 264 "mov %%r9, %[tmp] \n\t" 265 "mov %%r8, %[tmp3]" 266 : [tmp]"=&r"(tmp), [tmp3]"=&r"(tmp3) : [stack_top]"r"(stack_top-1) 267 : "memory", "r8", "r9"); 268 report(tmp == (ulong)stack_top && tmp3 == 0x778899, "leave"); 269 270 rbp = 0xaa55aa55bb66bb66ULL; 271 rsp = (unsigned long)stack_top; 272 asm volatile("mov %[rsp], %%r8 \n\t" 273 "mov %[rbp], %%r9 \n\t" 274 "xchg %%rsp, %%r8 \n\t" 275 "xchg %%rbp, %%r9 \n\t" 276 "enter $0x1238, $0 \n\t" 277 "xchg %%rsp, %%r8 \n\t" 278 "xchg %%rbp, %%r9 \n\t" 279 "xchg %%r8, %[rsp] \n\t" 280 "xchg %%r9, %[rbp]" 281 : [rsp]"+a"(rsp), [rbp]"+b"(rbp) : : "memory", "r8", "r9"); 282 report(rsp == (unsigned long)stack_top - 8 - 0x1238 283 && rbp == (unsigned long)stack_top - 8 284 && stack_top[-1] == 0xaa55aa55bb66bb66ULL, 285 "enter"); 286 } 287 288 static void test_ljmp(void *mem) 289 { 290 unsigned char *m = mem; 291 volatile int res = 1; 292 293 *(unsigned long**)m = &&jmpf; 294 asm volatile ("data16 mov %%cs, %0":"=m"(*(m + sizeof(unsigned long)))); 295 asm volatile ("rex64 ljmp *%0"::"m"(*m)); 296 res = 0; 297 jmpf: 298 report(res, "ljmp"); 299 } 300 301 static void test_incdecnotneg(void *mem) 302 { 303 unsigned long *m = mem, v = 1234; 304 unsigned char *mb = mem, vb = 66; 305 306 *m = 0; 307 308 asm volatile ("incl %0":"+m"(*m)); 309 report(*m == 1, "incl"); 310 asm volatile ("decl %0":"+m"(*m)); 311 report(*m == 0, "decl"); 312 asm volatile ("incb %0":"+m"(*m)); 313 report(*m == 1, "incb"); 314 asm volatile ("decb %0":"+m"(*m)); 315 report(*m == 0, "decb"); 316 317 asm volatile ("lock incl %0":"+m"(*m)); 318 report(*m == 1, "lock incl"); 319 asm volatile ("lock decl %0":"+m"(*m)); 320 report(*m == 0, "lock decl"); 321 asm volatile ("lock incb %0":"+m"(*m)); 322 report(*m == 1, "lock incb"); 323 asm volatile ("lock decb %0":"+m"(*m)); 324 report(*m == 0, "lock decb"); 325 326 *m = v; 327 328 asm ("lock negq %0" : "+m"(*m)); v = -v; 329 report(*m == v, "lock negl"); 330 asm ("lock notq %0" : "+m"(*m)); v = ~v; 331 report(*m == v, "lock notl"); 332 333 *mb = vb; 334 335 asm ("lock negb %0" : "+m"(*mb)); vb = -vb; 336 report(*mb == vb, "lock negb"); 337 asm ("lock notb %0" : "+m"(*mb)); vb = ~vb; 338 report(*mb == vb, "lock notb"); 339 } 340 341 static void test_smsw(uint64_t *h_mem) 342 { 343 char mem[16]; 344 unsigned short msw, msw_orig, *pmsw; 345 int i, zero; 346 347 msw_orig = read_cr0(); 348 349 asm("smsw %0" : "=r"(msw)); 350 report(msw == msw_orig, "smsw (1)"); 351 352 memset(mem, 0, 16); 353 pmsw = (void *)mem; 354 asm("smsw %0" : "=m"(pmsw[4])); 355 zero = 1; 356 for (i = 0; i < 8; ++i) 357 if (i != 4 && pmsw[i]) 358 zero = 0; 359 report(msw == pmsw[4] && zero, "smsw (2)"); 360 361 /* Trigger exit on smsw */ 362 *h_mem = 0x12345678abcdeful; 363 asm volatile("smsw %0" : "+m"(*h_mem)); 364 report(msw == (unsigned short)*h_mem && 365 (*h_mem & ~0xfffful) == 0x12345678ab0000ul, "smsw (3)"); 366 } 367 368 static void test_lmsw(void) 369 { 370 char mem[16]; 371 unsigned short msw, *pmsw; 372 unsigned long cr0; 373 374 cr0 = read_cr0(); 375 376 msw = cr0 ^ 8; 377 asm("lmsw %0" : : "r"(msw)); 378 printf("before %lx after %lx\n", cr0, read_cr0()); 379 report((cr0 ^ read_cr0()) == 8, "lmsw (1)"); 380 381 pmsw = (void *)mem; 382 *pmsw = cr0; 383 asm("lmsw %0" : : "m"(*pmsw)); 384 printf("before %lx after %lx\n", cr0, read_cr0()); 385 report(cr0 == read_cr0(), "lmsw (2)"); 386 387 /* lmsw can't clear cr0.pe */ 388 msw = (cr0 & ~1ul) ^ 4; /* change EM to force trap */ 389 asm("lmsw %0" : : "r"(msw)); 390 report((cr0 ^ read_cr0()) == 4 && (cr0 & 1), "lmsw (3)"); 391 392 /* back to normal */ 393 msw = cr0; 394 asm("lmsw %0" : : "r"(msw)); 395 } 396 397 static void test_xchg(void *mem) 398 { 399 unsigned long *memq = mem; 400 unsigned long rax; 401 402 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 403 "mov %%rax, (%[memq])\n\t" 404 "mov $0xfedcba9876543210, %%rax\n\t" 405 "xchg %%al, (%[memq])\n\t" 406 "mov %%rax, %[rax]\n\t" 407 : [rax]"=r"(rax) 408 : [memq]"r"(memq) 409 : "memory", "rax"); 410 report(rax == 0xfedcba98765432ef && *memq == 0x123456789abcd10, 411 "xchg reg, r/m (1)"); 412 413 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 414 "mov %%rax, (%[memq])\n\t" 415 "mov $0xfedcba9876543210, %%rax\n\t" 416 "xchg %%ax, (%[memq])\n\t" 417 "mov %%rax, %[rax]\n\t" 418 : [rax]"=r"(rax) 419 : [memq]"r"(memq) 420 : "memory", "rax"); 421 report(rax == 0xfedcba987654cdef && *memq == 0x123456789ab3210, 422 "xchg reg, r/m (2)"); 423 424 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 425 "mov %%rax, (%[memq])\n\t" 426 "mov $0xfedcba9876543210, %%rax\n\t" 427 "xchg %%eax, (%[memq])\n\t" 428 "mov %%rax, %[rax]\n\t" 429 : [rax]"=r"(rax) 430 : [memq]"r"(memq) 431 : "memory", "rax"); 432 report(rax == 0x89abcdef && *memq == 0x123456776543210, 433 "xchg reg, r/m (3)"); 434 435 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 436 "mov %%rax, (%[memq])\n\t" 437 "mov $0xfedcba9876543210, %%rax\n\t" 438 "xchg %%rax, (%[memq])\n\t" 439 "mov %%rax, %[rax]\n\t" 440 : [rax]"=r"(rax) 441 : [memq]"r"(memq) 442 : "memory", "rax"); 443 report(rax == 0x123456789abcdef && *memq == 0xfedcba9876543210, 444 "xchg reg, r/m (4)"); 445 } 446 447 static void test_xadd(void *mem) 448 { 449 unsigned long *memq = mem; 450 unsigned long rax; 451 452 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 453 "mov %%rax, (%[memq])\n\t" 454 "mov $0xfedcba9876543210, %%rax\n\t" 455 "xadd %%al, (%[memq])\n\t" 456 "mov %%rax, %[rax]\n\t" 457 : [rax]"=r"(rax) 458 : [memq]"r"(memq) 459 : "memory", "rax"); 460 report(rax == 0xfedcba98765432ef && *memq == 0x123456789abcdff, 461 "xadd reg, r/m (1)"); 462 463 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 464 "mov %%rax, (%[memq])\n\t" 465 "mov $0xfedcba9876543210, %%rax\n\t" 466 "xadd %%ax, (%[memq])\n\t" 467 "mov %%rax, %[rax]\n\t" 468 : [rax]"=r"(rax) 469 : [memq]"r"(memq) 470 : "memory", "rax"); 471 report(rax == 0xfedcba987654cdef && *memq == 0x123456789abffff, 472 "xadd reg, r/m (2)"); 473 474 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 475 "mov %%rax, (%[memq])\n\t" 476 "mov $0xfedcba9876543210, %%rax\n\t" 477 "xadd %%eax, (%[memq])\n\t" 478 "mov %%rax, %[rax]\n\t" 479 : [rax]"=r"(rax) 480 : [memq]"r"(memq) 481 : "memory", "rax"); 482 report(rax == 0x89abcdef && *memq == 0x1234567ffffffff, 483 "xadd reg, r/m (3)"); 484 485 asm volatile("mov $0x123456789abcdef, %%rax\n\t" 486 "mov %%rax, (%[memq])\n\t" 487 "mov $0xfedcba9876543210, %%rax\n\t" 488 "xadd %%rax, (%[memq])\n\t" 489 "mov %%rax, %[rax]\n\t" 490 : [rax]"=r"(rax) 491 : [memq]"r"(memq) 492 : "memory", "rax"); 493 report(rax == 0x123456789abcdef && *memq == 0xffffffffffffffff, 494 "xadd reg, r/m (4)"); 495 } 496 497 static void test_btc(void *mem) 498 { 499 unsigned int *a = mem; 500 501 memset(mem, 0, 4 * sizeof(unsigned int)); 502 503 asm ("btcl $32, %0" :: "m"(a[0]) : "memory"); 504 asm ("btcl $1, %0" :: "m"(a[1]) : "memory"); 505 asm ("btcl %1, %0" :: "m"(a[0]), "r"(66) : "memory"); 506 report(a[0] == 1 && a[1] == 2 && a[2] == 4, "btcl imm8, r/m"); 507 508 asm ("btcl %1, %0" :: "m"(a[3]), "r"(-1) : "memory"); 509 report(a[0] == 1 && a[1] == 2 && a[2] == 0x80000004, "btcl reg, r/m"); 510 511 asm ("btcq %1, %0" : : "m"(a[2]), "r"(-1l) : "memory"); 512 report(a[0] == 1 && a[1] == 0x80000002 && a[2] == 0x80000004 && a[3] == 0, 513 "btcq reg, r/m"); 514 } 515 516 static void test_bsfbsr(void *mem) 517 { 518 unsigned long rax, *memq = mem; 519 unsigned eax, *meml = mem; 520 unsigned short ax, *memw = mem; 521 unsigned char z; 522 523 *memw = 0xc000; 524 asm("bsfw %[mem], %[a]" : [a]"=a"(ax) : [mem]"m"(*memw)); 525 report(ax == 14, "bsfw r/m, reg"); 526 527 *meml = 0xc0000000; 528 asm("bsfl %[mem], %[a]" : [a]"=a"(eax) : [mem]"m"(*meml)); 529 report(eax == 30, "bsfl r/m, reg"); 530 531 *memq = 0xc00000000000; 532 asm("bsfq %[mem], %[a]" : [a]"=a"(rax) : [mem]"m"(*memq)); 533 report(rax == 46, "bsfq r/m, reg"); 534 535 *memq = 0; 536 asm("bsfq %[mem], %[a]; setz %[z]" 537 : [a]"=a"(rax), [z]"=rm"(z) : [mem]"m"(*memq)); 538 report(z == 1, "bsfq r/m, reg"); 539 540 *memw = 0xc000; 541 asm("bsrw %[mem], %[a]" : [a]"=a"(ax) : [mem]"m"(*memw)); 542 report(ax == 15, "bsrw r/m, reg"); 543 544 *meml = 0xc0000000; 545 asm("bsrl %[mem], %[a]" : [a]"=a"(eax) : [mem]"m"(*meml)); 546 report(eax == 31, "bsrl r/m, reg"); 547 548 *memq = 0xc00000000000; 549 asm("bsrq %[mem], %[a]" : [a]"=a"(rax) : [mem]"m"(*memq)); 550 report(rax == 47, "bsrq r/m, reg"); 551 552 *memq = 0; 553 asm("bsrq %[mem], %[a]; setz %[z]" 554 : [a]"=a"(rax), [z]"=rm"(z) : [mem]"m"(*memq)); 555 report(z == 1, "bsrq r/m, reg"); 556 } 557 558 static void test_imul(ulong *mem) 559 { 560 ulong a; 561 562 *mem = 51; a = 0x1234567812345678UL; 563 asm ("imulw %1, %%ax" : "+a"(a) : "m"(*mem)); 564 report(a == 0x12345678123439e8, "imul ax, mem"); 565 566 *mem = 51; a = 0x1234567812345678UL; 567 asm ("imull %1, %%eax" : "+a"(a) : "m"(*mem)); 568 report(a == 0xa06d39e8, "imul eax, mem"); 569 570 *mem = 51; a = 0x1234567812345678UL; 571 asm ("imulq %1, %%rax" : "+a"(a) : "m"(*mem)); 572 report(a == 0xA06D39EBA06D39E8UL, "imul rax, mem"); 573 574 *mem = 0x1234567812345678UL; a = 0x8765432187654321L; 575 asm ("imulw $51, %1, %%ax" : "+a"(a) : "m"(*mem)); 576 report(a == 0x87654321876539e8, "imul ax, mem, imm8"); 577 578 *mem = 0x1234567812345678UL; 579 asm ("imull $51, %1, %%eax" : "+a"(a) : "m"(*mem)); 580 report(a == 0xa06d39e8, "imul eax, mem, imm8"); 581 582 *mem = 0x1234567812345678UL; 583 asm ("imulq $51, %1, %%rax" : "+a"(a) : "m"(*mem)); 584 report(a == 0xA06D39EBA06D39E8UL, "imul rax, mem, imm8"); 585 586 *mem = 0x1234567812345678UL; a = 0x8765432187654321L; 587 asm ("imulw $311, %1, %%ax" : "+a"(a) : "m"(*mem)); 588 report(a == 0x8765432187650bc8, "imul ax, mem, imm"); 589 590 *mem = 0x1234567812345678UL; 591 asm ("imull $311, %1, %%eax" : "+a"(a) : "m"(*mem)); 592 report(a == 0x1d950bc8, "imul eax, mem, imm"); 593 594 *mem = 0x1234567812345678UL; 595 asm ("imulq $311, %1, %%rax" : "+a"(a) : "m"(*mem)); 596 report(a == 0x1D950BDE1D950BC8L, "imul rax, mem, imm"); 597 } 598 599 static void test_muldiv(long *mem) 600 { 601 long a, d, aa, dd; 602 u8 ex = 1; 603 604 *mem = 0; a = 1; d = 2; 605 asm (ASM_TRY("1f") "divq %3; movb $0, %2; 1:" 606 : "+a"(a), "+d"(d), "+q"(ex) : "m"(*mem)); 607 report(a == 1 && d == 2 && ex, "divq (fault)"); 608 609 *mem = 987654321098765UL; a = 123456789012345UL; d = 123456789012345UL; 610 asm (ASM_TRY("1f") "divq %3; movb $0, %2; 1:" 611 : "+a"(a), "+d"(d), "+q"(ex) : "m"(*mem)); 612 report(a == 0x1ffffffb1b963b33ul && d == 0x273ba4384ede2ul && !ex, 613 "divq (1)"); 614 aa = 0x1111111111111111; dd = 0x2222222222222222; 615 *mem = 0x3333333333333333; a = aa; d = dd; 616 asm("mulb %2" : "+a"(a), "+d"(d) : "m"(*mem)); 617 report(a == 0x1111111111110363 && d == dd, "mulb mem"); 618 *mem = 0x3333333333333333; a = aa; d = dd; 619 asm("mulw %2" : "+a"(a), "+d"(d) : "m"(*mem)); 620 report(a == 0x111111111111c963 && d == 0x2222222222220369, "mulw mem"); 621 *mem = 0x3333333333333333; a = aa; d = dd; 622 asm("mull %2" : "+a"(a), "+d"(d) : "m"(*mem)); 623 report(a == 0x962fc963 && d == 0x369d036, "mull mem"); 624 *mem = 0x3333333333333333; a = aa; d = dd; 625 asm("mulq %2" : "+a"(a), "+d"(d) : "m"(*mem)); 626 report(a == 0x2fc962fc962fc963 && d == 0x369d0369d0369d0, "mulq mem"); 627 } 628 629 typedef unsigned __attribute__((vector_size(16))) sse128; 630 631 static bool sseeq(uint32_t *v1, uint32_t *v2) 632 { 633 bool ok = true; 634 int i; 635 636 for (i = 0; i < 4; ++i) { 637 ok &= v1[i] == v2[i]; 638 } 639 640 return ok; 641 } 642 643 static __attribute__((target("sse2"))) void test_sse(uint32_t *mem) 644 { 645 sse128 vv; 646 uint32_t *v = (uint32_t *)&vv; 647 648 write_cr0(read_cr0() & ~6); /* EM, TS */ 649 write_cr4(read_cr4() | 0x200); /* OSFXSR */ 650 memset(&vv, 0, sizeof(vv)); 651 652 #define TEST_RW_SSE(insn) do { \ 653 v[0] = 1; v[1] = 2; v[2] = 3; v[3] = 4; \ 654 asm(insn " %1, %0" : "=m"(*mem) : "x"(vv) : "memory"); \ 655 report(sseeq(v, mem), insn " (read)"); \ 656 mem[0] = 5; mem[1] = 6; mem[2] = 7; mem[3] = 8; \ 657 asm(insn " %1, %0" : "=x"(vv) : "m"(*mem) : "memory"); \ 658 report(sseeq(v, mem), insn " (write)"); \ 659 } while (0) 660 661 TEST_RW_SSE("movdqu"); 662 TEST_RW_SSE("movaps"); 663 TEST_RW_SSE("movapd"); 664 TEST_RW_SSE("movups"); 665 TEST_RW_SSE("movupd"); 666 #undef TEST_RW_SSE 667 } 668 669 static void unaligned_movaps_handler(struct ex_regs *regs) 670 { 671 extern char unaligned_movaps_cont; 672 673 ++exceptions; 674 regs->rip = (ulong)&unaligned_movaps_cont; 675 } 676 677 static void cross_movups_handler(struct ex_regs *regs) 678 { 679 extern char cross_movups_cont; 680 681 ++exceptions; 682 regs->rip = (ulong)&cross_movups_cont; 683 } 684 685 static __attribute__((target("sse2"))) void test_sse_exceptions(void *cross_mem) 686 { 687 sse128 vv; 688 uint32_t *v = (uint32_t *)&vv; 689 uint32_t *mem; 690 uint8_t *bytes = cross_mem; // aligned on PAGE_SIZE*2 691 void *page2 = (void *)(&bytes[4096]); 692 struct pte_search search; 693 pteval_t orig_pte; 694 handler old; 695 696 // setup memory for unaligned access 697 mem = (uint32_t *)(&bytes[8]); 698 699 // test unaligned access for movups, movupd and movaps 700 v[0] = 1; v[1] = 2; v[2] = 3; v[3] = 4; 701 mem[0] = 5; mem[1] = 6; mem[2] = 8; mem[3] = 9; 702 asm("movups %1, %0" : "=m"(*mem) : "x"(vv) : "memory"); 703 report(sseeq(v, mem), "movups unaligned"); 704 705 v[0] = 1; v[1] = 2; v[2] = 3; v[3] = 4; 706 mem[0] = 5; mem[1] = 6; mem[2] = 7; mem[3] = 8; 707 asm("movupd %1, %0" : "=m"(*mem) : "x"(vv) : "memory"); 708 report(sseeq(v, mem), "movupd unaligned"); 709 exceptions = 0; 710 old = handle_exception(GP_VECTOR, unaligned_movaps_handler); 711 asm("movaps %1, %0\n\t unaligned_movaps_cont:" 712 : "=m"(*mem) : "x"(vv)); 713 handle_exception(GP_VECTOR, old); 714 report(exceptions == 1, "unaligned movaps exception"); 715 716 // setup memory for cross page access 717 mem = (uint32_t *)(&bytes[4096-8]); 718 v[0] = 1; v[1] = 2; v[2] = 3; v[3] = 4; 719 mem[0] = 5; mem[1] = 6; mem[2] = 7; mem[3] = 8; 720 721 asm("movups %1, %0" : "=m"(*mem) : "x"(vv) : "memory"); 722 report(sseeq(v, mem), "movups unaligned crosspage"); 723 724 // invalidate second page 725 search = find_pte_level(current_page_table(), page2, 1); 726 orig_pte = *search.pte; 727 install_pte(current_page_table(), 1, page2, 0, NULL); 728 invlpg(page2); 729 730 exceptions = 0; 731 old = handle_exception(PF_VECTOR, cross_movups_handler); 732 asm("movups %1, %0\n\t cross_movups_cont:" : "=m"(*mem) : "x"(vv) : 733 "memory"); 734 handle_exception(PF_VECTOR, old); 735 report(exceptions == 1, "movups crosspage exception"); 736 737 // restore invalidated page 738 install_pte(current_page_table(), 1, page2, orig_pte, NULL); 739 } 740 741 static void test_mmx(uint64_t *mem) 742 { 743 uint64_t v; 744 745 write_cr0(read_cr0() & ~6); /* EM, TS */ 746 asm volatile("fninit"); 747 v = 0x0102030405060708ULL; 748 asm("movq %1, %0" : "=m"(*mem) : "y"(v)); 749 report(v == *mem, "movq (mmx, read)"); 750 *mem = 0x8070605040302010ull; 751 asm("movq %1, %0" : "=y"(v) : "m"(*mem)); 752 report(v == *mem, "movq (mmx, write)"); 753 } 754 755 static void test_rip_relative(unsigned *mem, char *insn_ram) 756 { 757 /* movb $1, mem+2(%rip) */ 758 insn_ram[0] = 0xc6; 759 insn_ram[1] = 0x05; 760 *(unsigned *)&insn_ram[2] = 2 + (char *)mem - (insn_ram + 7); 761 insn_ram[6] = 0x01; 762 /* ret */ 763 insn_ram[7] = 0xc3; 764 765 *mem = 0; 766 asm("callq *%1" : "+m"(*mem) : "r"(insn_ram)); 767 report(*mem == 0x10000, "movb $imm, 0(%%rip)"); 768 } 769 770 static void test_shld_shrd(u32 *mem) 771 { 772 *mem = 0x12345678; 773 asm("shld %2, %1, %0" : "+m"(*mem) : "r"(0xaaaaaaaaU), "c"((u8)3)); 774 report(*mem == ((0x12345678 << 3) | 5), "shld (cl)"); 775 *mem = 0x12345678; 776 asm("shrd %2, %1, %0" : "+m"(*mem) : "r"(0x55555555U), "c"((u8)3)); 777 report(*mem == ((0x12345678 >> 3) | (5u << 29)), "shrd (cl)"); 778 } 779 780 static void test_cmov(u32 *mem) 781 { 782 u64 val; 783 *mem = 0xabcdef12u; 784 asm ("movq $0x1234567812345678, %%rax\n\t" 785 "cmpl %%eax, %%eax\n\t" 786 "cmovnel (%[mem]), %%eax\n\t" 787 "movq %%rax, %[val]\n\t" 788 : [val]"=r"(val) : [mem]"r"(mem) : "%rax", "cc"); 789 report(val == 0x12345678ul, "cmovnel"); 790 } 791 792 static unsigned long rip_advance; 793 794 static void advance_rip_and_note_exception(struct ex_regs *regs) 795 { 796 ++exceptions; 797 regs->rip += rip_advance; 798 } 799 800 static void test_mmx_movq_mf(uint64_t *mem) 801 { 802 /* movq %mm0, (%rax) */ 803 extern char movq_start, movq_end; 804 handler old; 805 806 uint16_t fcw = 0; /* all exceptions unmasked */ 807 write_cr0(read_cr0() & ~6); /* TS, EM */ 808 exceptions = 0; 809 old = handle_exception(MF_VECTOR, advance_rip_and_note_exception); 810 asm volatile("fninit; fldcw %0" : : "m"(fcw)); 811 asm volatile("fldz; fldz; fdivp"); /* generate exception */ 812 813 rip_advance = &movq_end - &movq_start; 814 asm(KVM_FEP "movq_start: movq %mm0, (%rax); movq_end:"); 815 /* exit MMX mode */ 816 asm volatile("fnclex; emms"); 817 report(exceptions == 1, "movq mmx generates #MF"); 818 handle_exception(MF_VECTOR, old); 819 } 820 821 static void test_jmp_noncanonical(uint64_t *mem) 822 { 823 extern char nc_jmp_start, nc_jmp_end; 824 handler old; 825 826 *mem = 0x1111111111111111ul; 827 828 exceptions = 0; 829 rip_advance = &nc_jmp_end - &nc_jmp_start; 830 old = handle_exception(GP_VECTOR, advance_rip_and_note_exception); 831 asm volatile ("nc_jmp_start: jmp *%0; nc_jmp_end:" : : "m"(*mem)); 832 report(exceptions == 1, "jump to non-canonical address"); 833 handle_exception(GP_VECTOR, old); 834 } 835 836 static void test_movabs(uint64_t *mem) 837 { 838 /* mov $0x9090909090909090, %rcx */ 839 unsigned long rcx; 840 asm(KVM_FEP "mov $0x9090909090909090, %0" : "=c" (rcx) : "0" (0)); 841 report(rcx == 0x9090909090909090, "64-bit mov imm2"); 842 } 843 844 static void test_smsw_reg(uint64_t *mem) 845 { 846 unsigned long cr0 = read_cr0(); 847 unsigned long rax; 848 const unsigned long in_rax = 0x1234567890abcdeful; 849 850 asm(KVM_FEP "smsww %w0\n\t" : "=a" (rax) : "0" (in_rax)); 851 report((u16)rax == (u16)cr0 && rax >> 16 == in_rax >> 16, 852 "16-bit smsw reg"); 853 854 asm(KVM_FEP "smswl %k0\n\t" : "=a" (rax) : "0" (in_rax)); 855 report(rax == (u32)cr0, "32-bit smsw reg"); 856 857 asm(KVM_FEP "smswq %q0\n\t" : "=a" (rax) : "0" (in_rax)); 858 report(rax == cr0, "64-bit smsw reg"); 859 } 860 861 static void test_nop(uint64_t *mem) 862 { 863 unsigned long rax; 864 const unsigned long in_rax = 0x1234567890abcdeful; 865 asm(KVM_FEP "nop\n\t" : "=a" (rax) : "0" (in_rax)); 866 report(rax == in_rax, "nop"); 867 } 868 869 static void test_mov_dr(uint64_t *mem) 870 { 871 unsigned long rax; 872 873 asm(KVM_FEP "movq %0, %%dr6\n\t" 874 KVM_FEP "movq %%dr6, %0\n\t" : "=a" (rax) : "a" (0)); 875 876 if (this_cpu_has(X86_FEATURE_RTM)) 877 report(rax == (DR6_ACTIVE_LOW & ~DR6_RTM), "mov_dr6"); 878 else 879 report(rax == DR6_ACTIVE_LOW, "mov_dr6"); 880 } 881 882 static void test_illegal_lea(void) 883 { 884 unsigned int vector; 885 886 asm volatile (ASM_TRY_FEP("1f") 887 ".byte 0x8d; .byte 0xc0\n\t" 888 "1:" 889 : : : "memory", "eax"); 890 891 vector = exception_vector(); 892 report(vector == UD_VECTOR, 893 "Wanted #UD on LEA with /reg, got vector = %u", vector); 894 } 895 896 static void test_push16(uint64_t *mem) 897 { 898 uint64_t rsp1, rsp2; 899 uint16_t r; 900 901 asm volatile ( "movq %%rsp, %[rsp1]\n\t" 902 "pushw %[v]\n\t" 903 "popw %[r]\n\t" 904 "movq %%rsp, %[rsp2]\n\t" 905 "movq %[rsp1], %%rsp\n\t" : 906 [rsp1]"=r"(rsp1), [rsp2]"=r"(rsp2), [r]"=r"(r) 907 : [v]"m"(*mem) : "memory"); 908 report(rsp1 == rsp2, "push16"); 909 } 910 911 static void test_crosspage_mmio(volatile uint8_t *mem) 912 { 913 volatile uint16_t w, *pw; 914 915 pw = (volatile uint16_t *)&mem[4095]; 916 mem[4095] = 0x99; 917 mem[4096] = 0x77; 918 asm volatile("mov %1, %0" : "=r"(w) : "m"(*pw) : "memory"); 919 report(w == 0x7799, "cross-page mmio read"); 920 asm volatile("mov %1, %0" : "=m"(*pw) : "r"((uint16_t)0x88aa)); 921 report(mem[4095] == 0xaa && mem[4096] == 0x88, "cross-page mmio write"); 922 } 923 924 static void test_string_io_mmio(volatile uint8_t *mem) 925 { 926 /* Cross MMIO pages.*/ 927 volatile uint8_t *mmio = mem + 4032; 928 929 asm volatile("outw %%ax, %%dx \n\t" : : "a"(0x9999), "d"(TESTDEV_IO_PORT)); 930 931 asm volatile ("cld; rep insb" : : "d" (TESTDEV_IO_PORT), "D" (mmio), "c" (1024)); 932 933 report(mmio[1023] == 0x99, "string_io_mmio"); 934 } 935 936 /* kvm doesn't allow lidt/lgdt from mmio, so the test is disabled */ 937 #if 0 938 static void test_lgdt_lidt(volatile uint8_t *mem) 939 { 940 struct descriptor_table_ptr orig, fresh = {}; 941 942 sgdt(&orig); 943 *(struct descriptor_table_ptr *)mem = (struct descriptor_table_ptr) { 944 .limit = 0xf234, 945 .base = 0x12345678abcd, 946 }; 947 cli(); 948 asm volatile("lgdt %0" : : "m"(*(struct descriptor_table_ptr *)mem)); 949 sgdt(&fresh); 950 lgdt(&orig); 951 sti(); 952 report(orig.limit == fresh.limit && orig.base == fresh.base, 953 "lgdt (long address)"); 954 955 sidt(&orig); 956 *(struct descriptor_table_ptr *)mem = (struct descriptor_table_ptr) { 957 .limit = 0x432f, 958 .base = 0xdbca87654321, 959 }; 960 cli(); 961 asm volatile("lidt %0" : : "m"(*(struct descriptor_table_ptr *)mem)); 962 sidt(&fresh); 963 lidt(&orig); 964 sti(); 965 report(orig.limit == fresh.limit && orig.base == fresh.base, 966 "lidt (long address)"); 967 } 968 #endif 969 970 static void ss_bad_rpl(struct ex_regs *regs) 971 { 972 extern char ss_bad_rpl_cont; 973 974 ++exceptions; 975 regs->rip = (ulong)&ss_bad_rpl_cont; 976 } 977 978 static void test_sreg(volatile uint16_t *mem) 979 { 980 u16 ss = read_ss(); 981 handler old; 982 983 // check for null segment load 984 *mem = 0; 985 asm volatile("mov %0, %%ss" : : "m"(*mem)); 986 report(read_ss() == 0, "mov null, %%ss"); 987 988 // check for exception when ss.rpl != cpl on null segment load 989 exceptions = 0; 990 old = handle_exception(GP_VECTOR, ss_bad_rpl); 991 *mem = 3; 992 asm volatile("mov %0, %%ss; ss_bad_rpl_cont:" : : "m"(*mem)); 993 report(exceptions == 1 && read_ss() == 0, 994 "mov null, %%ss (with ss.rpl != cpl)"); 995 handle_exception(GP_VECTOR, old); 996 write_ss(ss); 997 } 998 999 static uint64_t usr_gs_mov(void) 1000 { 1001 static uint64_t dummy = MAGIC_NUM; 1002 uint64_t dummy_ptr = (uint64_t)&dummy; 1003 uint64_t ret; 1004 1005 dummy_ptr -= GS_BASE; 1006 asm volatile("mov %%gs:(%%rcx), %%rax" : "=a"(ret): "c"(dummy_ptr) :); 1007 1008 return ret; 1009 } 1010 1011 static void test_iret(void) 1012 { 1013 uint64_t val; 1014 bool raised_vector; 1015 1016 /* Update GS base to 4MiB */ 1017 wrmsr(MSR_GS_BASE, GS_BASE); 1018 1019 /* 1020 * Per the SDM, jumping to user mode via `iret`, which is returning to 1021 * outer privilege level, for segment registers (ES, FS, GS, and DS) 1022 * if the check fails, the segment selector becomes null. 1023 * 1024 * In our test case, GS becomes null. 1025 */ 1026 val = run_in_user((usermode_func)usr_gs_mov, GP_VECTOR, 1027 0, 0, 0, 0, &raised_vector); 1028 1029 report(val == MAGIC_NUM, "Test ret/iret with a nullified segment"); 1030 } 1031 1032 /* Broken emulation causes triple fault, which skips the other tests. */ 1033 #if 0 1034 static void test_lldt(volatile uint16_t *mem) 1035 { 1036 u64 gdt[] = { 0, /* null descriptor */ 1037 #ifdef __X86_64__ 1038 0, /* ldt descriptor is 16 bytes in long mode */ 1039 #endif 1040 0x0000f82000000ffffull /* ldt descriptor */ }; 1041 struct descriptor_table_ptr gdt_ptr = { .limit = sizeof(gdt) - 1, 1042 .base = (ulong)&gdt }; 1043 struct descriptor_table_ptr orig_gdt; 1044 1045 cli(); 1046 sgdt(&orig_gdt); 1047 lgdt(&gdt_ptr); 1048 *mem = 0x8; 1049 asm volatile("lldt %0" : : "m"(*mem)); 1050 lgdt(&orig_gdt); 1051 sti(); 1052 report(sldt() == *mem, "lldt"); 1053 } 1054 #endif 1055 1056 static void test_ltr(volatile uint16_t *mem) 1057 { 1058 struct descriptor_table_ptr gdt_ptr; 1059 uint64_t *gdt, *trp; 1060 uint16_t tr = str(); 1061 uint64_t busy_mask = (uint64_t)1 << 41; 1062 1063 sgdt(&gdt_ptr); 1064 gdt = (uint64_t *)gdt_ptr.base; 1065 trp = &gdt[tr >> 3]; 1066 *trp &= ~busy_mask; 1067 *mem = tr; 1068 asm volatile("ltr %0" : : "m"(*mem) : "memory"); 1069 report(str() == tr && (*trp & busy_mask), "ltr"); 1070 } 1071 1072 static void test_mov(void *mem) 1073 { 1074 unsigned long t1, t2; 1075 1076 // test mov reg, r/m and mov r/m, reg 1077 t1 = 0x123456789abcdef; 1078 asm volatile("mov %[t1], (%[mem]) \n\t" 1079 "mov (%[mem]), %[t2]" 1080 : [t2]"=r"(t2) 1081 : [t1]"r"(t1), [mem]"r"(mem) 1082 : "memory"); 1083 report(t2 == 0x123456789abcdef, "mov reg, r/m (1)"); 1084 } 1085 1086 static void test_simplealu(u32 *mem) 1087 { 1088 *mem = 0x1234; 1089 asm("or %1, %0" : "+m"(*mem) : "r"(0x8001)); 1090 report(*mem == 0x9235, "or"); 1091 asm("add %1, %0" : "+m"(*mem) : "r"(2)); 1092 report(*mem == 0x9237, "add"); 1093 asm("xor %1, %0" : "+m"(*mem) : "r"(0x1111)); 1094 report(*mem == 0x8326, "xor"); 1095 asm("sub %1, %0" : "+m"(*mem) : "r"(0x26)); 1096 report(*mem == 0x8300, "sub"); 1097 asm("clc; adc %1, %0" : "+m"(*mem) : "r"(0x100)); 1098 report(*mem == 0x8400, "adc(0)"); 1099 asm("stc; adc %1, %0" : "+m"(*mem) : "r"(0x100)); 1100 report(*mem == 0x8501, "adc(0)"); 1101 asm("clc; sbb %1, %0" : "+m"(*mem) : "r"(0)); 1102 report(*mem == 0x8501, "sbb(0)"); 1103 asm("stc; sbb %1, %0" : "+m"(*mem) : "r"(0)); 1104 report(*mem == 0x8500, "sbb(1)"); 1105 asm("and %1, %0" : "+m"(*mem) : "r"(0xfe77)); 1106 report(*mem == 0x8400, "and"); 1107 asm("test %1, %0" : "+m"(*mem) : "r"(0xf000)); 1108 report(*mem == 0x8400, "test"); 1109 } 1110 1111 static void test_illegal_movbe(void) 1112 { 1113 unsigned int vector; 1114 1115 if (!this_cpu_has(X86_FEATURE_MOVBE)) { 1116 report_skip("MOVBE unsupported by CPU"); 1117 return; 1118 } 1119 1120 asm volatile(ASM_TRY("1f") 1121 ".byte 0x0f; .byte 0x38; .byte 0xf0; .byte 0xc0;\n\t" 1122 "1:" 1123 : : : "memory", "rax"); 1124 1125 vector = exception_vector(); 1126 report(vector == UD_VECTOR, 1127 "Wanted #UD on MOVBE with /reg, got vector = %u", vector); 1128 } 1129 1130 int main(void) 1131 { 1132 void *mem; 1133 void *insn_page; 1134 void *insn_ram; 1135 void *cross_mem; 1136 1137 setup_vm(); 1138 1139 mem = alloc_vpages(2); 1140 install_page((void *)read_cr3(), IORAM_BASE_PHYS, mem); 1141 // install the page twice to test cross-page mmio 1142 install_page((void *)read_cr3(), IORAM_BASE_PHYS, mem + 4096); 1143 insn_page = alloc_page(); 1144 insn_ram = vmap(virt_to_phys(insn_page), 4096); 1145 cross_mem = vmap(virt_to_phys(alloc_pages(2)), 2 * PAGE_SIZE); 1146 1147 test_mov(mem); 1148 test_simplealu(mem); 1149 test_cmps(mem); 1150 test_scas(mem); 1151 1152 test_push(mem); 1153 test_pop(mem); 1154 1155 test_xchg(mem); 1156 test_xadd(mem); 1157 1158 test_cr8(); 1159 1160 test_smsw(mem); 1161 test_lmsw(); 1162 test_ljmp(mem); 1163 test_stringio(); 1164 test_incdecnotneg(mem); 1165 test_btc(mem); 1166 test_bsfbsr(mem); 1167 test_imul(mem); 1168 test_muldiv(mem); 1169 test_sse(mem); 1170 test_sse_exceptions(cross_mem); 1171 test_mmx(mem); 1172 test_rip_relative(mem, insn_ram); 1173 test_shld_shrd(mem); 1174 //test_lgdt_lidt(mem); 1175 test_sreg(mem); 1176 test_iret(); 1177 //test_lldt(mem); 1178 test_ltr(mem); 1179 test_cmov(mem); 1180 1181 if (is_fep_available()) { 1182 test_mmx_movq_mf(mem); 1183 test_movabs(mem); 1184 test_smsw_reg(mem); 1185 test_nop(mem); 1186 test_mov_dr(mem); 1187 test_illegal_lea(); 1188 } else { 1189 report_skip("skipping register-only tests, " 1190 "use kvm.force_emulation_prefix=1 to enable"); 1191 } 1192 1193 test_push16(mem); 1194 test_crosspage_mmio(mem); 1195 1196 test_string_io_mmio(mem); 1197 1198 test_jmp_noncanonical(mem); 1199 test_illegal_movbe(); 1200 1201 return report_summary(); 1202 } 1203