1 /* 2 * Tests vector instruction support 3 * 4 * Copyright 2018 IBM Corp. 5 * 6 * Authors: 7 * Janosch Frank <frankja@de.ibm.com> 8 * 9 * This code is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU Library General Public License version 2. 11 */ 12 #include <libcflat.h> 13 #include <asm/page.h> 14 #include <asm/facility.h> 15 #include <asm/interrupt.h> 16 #include <asm-generic/barrier.h> 17 18 static uint8_t pagebuf[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE))); 19 20 /* Fills all vector registers with data from addr */ 21 static inline void vlm_all(unsigned long *addr) 22 { 23 asm volatile(" .machine z13\n" 24 " vlm 0, 15, %[a]\n" 25 : : [a] "Q" (*addr) 26 : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", 27 "v9", "v10", "v11", "v12", "v13", "v14", "v15"); 28 asm volatile(" .machine z13\n" 29 " vlm 16, 31, %[a]\n" 30 : : [a] "Q" (*(addr+256/8)) 31 : "v16", "v17", "v18", "v19", "v20", "v21", "v22", 32 "v23", "v24", "v25", "v26", "v27", "v28", "v29", 33 "v30", "v31"); 34 } 35 36 static void test_add(void) 37 { 38 static struct prm { 39 __uint128_t a,b,c; 40 } prm __attribute__((aligned(16))); 41 42 prm.a = prm.b = prm.c = 21; 43 44 asm volatile(" .machine z13\n" 45 " vl 0, %[v1]\n" 46 " vl 1, %[v2]\n" 47 " va 2, 0, 1, 4\n" 48 " vst 2, %[v3]\n" 49 : [v3] "=Q" (prm.c) 50 : [v1] "Q" (prm.a), [v2] "Q" (prm.b) 51 : "v0", "v1", "v2", "memory"); 52 report("adding 21", prm.c == 42); 53 } 54 55 /* z14 vector extension test */ 56 static void test_ext1_nand(void) 57 { 58 bool has_vext = test_facility(134); 59 static struct prm { 60 __uint128_t a,b,c; 61 } prm __attribute__((aligned(16))); 62 63 report_xfail("Vector extensions 1 available", !has_vext, has_vext); 64 if (!has_vext) 65 return; 66 67 memset(&prm, 0xff, sizeof(prm)); 68 69 asm volatile(" .machine z13\n" 70 " vl 0, %[v1]\n" 71 " vl 1, %[v2]\n" 72 " .byte 0xe7, 0x20, 0x10, 0x00, 0x00, 0x6e\n" /* vnn */ 73 " vst 2, %[v3]\n" 74 : [v3] "=Q" (prm.c) 75 : [v1] "Q" (prm.a), [v2] "Q" (prm.b) 76 : "v0", "v1", "v2", "memory"); 77 report("nand ff", !prm.c); 78 } 79 80 /* z14 bcd extension test */ 81 static void test_bcd_add(void) 82 { 83 bool has_bcd = test_facility(135); 84 static struct prm { 85 __uint128_t a,b,c; 86 } prm __attribute__((aligned(16))); 87 88 report_xfail("Vector BCD extensions available", !has_bcd, has_bcd); 89 if (!has_bcd) 90 return; 91 92 prm.c = 0; 93 prm.a = prm.b = 0b001000011100; 94 95 asm volatile(" .machine z13\n" 96 " vl 0, %[v1]\n" 97 " vl 1, %[v2]\n" 98 " .byte 0xe6, 0x20, 0x10, 0x01, 0x00, 0x71\n" /* vap */ 99 " vst 2, %[v3]\n" 100 : [v3] "=Q" (prm.c) 101 : [v1] "Q" (prm.a), [v2] "Q" (prm.b) 102 : "v0", "v1", "v2", "memory"); 103 report("bcd add 21", prm.c == 0x42c); 104 } 105 106 static void init(void) 107 { 108 /* Enable vector instructions */ 109 ctl_set_bit(0, 17); 110 111 /* Preset vector registers to 0xff */ 112 memset(pagebuf, 0xff, PAGE_SIZE); 113 vlm_all((u64*)pagebuf); 114 } 115 116 int main(void) 117 { 118 bool has_vregs = test_facility(129); 119 120 report_prefix_push("vector"); 121 report_xfail("Basic vector facility available", !has_vregs, has_vregs); 122 if (!has_vregs) 123 goto done; 124 125 init(); 126 test_add(); 127 test_ext1_nand(); 128 test_bcd_add(); 129 130 done: 131 report_prefix_pop(); 132 return report_summary(); 133 } 134