1*49934b5aSJanis Schoetterl-Glausch // SPDX-License-Identifier: GPL-2.0-only 2*49934b5aSJanis Schoetterl-Glausch /* 3*49934b5aSJanis Schoetterl-Glausch * Copyright IBM Corp. 2021 4*49934b5aSJanis Schoetterl-Glausch * 5*49934b5aSJanis Schoetterl-Glausch * Snippet used by specification exception interception test. 6*49934b5aSJanis Schoetterl-Glausch */ 7*49934b5aSJanis Schoetterl-Glausch #include <libcflat.h> 8*49934b5aSJanis Schoetterl-Glausch #include <bitops.h> 9*49934b5aSJanis Schoetterl-Glausch #include <asm/arch_def.h> 10*49934b5aSJanis Schoetterl-Glausch 11*49934b5aSJanis Schoetterl-Glausch __attribute__((section(".text"))) int main(void) 12*49934b5aSJanis Schoetterl-Glausch { 13*49934b5aSJanis Schoetterl-Glausch struct lowcore *lowcore = (struct lowcore *) 0; 14*49934b5aSJanis Schoetterl-Glausch uint64_t bad_psw = 0; 15*49934b5aSJanis Schoetterl-Glausch 16*49934b5aSJanis Schoetterl-Glausch /* PSW bit 12 has no name or meaning and must be 0 */ 17*49934b5aSJanis Schoetterl-Glausch lowcore->pgm_new_psw.mask = BIT(63 - 12); 18*49934b5aSJanis Schoetterl-Glausch lowcore->pgm_new_psw.addr = 0xdeadbeee; 19*49934b5aSJanis Schoetterl-Glausch asm volatile ("lpsw %0" :: "Q"(bad_psw)); 20*49934b5aSJanis Schoetterl-Glausch return 0; 21*49934b5aSJanis Schoetterl-Glausch } 22