1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Tests sigp emulation 4 * 5 * Copyright 2019 IBM Corp. 6 * 7 * Authors: 8 * Janosch Frank <frankja@linux.ibm.com> 9 */ 10 #include <libcflat.h> 11 #include <asm/asm-offsets.h> 12 #include <asm/interrupt.h> 13 #include <asm/page.h> 14 #include <asm/facility.h> 15 #include <asm-generic/barrier.h> 16 #include <asm/sigp.h> 17 18 #include <smp.h> 19 #include <uv.h> 20 #include <alloc_page.h> 21 22 static int testflag = 0; 23 #define INVALID_CPU_ADDRESS -4711 24 #define INVALID_ORDER_CODE 0xFF 25 struct sigp_invalid_cases { 26 int order; 27 char message[100]; 28 }; 29 static const struct sigp_invalid_cases cases_invalid_cpu_addr[] = { 30 { SIGP_STOP, "stop with invalid CPU address" }, 31 { SIGP_START, "start with invalid CPU address" }, 32 { SIGP_CPU_RESET, "reset with invalid CPU address" }, 33 { INVALID_ORDER_CODE, "invalid order code and CPU address" }, 34 { SIGP_SENSE, "sense with invalid CPU address" }, 35 { SIGP_STOP_AND_STORE_STATUS, "stop and store status with invalid CPU address" }, 36 }; 37 static const struct sigp_invalid_cases cases_valid_cpu_addr[] = { 38 { INVALID_ORDER_CODE, "invalid order code" }, 39 }; 40 41 static uint32_t cpu1_prefix; 42 43 static void test_invalid(void) 44 { 45 const struct sigp_invalid_cases *c; 46 uint32_t status; 47 int cc; 48 int i; 49 50 report_prefix_push("invalid parameters"); 51 52 for (i = 0; i < ARRAY_SIZE(cases_invalid_cpu_addr); i++) { 53 c = &cases_invalid_cpu_addr[i]; 54 cc = sigp(INVALID_CPU_ADDRESS, c->order, 0, &status); 55 report(cc == 3, "%s", c->message); 56 } 57 58 for (i = 0; i < ARRAY_SIZE(cases_valid_cpu_addr); i++) { 59 c = &cases_valid_cpu_addr[i]; 60 cc = smp_sigp(1, c->order, 0, &status); 61 report(cc == 1, "%s", c->message); 62 } 63 64 report_prefix_pop(); 65 } 66 67 static void wait_for_flag(void) 68 { 69 while (!testflag) 70 mb(); 71 } 72 73 static void set_flag(int val) 74 { 75 mb(); 76 testflag = val; 77 mb(); 78 } 79 80 static void test_func(void) 81 { 82 set_flag(1); 83 } 84 85 static void test_start(void) 86 { 87 struct psw psw; 88 psw.mask = extract_psw_mask(); 89 psw.addr = (unsigned long)test_func; 90 91 set_flag(0); 92 smp_cpu_start(1, psw); 93 wait_for_flag(); 94 report_pass("start"); 95 } 96 97 static void test_restart(void) 98 { 99 struct cpu *cpu = smp_cpu_from_idx(1); 100 struct lowcore *lc = cpu->lowcore; 101 int rc; 102 103 report_prefix_push("restart"); 104 report_prefix_push("stopped"); 105 106 lc->restart_new_psw.mask = extract_psw_mask(); 107 lc->restart_new_psw.addr = (unsigned long)test_func; 108 109 /* Make sure cpu is stopped */ 110 smp_cpu_stop(1); 111 set_flag(0); 112 rc = smp_cpu_restart_nowait(1); 113 report(!rc, "return code"); 114 report(!smp_cpu_stopped(1), "cpu started"); 115 wait_for_flag(); 116 report_pass("test flag"); 117 118 report_prefix_pop(); 119 report_prefix_push("running"); 120 121 /* 122 * Wait until cpu 1 has set the flag because it executed the 123 * restart function. 124 */ 125 set_flag(0); 126 rc = smp_cpu_restart_nowait(1); 127 report(!rc, "return code"); 128 report(!smp_cpu_stopped(1), "cpu started"); 129 wait_for_flag(); 130 report_pass("test flag"); 131 132 report_prefix_pop(); 133 report_prefix_pop(); 134 } 135 136 static void test_stop(void) 137 { 138 int rc; 139 140 report_prefix_push("stop"); 141 142 rc = smp_cpu_stop_nowait(1); 143 report(!rc, "return code"); 144 report(smp_cpu_stopped(1), "cpu stopped"); 145 146 report_prefix_push("stop stopped CPU"); 147 rc = smp_cpu_stop_nowait(1); 148 report(!rc, "return code"); 149 report(smp_cpu_stopped(1), "cpu stopped"); 150 report_prefix_pop(); 151 152 report_prefix_pop(); 153 } 154 155 static void test_stop_store_status(void) 156 { 157 struct cpu *cpu = smp_cpu_from_idx(1); 158 159 report_prefix_push("stop store status"); 160 report_prefix_push("running"); 161 smp_cpu_restart(1); 162 lowcore.prefix_sa = 0; 163 lowcore.grs_sa[15] = 0; 164 smp_cpu_stop_store_status(1); 165 mb(); 166 report(smp_cpu_stopped(1), "cpu stopped"); 167 report(lowcore.prefix_sa == (uint32_t)(uintptr_t)cpu->lowcore, "prefix"); 168 report(lowcore.grs_sa[15], "stack"); 169 report_prefix_pop(); 170 171 report_prefix_push("stopped"); 172 lowcore.prefix_sa = 0; 173 lowcore.grs_sa[15] = 0; 174 smp_cpu_stop_store_status(1); 175 mb(); 176 report(smp_cpu_stopped(1), "cpu stopped"); 177 report(lowcore.prefix_sa == (uint32_t)(uintptr_t)cpu->lowcore, "prefix"); 178 report(lowcore.grs_sa[15], "stack"); 179 report_prefix_pop(); 180 181 report_prefix_pop(); 182 } 183 184 static void test_store_status(void) 185 { 186 struct cpu_status *status = alloc_pages_flags(1, AREA_DMA31); 187 uint32_t r; 188 int cc; 189 190 report_prefix_push("store status at address"); 191 memset(status, 0, PAGE_SIZE * 2); 192 193 report_prefix_push("invalid CPU address"); 194 cc = sigp(INVALID_CPU_ADDRESS, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, &r); 195 report(cc == 3, "returned with CC = 3"); 196 report_prefix_pop(); 197 198 report_prefix_push("running"); 199 smp_cpu_restart(1); 200 smp_sigp(1, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, &r); 201 report(r == SIGP_STATUS_INCORRECT_STATE, "incorrect state"); 202 report(!memcmp(status, (void *)status + PAGE_SIZE, PAGE_SIZE), 203 "status not written"); 204 report_prefix_pop(); 205 206 memset(status, 0, PAGE_SIZE); 207 report_prefix_push("stopped"); 208 smp_cpu_stop(1); 209 smp_sigp(1, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, NULL); 210 while (!status->prefix) { mb(); } 211 report_pass("status written"); 212 free_pages(status); 213 report_prefix_pop(); 214 smp_cpu_stop(1); 215 216 report_prefix_pop(); 217 } 218 219 static void loop(void) 220 { 221 while (1) 222 ; 223 } 224 225 static void stpx_and_set_flag(void) 226 { 227 asm volatile ( 228 " stpx %[prefix]\n" 229 : [prefix] "=Q" (cpu1_prefix) 230 : 231 : 232 ); 233 234 set_flag(1); 235 } 236 237 static void test_set_prefix(void) 238 { 239 struct lowcore *new_lc = alloc_pages_flags(1, AREA_DMA31); 240 struct cpu *cpu1 = smp_cpu_from_idx(1); 241 uint32_t status = 0; 242 struct psw new_psw; 243 int cc; 244 245 report_prefix_push("set prefix"); 246 247 assert(new_lc); 248 249 memcpy(new_lc, cpu1->lowcore, sizeof(struct lowcore)); 250 new_lc->restart_new_psw.addr = (unsigned long)loop; 251 252 report_prefix_push("running"); 253 set_flag(0); 254 new_psw.addr = (unsigned long)stpx_and_set_flag; 255 new_psw.mask = extract_psw_mask(); 256 smp_cpu_start(1, new_psw); 257 wait_for_flag(); 258 cpu1_prefix = 0xFFFFFFFF; 259 260 cc = smp_sigp(1, SIGP_SET_PREFIX, (unsigned long)new_lc, &status); 261 report(cc == 1, "CC = 1"); 262 report(status == SIGP_STATUS_INCORRECT_STATE, "status = INCORRECT_STATE"); 263 264 /* 265 * If the prefix of the other CPU was changed it will enter an endless 266 * loop. Otherwise, it should eventually set the flag. 267 */ 268 smp_cpu_stop(1); 269 set_flag(0); 270 smp_cpu_restart(1); 271 wait_for_flag(); 272 report(cpu1_prefix == (uint64_t)cpu1->lowcore, "prefix unchanged"); 273 274 report_prefix_pop(); 275 276 report_prefix_push("invalid CPU address"); 277 278 cc = sigp(INVALID_CPU_ADDRESS, SIGP_SET_PREFIX, (unsigned long)new_lc, &status); 279 report(cc == 3, "CC = 3"); 280 281 report_prefix_pop(); 282 283 free_pages(new_lc); 284 285 report_prefix_pop(); 286 287 } 288 289 static void ecall(void) 290 { 291 unsigned long mask; 292 293 expect_ext_int(); 294 ctl_set_bit(0, CTL0_EXTERNAL_CALL); 295 mask = extract_psw_mask(); 296 mask |= PSW_MASK_EXT; 297 load_psw_mask(mask); 298 set_flag(1); 299 while (lowcore.ext_int_code != 0x1202) { mb(); } 300 report_pass("received"); 301 set_flag(1); 302 } 303 304 static void test_ecall(void) 305 { 306 struct psw psw; 307 psw.mask = extract_psw_mask(); 308 psw.addr = (unsigned long)ecall; 309 310 report_prefix_push("ecall"); 311 set_flag(0); 312 313 smp_cpu_start(1, psw); 314 wait_for_flag(); 315 set_flag(0); 316 smp_sigp(1, SIGP_EXTERNAL_CALL, 0, NULL); 317 wait_for_flag(); 318 smp_cpu_stop(1); 319 report_prefix_pop(); 320 } 321 322 static void emcall(void) 323 { 324 unsigned long mask; 325 326 expect_ext_int(); 327 ctl_set_bit(0, CTL0_EMERGENCY_SIGNAL); 328 mask = extract_psw_mask(); 329 mask |= PSW_MASK_EXT; 330 load_psw_mask(mask); 331 set_flag(1); 332 while (lowcore.ext_int_code != 0x1201) { mb(); } 333 report_pass("received"); 334 set_flag(1); 335 } 336 337 static void test_emcall(void) 338 { 339 struct psw psw; 340 int cc; 341 psw.mask = extract_psw_mask(); 342 psw.addr = (unsigned long)emcall; 343 344 report_prefix_push("emcall"); 345 set_flag(0); 346 347 smp_cpu_start(1, psw); 348 wait_for_flag(); 349 set_flag(0); 350 smp_sigp(1, SIGP_EMERGENCY_SIGNAL, 0, NULL); 351 wait_for_flag(); 352 smp_cpu_stop(1); 353 354 report_prefix_push("invalid CPU address"); 355 356 cc = sigp(INVALID_CPU_ADDRESS, SIGP_EMERGENCY_SIGNAL, 0, NULL); 357 report(cc == 3, "CC = 3"); 358 359 report_prefix_pop(); 360 361 report_prefix_pop(); 362 } 363 364 static void test_cond_emcall(void) 365 { 366 uint32_t status = 0; 367 struct psw psw; 368 int cc; 369 psw.mask = extract_psw_mask() & ~PSW_MASK_IO; 370 psw.addr = (unsigned long)emcall; 371 372 report_prefix_push("conditional emergency call"); 373 374 if (uv_os_is_guest()) { 375 report_skip("unsupported under PV"); 376 goto out; 377 } 378 379 report_prefix_push("invalid CPU address"); 380 381 cc = sigp(INVALID_CPU_ADDRESS, SIGP_COND_EMERGENCY_SIGNAL, 0, NULL); 382 report(cc == 3, "CC = 3"); 383 384 report_prefix_pop(); 385 386 report_prefix_push("success"); 387 set_flag(0); 388 389 smp_cpu_start(1, psw); 390 wait_for_flag(); 391 set_flag(0); 392 cc = smp_sigp(1, SIGP_COND_EMERGENCY_SIGNAL, 0, &status); 393 report(!cc, "CC = 0"); 394 395 wait_for_flag(); 396 smp_cpu_stop(1); 397 398 report_prefix_pop(); 399 400 out: 401 report_prefix_pop(); 402 403 } 404 405 static void test_sense_running(void) 406 { 407 report_prefix_push("sense_running"); 408 /* we (CPU0) are running */ 409 report(smp_sense_running_status(0), "CPU0 sense claims running"); 410 /* stop the target CPU (CPU1) to speed up the not running case */ 411 smp_cpu_stop(1); 412 /* Make sure to have at least one time with a not running indication */ 413 while(smp_sense_running_status(1)); 414 report_pass("CPU1 sense claims not running"); 415 report_prefix_pop(); 416 } 417 418 /* Used to dirty registers of cpu #1 before it is reset */ 419 static void test_func_initial(void) 420 { 421 asm volatile("sfpc %0" :: "d" (0x11)); 422 lctlg(1, 0x42000UL); 423 lctlg(7, 0x43000UL); 424 lctlg(13, 0x44000UL); 425 set_flag(1); 426 } 427 428 static void test_reset_initial(void) 429 { 430 struct cpu_status *status = alloc_pages_flags(0, AREA_DMA31); 431 struct psw psw; 432 int i; 433 434 psw.mask = extract_psw_mask(); 435 psw.addr = (unsigned long)test_func_initial; 436 437 report_prefix_push("reset initial"); 438 set_flag(0); 439 smp_cpu_start(1, psw); 440 wait_for_flag(); 441 442 smp_sigp(1, SIGP_INITIAL_CPU_RESET, 0, NULL); 443 smp_sigp(1, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, NULL); 444 445 report_prefix_push("clear"); 446 report(!status->psw.mask && !status->psw.addr, "psw"); 447 report(!status->prefix, "prefix"); 448 report(!status->fpc, "fpc"); 449 report(!status->cputm, "cpu timer"); 450 report(!status->todpr, "todpr"); 451 for (i = 1; i <= 13; i++) { 452 report(status->crs[i] == 0, "cr%d == 0", i); 453 } 454 report(status->crs[15] == 0, "cr15 == 0"); 455 report_prefix_pop(); 456 457 report_prefix_push("initialized"); 458 report(status->crs[0] == 0xE0UL, "cr0 == 0xE0"); 459 report(status->crs[14] == 0xC2000000UL, "cr14 == 0xC2000000"); 460 report_prefix_pop(); 461 462 report(smp_cpu_stopped(1), "cpu stopped"); 463 free_pages(status); 464 report_prefix_pop(); 465 } 466 467 static void test_local_ints(void) 468 { 469 unsigned long mask; 470 471 /* Open masks for ecall and emcall */ 472 ctl_set_bit(0, CTL0_EXTERNAL_CALL); 473 ctl_set_bit(0, CTL0_EMERGENCY_SIGNAL); 474 mask = extract_psw_mask(); 475 mask |= PSW_MASK_EXT; 476 load_psw_mask(mask); 477 set_flag(1); 478 } 479 480 static void test_reset(void) 481 { 482 struct psw psw; 483 484 psw.mask = extract_psw_mask(); 485 psw.addr = (unsigned long)test_func; 486 487 report_prefix_push("cpu reset"); 488 smp_sigp(1, SIGP_EMERGENCY_SIGNAL, 0, NULL); 489 smp_sigp(1, SIGP_EXTERNAL_CALL, 0, NULL); 490 smp_cpu_start(1, psw); 491 492 smp_sigp(1, SIGP_CPU_RESET, 0, NULL); 493 report(smp_cpu_stopped(1), "cpu stopped"); 494 495 set_flag(0); 496 psw.addr = (unsigned long)test_local_ints; 497 smp_cpu_start(1, psw); 498 wait_for_flag(); 499 report_pass("local interrupts cleared"); 500 report_prefix_pop(); 501 } 502 503 int main(void) 504 { 505 struct psw psw; 506 report_prefix_push("smp"); 507 508 if (smp_query_num_cpus() == 1) { 509 report_skip("need at least 2 cpus for this test"); 510 goto done; 511 } 512 513 /* Setting up the cpu to give it a stack and lowcore */ 514 psw.mask = extract_psw_mask(); 515 psw.addr = (unsigned long)test_func; 516 smp_cpu_setup(1, psw); 517 smp_cpu_stop(1); 518 519 test_start(); 520 test_invalid(); 521 test_restart(); 522 test_stop(); 523 test_stop_store_status(); 524 test_store_status(); 525 test_set_prefix(); 526 test_ecall(); 527 test_emcall(); 528 test_cond_emcall(); 529 test_sense_running(); 530 test_reset(); 531 test_reset_initial(); 532 smp_cpu_destroy(1); 533 534 done: 535 report_prefix_pop(); 536 return report_summary(); 537 } 538