xref: /kvm-unit-tests/s390x/smp.c (revision c85124d28a51ea3619e91cf6da788142677f4a4d)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Tests sigp emulation
4  *
5  * Copyright 2019 IBM Corp.
6  *
7  * Authors:
8  *    Janosch Frank <frankja@linux.ibm.com>
9  */
10 #include <libcflat.h>
11 #include <asm/asm-offsets.h>
12 #include <asm/interrupt.h>
13 #include <asm/page.h>
14 #include <asm/facility.h>
15 #include <asm-generic/barrier.h>
16 #include <asm/sigp.h>
17 
18 #include <smp.h>
19 #include <uv.h>
20 #include <alloc_page.h>
21 
22 static int testflag = 0;
23 #define INVALID_CPU_ADDRESS -4711
24 #define INVALID_ORDER_CODE 0xFF
25 struct sigp_invalid_cases {
26 	int order;
27 	char message[100];
28 };
29 static const struct sigp_invalid_cases cases_invalid_cpu_addr[] = {
30 	{ SIGP_STOP,                  "stop with invalid CPU address" },
31 	{ SIGP_START,                 "start with invalid CPU address" },
32 	{ SIGP_CPU_RESET,             "reset with invalid CPU address" },
33 	{ INVALID_ORDER_CODE,         "invalid order code and CPU address" },
34 	{ SIGP_SENSE,                 "sense with invalid CPU address" },
35 	{ SIGP_STOP_AND_STORE_STATUS, "stop and store status with invalid CPU address" },
36 };
37 static const struct sigp_invalid_cases cases_valid_cpu_addr[] = {
38 	{ INVALID_ORDER_CODE,         "invalid order code" },
39 };
40 
41 static uint32_t cpu1_prefix;
42 
43 static void test_invalid(void)
44 {
45 	const struct sigp_invalid_cases *c;
46 	uint32_t status;
47 	int cc;
48 	int i;
49 
50 	report_prefix_push("invalid parameters");
51 
52 	for (i = 0; i < ARRAY_SIZE(cases_invalid_cpu_addr); i++) {
53 		c = &cases_invalid_cpu_addr[i];
54 		cc = sigp(INVALID_CPU_ADDRESS, c->order, 0, &status);
55 		report(cc == 3, "%s", c->message);
56 	}
57 
58 	for (i = 0; i < ARRAY_SIZE(cases_valid_cpu_addr); i++) {
59 		c = &cases_valid_cpu_addr[i];
60 		cc = smp_sigp(1, c->order, 0, &status);
61 		report(cc == 1, "%s", c->message);
62 	}
63 
64 	report_prefix_pop();
65 }
66 
67 static void wait_for_flag(void)
68 {
69 	while (!testflag)
70 		mb();
71 }
72 
73 static void set_flag(int val)
74 {
75 	mb();
76 	testflag = val;
77 	mb();
78 }
79 
80 static void test_func(void)
81 {
82 	set_flag(1);
83 }
84 
85 static void test_start(void)
86 {
87 	struct psw psw;
88 	psw.mask = extract_psw_mask();
89 	psw.addr = (unsigned long)test_func;
90 
91 	set_flag(0);
92 	smp_cpu_start(1, psw);
93 	wait_for_flag();
94 	report_pass("start");
95 }
96 
97 static void test_restart(void)
98 {
99 	struct cpu *cpu = smp_cpu_from_idx(1);
100 	struct lowcore *lc = cpu->lowcore;
101 	int rc;
102 
103 	report_prefix_push("restart");
104 	report_prefix_push("stopped");
105 
106 	lc->restart_new_psw.mask = extract_psw_mask();
107 	lc->restart_new_psw.addr = (unsigned long)test_func;
108 
109 	/* Make sure cpu is stopped */
110 	smp_cpu_stop(1);
111 	set_flag(0);
112 	rc = smp_cpu_restart_nowait(1);
113 	report(!rc, "return code");
114 	report(!smp_cpu_stopped(1), "cpu started");
115 	wait_for_flag();
116 	report_pass("test flag");
117 
118 	report_prefix_pop();
119 	report_prefix_push("running");
120 
121 	/*
122 	 * Wait until cpu 1 has set the flag because it executed the
123 	 * restart function.
124 	 */
125 	set_flag(0);
126 	rc = smp_cpu_restart_nowait(1);
127 	report(!rc, "return code");
128 	report(!smp_cpu_stopped(1), "cpu started");
129 	wait_for_flag();
130 	report_pass("test flag");
131 
132 	report_prefix_pop();
133 	report_prefix_pop();
134 }
135 
136 static void test_stop(void)
137 {
138 	int rc;
139 
140 	report_prefix_push("stop");
141 
142 	rc = smp_cpu_stop_nowait(1);
143 	report(!rc, "return code");
144 	report(smp_cpu_stopped(1), "cpu stopped");
145 
146 	report_prefix_push("stop stopped CPU");
147 	rc = smp_cpu_stop_nowait(1);
148 	report(!rc, "return code");
149 	report(smp_cpu_stopped(1), "cpu stopped");
150 	report_prefix_pop();
151 
152 	report_prefix_pop();
153 }
154 
155 static void test_stop_store_status(void)
156 {
157 	struct cpu *cpu = smp_cpu_from_idx(1);
158 
159 	report_prefix_push("stop store status");
160 	report_prefix_push("running");
161 	smp_cpu_restart(1);
162 	lowcore.prefix_sa = 0;
163 	lowcore.grs_sa[15] = 0;
164 	smp_cpu_stop_store_status(1);
165 	mb();
166 	report(smp_cpu_stopped(1), "cpu stopped");
167 	report(lowcore.prefix_sa == (uint32_t)(uintptr_t)cpu->lowcore, "prefix");
168 	report(lowcore.grs_sa[15], "stack");
169 	report_prefix_pop();
170 
171 	report_prefix_push("stopped");
172 	lowcore.prefix_sa = 0;
173 	lowcore.grs_sa[15] = 0;
174 	smp_cpu_stop_store_status(1);
175 	mb();
176 	report(smp_cpu_stopped(1), "cpu stopped");
177 	report(lowcore.prefix_sa == (uint32_t)(uintptr_t)cpu->lowcore, "prefix");
178 	report(lowcore.grs_sa[15], "stack");
179 	report_prefix_pop();
180 
181 	report_prefix_pop();
182 }
183 
184 static void test_store_status(void)
185 {
186 	struct cpu_status *status = alloc_pages_flags(1, AREA_DMA31);
187 	uint32_t r;
188 	int cc;
189 
190 	report_prefix_push("store status at address");
191 	memset(status, 0, PAGE_SIZE * 2);
192 
193 	report_prefix_push("invalid CPU address");
194 	cc = sigp(INVALID_CPU_ADDRESS, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, &r);
195 	report(cc == 3, "returned with CC = 3");
196 	report_prefix_pop();
197 
198 	report_prefix_push("running");
199 	smp_cpu_restart(1);
200 	smp_sigp(1, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, &r);
201 	report(r == SIGP_STATUS_INCORRECT_STATE, "incorrect state");
202 	report(!memcmp(status, (void *)status + PAGE_SIZE, PAGE_SIZE),
203 	       "status not written");
204 	report_prefix_pop();
205 
206 	memset(status, 0, PAGE_SIZE);
207 	report_prefix_push("stopped");
208 	smp_cpu_stop(1);
209 	smp_sigp(1, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, NULL);
210 	while (!status->prefix) { mb(); }
211 	report_pass("status written");
212 	free_pages(status);
213 	report_prefix_pop();
214 	smp_cpu_stop(1);
215 
216 	report_prefix_pop();
217 }
218 
219 static void loop(void)
220 {
221 	while (1)
222 		;
223 }
224 
225 static void stpx_and_set_flag(void)
226 {
227 	asm volatile (
228 		"	stpx %[prefix]\n"
229 		: [prefix] "=Q" (cpu1_prefix)
230 		:
231 		:
232 	);
233 
234 	set_flag(1);
235 }
236 
237 static void test_set_prefix(void)
238 {
239 	struct lowcore *new_lc = alloc_pages_flags(1, AREA_DMA31);
240 	struct cpu *cpu1 = smp_cpu_from_idx(1);
241 	uint32_t status = 0;
242 	struct psw new_psw;
243 	int cc;
244 
245 	report_prefix_push("set prefix");
246 
247 	assert(new_lc);
248 
249 	memcpy(new_lc, cpu1->lowcore, sizeof(struct lowcore));
250 	new_lc->restart_new_psw.addr = (unsigned long)loop;
251 
252 	report_prefix_push("running");
253 	set_flag(0);
254 	new_psw.addr = (unsigned long)stpx_and_set_flag;
255 	new_psw.mask = extract_psw_mask();
256 	smp_cpu_start(1, new_psw);
257 	wait_for_flag();
258 	cpu1_prefix = 0xFFFFFFFF;
259 
260 	cc = smp_sigp(1, SIGP_SET_PREFIX, (unsigned long)new_lc, &status);
261 	report(cc == 1, "CC = 1");
262 	report(status == SIGP_STATUS_INCORRECT_STATE, "status = INCORRECT_STATE");
263 
264 	/*
265 	 * If the prefix of the other CPU was changed it will enter an endless
266 	 * loop. Otherwise, it should eventually set the flag.
267 	 */
268 	smp_cpu_stop(1);
269 	set_flag(0);
270 	smp_cpu_restart(1);
271 	wait_for_flag();
272 	report(cpu1_prefix == (uint64_t)cpu1->lowcore, "prefix unchanged");
273 
274 	report_prefix_pop();
275 
276 	report_prefix_push("invalid CPU address");
277 
278 	cc = sigp(INVALID_CPU_ADDRESS, SIGP_SET_PREFIX, (unsigned long)new_lc, &status);
279 	report(cc == 3, "CC = 3");
280 
281 	report_prefix_pop();
282 
283 	free_pages(new_lc);
284 
285 	report_prefix_pop();
286 
287 }
288 
289 static void ecall(void)
290 {
291 	expect_ext_int();
292 	ctl_set_bit(0, CTL0_EXTERNAL_CALL);
293 	psw_mask_set_bits(PSW_MASK_EXT);
294 	set_flag(1);
295 	while (lowcore.ext_int_code != 0x1202) { mb(); }
296 	report_pass("received");
297 	set_flag(1);
298 }
299 
300 static void test_ecall(void)
301 {
302 	struct psw psw;
303 	psw.mask = extract_psw_mask();
304 	psw.addr = (unsigned long)ecall;
305 
306 	report_prefix_push("ecall");
307 	set_flag(0);
308 
309 	smp_cpu_start(1, psw);
310 	wait_for_flag();
311 	set_flag(0);
312 	smp_sigp(1, SIGP_EXTERNAL_CALL, 0, NULL);
313 	wait_for_flag();
314 	smp_cpu_stop(1);
315 	report_prefix_pop();
316 }
317 
318 static void emcall(void)
319 {
320 	expect_ext_int();
321 	ctl_set_bit(0, CTL0_EMERGENCY_SIGNAL);
322 	psw_mask_set_bits(PSW_MASK_EXT);
323 	set_flag(1);
324 	while (lowcore.ext_int_code != 0x1201) { mb(); }
325 	report_pass("received");
326 	set_flag(1);
327 }
328 
329 static void test_emcall(void)
330 {
331 	struct psw psw;
332 	int cc;
333 	psw.mask = extract_psw_mask();
334 	psw.addr = (unsigned long)emcall;
335 
336 	report_prefix_push("emcall");
337 	set_flag(0);
338 
339 	smp_cpu_start(1, psw);
340 	wait_for_flag();
341 	set_flag(0);
342 	smp_sigp(1, SIGP_EMERGENCY_SIGNAL, 0, NULL);
343 	wait_for_flag();
344 	smp_cpu_stop(1);
345 
346 	report_prefix_push("invalid CPU address");
347 
348 	cc = sigp(INVALID_CPU_ADDRESS, SIGP_EMERGENCY_SIGNAL, 0, NULL);
349 	report(cc == 3, "CC = 3");
350 
351 	report_prefix_pop();
352 
353 	report_prefix_pop();
354 }
355 
356 static void test_cond_emcall(void)
357 {
358 	uint32_t status = 0;
359 	struct psw psw;
360 	int cc;
361 	psw.mask = extract_psw_mask() & ~PSW_MASK_IO;
362 	psw.addr = (unsigned long)emcall;
363 
364 	report_prefix_push("conditional emergency call");
365 
366 	if (uv_os_is_guest()) {
367 		report_skip("unsupported under PV");
368 		goto out;
369 	}
370 
371 	report_prefix_push("invalid CPU address");
372 
373 	cc = sigp(INVALID_CPU_ADDRESS, SIGP_COND_EMERGENCY_SIGNAL, 0, NULL);
374 	report(cc == 3, "CC = 3");
375 
376 	report_prefix_pop();
377 
378 	report_prefix_push("success");
379 	set_flag(0);
380 
381 	smp_cpu_start(1, psw);
382 	wait_for_flag();
383 	set_flag(0);
384 	cc = smp_sigp(1, SIGP_COND_EMERGENCY_SIGNAL, 0, &status);
385 	report(!cc, "CC = 0");
386 
387 	wait_for_flag();
388 	smp_cpu_stop(1);
389 
390 	report_prefix_pop();
391 
392 out:
393 	report_prefix_pop();
394 
395 }
396 
397 static void test_sense_running(void)
398 {
399 	report_prefix_push("sense_running");
400 	/* we (CPU0) are running */
401 	report(smp_sense_running_status(0), "CPU0 sense claims running");
402 	/* stop the target CPU (CPU1) to speed up the not running case */
403 	smp_cpu_stop(1);
404 	/* Make sure to have at least one time with a not running indication */
405 	while(smp_sense_running_status(1));
406 	report_pass("CPU1 sense claims not running");
407 	report_prefix_pop();
408 }
409 
410 /* Used to dirty registers of cpu #1 before it is reset */
411 static void test_func_initial(void)
412 {
413 	asm volatile("sfpc %0" :: "d" (0x11));
414 	lctlg(1, 0x42000UL);
415 	lctlg(7, 0x43000UL);
416 	lctlg(13, 0x44000UL);
417 	set_flag(1);
418 }
419 
420 static void test_reset_initial(void)
421 {
422 	struct cpu_status *status = alloc_pages_flags(0, AREA_DMA31);
423 	struct psw psw;
424 	int i;
425 
426 	psw.mask = extract_psw_mask();
427 	psw.addr = (unsigned long)test_func_initial;
428 
429 	report_prefix_push("reset initial");
430 	set_flag(0);
431 	smp_cpu_start(1, psw);
432 	wait_for_flag();
433 
434 	smp_sigp(1, SIGP_INITIAL_CPU_RESET, 0, NULL);
435 	smp_sigp(1, SIGP_STORE_STATUS_AT_ADDRESS, (uintptr_t)status, NULL);
436 
437 	report_prefix_push("clear");
438 	report(!status->psw.mask && !status->psw.addr, "psw");
439 	report(!status->prefix, "prefix");
440 	report(!status->fpc, "fpc");
441 	report(!status->cputm, "cpu timer");
442 	report(!status->todpr, "todpr");
443 	for (i = 1; i <= 13; i++) {
444 		report(status->crs[i] == 0, "cr%d == 0", i);
445 	}
446 	report(status->crs[15] == 0, "cr15 == 0");
447 	report_prefix_pop();
448 
449 	report_prefix_push("initialized");
450 	report(status->crs[0] == 0xE0UL, "cr0 == 0xE0");
451 	report(status->crs[14] == 0xC2000000UL, "cr14 == 0xC2000000");
452 	report_prefix_pop();
453 
454 	report(smp_cpu_stopped(1), "cpu stopped");
455 	free_pages(status);
456 	report_prefix_pop();
457 }
458 
459 static void test_local_ints(void)
460 {
461 	/* Open masks for ecall and emcall */
462 	ctl_set_bit(0, CTL0_EXTERNAL_CALL);
463 	ctl_set_bit(0, CTL0_EMERGENCY_SIGNAL);
464 	psw_mask_set_bits(PSW_MASK_EXT);
465 	set_flag(1);
466 }
467 
468 static void test_reset(void)
469 {
470 	struct psw psw;
471 
472 	psw.mask = extract_psw_mask();
473 	psw.addr = (unsigned long)test_func;
474 
475 	report_prefix_push("cpu reset");
476 	smp_sigp(1, SIGP_EMERGENCY_SIGNAL, 0, NULL);
477 	smp_sigp(1, SIGP_EXTERNAL_CALL, 0, NULL);
478 	smp_cpu_start(1, psw);
479 
480 	smp_sigp(1, SIGP_CPU_RESET, 0, NULL);
481 	report(smp_cpu_stopped(1), "cpu stopped");
482 
483 	set_flag(0);
484 	psw.addr = (unsigned long)test_local_ints;
485 	smp_cpu_start(1, psw);
486 	wait_for_flag();
487 	report_pass("local interrupts cleared");
488 	report_prefix_pop();
489 }
490 
491 int main(void)
492 {
493 	struct psw psw;
494 	report_prefix_push("smp");
495 
496 	if (smp_query_num_cpus() == 1) {
497 		report_skip("need at least 2 cpus for this test");
498 		goto done;
499 	}
500 
501 	/* Setting up the cpu to give it a stack and lowcore */
502 	psw.mask = extract_psw_mask();
503 	psw.addr = (unsigned long)test_func;
504 	smp_cpu_setup(1, psw);
505 	smp_cpu_stop(1);
506 
507 	test_start();
508 	test_invalid();
509 	test_restart();
510 	test_stop();
511 	test_stop_store_status();
512 	test_store_status();
513 	test_set_prefix();
514 	test_ecall();
515 	test_emcall();
516 	test_cond_emcall();
517 	test_sense_running();
518 	test_reset();
519 	test_reset_initial();
520 	smp_cpu_destroy(1);
521 
522 done:
523 	report_prefix_pop();
524 	return report_summary();
525 }
526