1 #ifndef LIBCFLAT_PROCESSOR_H 2 #define LIBCFLAT_PROCESSOR_H 3 4 #include "libcflat.h" 5 #include "msr.h" 6 #include <stdint.h> 7 8 #ifdef __x86_64__ 9 # define R "r" 10 # define W "q" 11 # define S "8" 12 #else 13 # define R "e" 14 # define W "l" 15 # define S "4" 16 #endif 17 18 #define DF_VECTOR 8 19 #define TS_VECTOR 10 20 #define NP_VECTOR 11 21 #define SS_VECTOR 12 22 #define GP_VECTOR 13 23 #define PF_VECTOR 14 24 #define AC_VECTOR 17 25 26 #define X86_CR0_PE 0x00000001 27 #define X86_CR0_MP 0x00000002 28 #define X86_CR0_TS 0x00000008 29 #define X86_CR0_WP 0x00010000 30 #define X86_CR0_AM 0x00040000 31 #define X86_CR0_PG 0x80000000 32 #define X86_CR3_PCID_MASK 0x00000fff 33 #define X86_CR4_TSD 0x00000004 34 #define X86_CR4_DE 0x00000008 35 #define X86_CR4_PSE 0x00000010 36 #define X86_CR4_PAE 0x00000020 37 #define X86_CR4_MCE 0x00000040 38 #define X86_CR4_PCE 0x00000100 39 #define X86_CR4_UMIP 0x00000800 40 #define X86_CR4_VMXE 0x00002000 41 #define X86_CR4_PCIDE 0x00020000 42 #define X86_CR4_SMAP 0x00200000 43 #define X86_CR4_PKE 0x00400000 44 45 #define X86_EFLAGS_CF 0x00000001 46 #define X86_EFLAGS_FIXED 0x00000002 47 #define X86_EFLAGS_PF 0x00000004 48 #define X86_EFLAGS_AF 0x00000010 49 #define X86_EFLAGS_ZF 0x00000040 50 #define X86_EFLAGS_SF 0x00000080 51 #define X86_EFLAGS_TF 0x00000100 52 #define X86_EFLAGS_IF 0x00000200 53 #define X86_EFLAGS_DF 0x00000400 54 #define X86_EFLAGS_OF 0x00000800 55 #define X86_EFLAGS_IOPL 0x00003000 56 #define X86_EFLAGS_NT 0x00004000 57 #define X86_EFLAGS_AC 0x00040000 58 59 #define X86_IA32_EFER 0xc0000080 60 #define X86_EFER_LMA (1UL << 8) 61 62 struct far_pointer32 { 63 u32 offset; 64 u16 selector; 65 } __attribute__((packed)); 66 67 struct descriptor_table_ptr { 68 u16 limit; 69 ulong base; 70 } __attribute__((packed)); 71 72 static inline void barrier(void) 73 { 74 asm volatile ("" : : : "memory"); 75 } 76 77 static inline void clac(void) 78 { 79 asm volatile (".byte 0x0f, 0x01, 0xca" : : : "memory"); 80 } 81 82 static inline void stac(void) 83 { 84 asm volatile (".byte 0x0f, 0x01, 0xcb" : : : "memory"); 85 } 86 87 static inline u16 read_cs(void) 88 { 89 unsigned val; 90 91 asm volatile ("mov %%cs, %0" : "=mr"(val)); 92 return val; 93 } 94 95 static inline u16 read_ds(void) 96 { 97 unsigned val; 98 99 asm volatile ("mov %%ds, %0" : "=mr"(val)); 100 return val; 101 } 102 103 static inline u16 read_es(void) 104 { 105 unsigned val; 106 107 asm volatile ("mov %%es, %0" : "=mr"(val)); 108 return val; 109 } 110 111 static inline u16 read_ss(void) 112 { 113 unsigned val; 114 115 asm volatile ("mov %%ss, %0" : "=mr"(val)); 116 return val; 117 } 118 119 static inline u16 read_fs(void) 120 { 121 unsigned val; 122 123 asm volatile ("mov %%fs, %0" : "=mr"(val)); 124 return val; 125 } 126 127 static inline u16 read_gs(void) 128 { 129 unsigned val; 130 131 asm volatile ("mov %%gs, %0" : "=mr"(val)); 132 return val; 133 } 134 135 static inline unsigned long read_rflags(void) 136 { 137 unsigned long f; 138 asm volatile ("pushf; pop %0\n\t" : "=rm"(f)); 139 return f; 140 } 141 142 static inline void write_ds(unsigned val) 143 { 144 asm volatile ("mov %0, %%ds" : : "rm"(val) : "memory"); 145 } 146 147 static inline void write_es(unsigned val) 148 { 149 asm volatile ("mov %0, %%es" : : "rm"(val) : "memory"); 150 } 151 152 static inline void write_ss(unsigned val) 153 { 154 asm volatile ("mov %0, %%ss" : : "rm"(val) : "memory"); 155 } 156 157 static inline void write_fs(unsigned val) 158 { 159 asm volatile ("mov %0, %%fs" : : "rm"(val) : "memory"); 160 } 161 162 static inline void write_gs(unsigned val) 163 { 164 asm volatile ("mov %0, %%gs" : : "rm"(val) : "memory"); 165 } 166 167 static inline void write_rflags(unsigned long f) 168 { 169 asm volatile ("push %0; popf\n\t" : : "rm"(f)); 170 } 171 172 static inline void set_iopl(int iopl) 173 { 174 unsigned long flags = read_rflags() & ~X86_EFLAGS_IOPL; 175 flags |= iopl * (X86_EFLAGS_IOPL / 3); 176 write_rflags(flags); 177 } 178 179 static inline u64 rdmsr(u32 index) 180 { 181 u32 a, d; 182 asm volatile ("rdmsr" : "=a"(a), "=d"(d) : "c"(index) : "memory"); 183 return a | ((u64)d << 32); 184 } 185 186 static inline void wrmsr(u32 index, u64 val) 187 { 188 u32 a = val, d = val >> 32; 189 asm volatile ("wrmsr" : : "a"(a), "d"(d), "c"(index) : "memory"); 190 } 191 192 static inline uint64_t rdpmc(uint32_t index) 193 { 194 uint32_t a, d; 195 asm volatile ("rdpmc" : "=a"(a), "=d"(d) : "c"(index)); 196 return a | ((uint64_t)d << 32); 197 } 198 199 static inline void write_cr0(ulong val) 200 { 201 asm volatile ("mov %0, %%cr0" : : "r"(val) : "memory"); 202 } 203 204 static inline ulong read_cr0(void) 205 { 206 ulong val; 207 asm volatile ("mov %%cr0, %0" : "=r"(val) : : "memory"); 208 return val; 209 } 210 211 static inline void write_cr2(ulong val) 212 { 213 asm volatile ("mov %0, %%cr2" : : "r"(val) : "memory"); 214 } 215 216 static inline ulong read_cr2(void) 217 { 218 ulong val; 219 asm volatile ("mov %%cr2, %0" : "=r"(val) : : "memory"); 220 return val; 221 } 222 223 static inline void write_cr3(ulong val) 224 { 225 asm volatile ("mov %0, %%cr3" : : "r"(val) : "memory"); 226 } 227 228 static inline ulong read_cr3(void) 229 { 230 ulong val; 231 asm volatile ("mov %%cr3, %0" : "=r"(val) : : "memory"); 232 return val; 233 } 234 235 static inline void write_cr4(ulong val) 236 { 237 asm volatile ("mov %0, %%cr4" : : "r"(val) : "memory"); 238 } 239 240 static inline ulong read_cr4(void) 241 { 242 ulong val; 243 asm volatile ("mov %%cr4, %0" : "=r"(val) : : "memory"); 244 return val; 245 } 246 247 static inline void write_cr8(ulong val) 248 { 249 asm volatile ("mov %0, %%cr8" : : "r"(val) : "memory"); 250 } 251 252 static inline ulong read_cr8(void) 253 { 254 ulong val; 255 asm volatile ("mov %%cr8, %0" : "=r"(val) : : "memory"); 256 return val; 257 } 258 259 static inline void lgdt(const struct descriptor_table_ptr *ptr) 260 { 261 asm volatile ("lgdt %0" : : "m"(*ptr)); 262 } 263 264 static inline void sgdt(struct descriptor_table_ptr *ptr) 265 { 266 asm volatile ("sgdt %0" : "=m"(*ptr)); 267 } 268 269 static inline void lidt(const struct descriptor_table_ptr *ptr) 270 { 271 asm volatile ("lidt %0" : : "m"(*ptr)); 272 } 273 274 static inline void sidt(struct descriptor_table_ptr *ptr) 275 { 276 asm volatile ("sidt %0" : "=m"(*ptr)); 277 } 278 279 static inline void lldt(unsigned val) 280 { 281 asm volatile ("lldt %0" : : "rm"(val)); 282 } 283 284 static inline u16 sldt(void) 285 { 286 u16 val; 287 asm volatile ("sldt %0" : "=rm"(val)); 288 return val; 289 } 290 291 static inline void ltr(u16 val) 292 { 293 asm volatile ("ltr %0" : : "rm"(val)); 294 } 295 296 static inline u16 str(void) 297 { 298 u16 val; 299 asm volatile ("str %0" : "=rm"(val)); 300 return val; 301 } 302 303 static inline void write_dr6(ulong val) 304 { 305 asm volatile ("mov %0, %%dr6" : : "r"(val) : "memory"); 306 } 307 308 static inline ulong read_dr6(void) 309 { 310 ulong val; 311 asm volatile ("mov %%dr6, %0" : "=r"(val)); 312 return val; 313 } 314 315 static inline void write_dr7(ulong val) 316 { 317 asm volatile ("mov %0, %%dr7" : : "r"(val) : "memory"); 318 } 319 320 static inline ulong read_dr7(void) 321 { 322 ulong val; 323 asm volatile ("mov %%dr7, %0" : "=r"(val)); 324 return val; 325 } 326 327 struct cpuid { u32 a, b, c, d; }; 328 329 static inline struct cpuid raw_cpuid(u32 function, u32 index) 330 { 331 struct cpuid r; 332 asm volatile ("cpuid" 333 : "=a"(r.a), "=b"(r.b), "=c"(r.c), "=d"(r.d) 334 : "0"(function), "2"(index)); 335 return r; 336 } 337 338 static inline struct cpuid cpuid_indexed(u32 function, u32 index) 339 { 340 u32 level = raw_cpuid(function & 0xf0000000, 0).a; 341 if (level < function) 342 return (struct cpuid) { 0, 0, 0, 0 }; 343 return raw_cpuid(function, index); 344 } 345 346 static inline struct cpuid cpuid(u32 function) 347 { 348 return cpuid_indexed(function, 0); 349 } 350 351 static inline u8 cpuid_maxphyaddr(void) 352 { 353 if (raw_cpuid(0x80000000, 0).a < 0x80000008) 354 return 36; 355 return raw_cpuid(0x80000008, 0).a & 0xff; 356 } 357 358 359 static inline void pause(void) 360 { 361 asm volatile ("pause"); 362 } 363 364 static inline void cli(void) 365 { 366 asm volatile ("cli"); 367 } 368 369 static inline void sti(void) 370 { 371 asm volatile ("sti"); 372 } 373 374 static inline unsigned long long rdtsc(void) 375 { 376 long long r; 377 378 #ifdef __x86_64__ 379 unsigned a, d; 380 381 asm volatile ("rdtsc" : "=a"(a), "=d"(d)); 382 r = a | ((long long)d << 32); 383 #else 384 asm volatile ("rdtsc" : "=A"(r)); 385 #endif 386 return r; 387 } 388 389 static inline unsigned long long rdtscp(u32 *aux) 390 { 391 long long r; 392 393 #ifdef __x86_64__ 394 unsigned a, d; 395 396 asm volatile ("rdtscp" : "=a"(a), "=d"(d), "=c"(*aux)); 397 r = a | ((long long)d << 32); 398 #else 399 asm volatile ("rdtscp" : "=A"(r), "=c"(*aux)); 400 #endif 401 return r; 402 } 403 404 static inline void wrtsc(u64 tsc) 405 { 406 unsigned a = tsc, d = tsc >> 32; 407 408 asm volatile("wrmsr" : : "a"(a), "d"(d), "c"(0x10)); 409 } 410 411 static inline void irq_disable(void) 412 { 413 asm volatile("cli"); 414 } 415 416 /* Note that irq_enable() does not ensure an interrupt shadow due 417 * to the vagaries of compiler optimizations. If you need the 418 * shadow, use a single asm with "sti" and the instruction after it. 419 */ 420 static inline void irq_enable(void) 421 { 422 asm volatile("sti"); 423 } 424 425 static inline void invlpg(volatile void *va) 426 { 427 asm volatile("invlpg (%0)" ::"r" (va) : "memory"); 428 } 429 430 static inline void safe_halt(void) 431 { 432 asm volatile("sti; hlt"); 433 } 434 435 static inline u32 read_pkru(void) 436 { 437 unsigned int eax, edx; 438 unsigned int ecx = 0; 439 unsigned int pkru; 440 441 asm volatile(".byte 0x0f,0x01,0xee\n\t" 442 : "=a" (eax), "=d" (edx) 443 : "c" (ecx)); 444 pkru = eax; 445 return pkru; 446 } 447 448 static inline void write_pkru(u32 pkru) 449 { 450 unsigned int eax = pkru; 451 unsigned int ecx = 0; 452 unsigned int edx = 0; 453 454 asm volatile(".byte 0x0f,0x01,0xef\n\t" 455 : : "a" (eax), "c" (ecx), "d" (edx)); 456 } 457 458 static inline bool is_canonical(u64 addr) 459 { 460 return (s64)(addr << 16) >> 16 == addr; 461 } 462 463 #endif 464