1 #include "libcflat.h" 2 #include "desc.h" 3 #include "processor.h" 4 #include <setjmp.h> 5 #include "apic-defs.h" 6 7 /* Boot-related data structures */ 8 9 /* IDT and IDT descriptor */ 10 idt_entry_t boot_idt[256] = {0}; 11 12 struct descriptor_table_ptr idt_descr = { 13 .limit = sizeof(boot_idt) - 1, 14 .base = (unsigned long)boot_idt, 15 }; 16 17 #ifndef __x86_64__ 18 /* GDT, TSS and descriptors */ 19 gdt_entry_t gdt[TSS_MAIN / 8 + MAX_TEST_CPUS * 2] = { 20 { 0, 0, 0, .type_limit_flags = 0x0000}, /* 0x00 null */ 21 {0xffff, 0, 0, .type_limit_flags = 0xcf9b}, /* flat 32-bit code segment */ 22 {0xffff, 0, 0, .type_limit_flags = 0xcf93}, /* flat 32-bit data segment */ 23 {0xffff, 0, 0, .type_limit_flags = 0xcf1b}, /* flat 32-bit code segment, not present */ 24 { 0, 0, 0, .type_limit_flags = 0x0000}, /* TSS for task gates */ 25 {0xffff, 0, 0, .type_limit_flags = 0x8f9b}, /* 16-bit code segment */ 26 {0xffff, 0, 0, .type_limit_flags = 0x8f93}, /* 16-bit data segment */ 27 {0xffff, 0, 0, .type_limit_flags = 0xcffb}, /* 32-bit code segment (user) */ 28 {0xffff, 0, 0, .type_limit_flags = 0xcff3}, /* 32-bit data segment (user) */ 29 }; 30 31 tss32_t tss[MAX_TEST_CPUS] = {0}; 32 #else 33 gdt_entry_t gdt[TSS_MAIN / 8 + MAX_TEST_CPUS * 2] = { 34 { 0, 0, 0, .type_limit_flags = 0x0000}, /* 0x00 null */ 35 {0xffff, 0, 0, .type_limit_flags = 0xaf9b}, /* 0x08 64-bit code segment */ 36 {0xffff, 0, 0, .type_limit_flags = 0xcf93}, /* 0x10 32/64-bit data segment */ 37 {0xffff, 0, 0, .type_limit_flags = 0xaf1b}, /* 0x18 64-bit code segment, not present */ 38 {0xffff, 0, 0, .type_limit_flags = 0xcf9b}, /* 0x20 32-bit code segment */ 39 {0xffff, 0, 0, .type_limit_flags = 0x8f9b}, /* 0x28 16-bit code segment */ 40 {0xffff, 0, 0, .type_limit_flags = 0x8f93}, /* 0x30 16-bit data segment */ 41 {0xffff, 0, 0, .type_limit_flags = 0xcffb}, /* 0x38 32-bit code segment (user) */ 42 {0xffff, 0, 0, .type_limit_flags = 0xcff3}, /* 0x40 32/64-bit data segment (user) */ 43 {0xffff, 0, 0, .type_limit_flags = 0xaffb}, /* 0x48 64-bit code segment (user) */ 44 }; 45 46 tss64_t tss[MAX_TEST_CPUS] = {0}; 47 #endif 48 49 struct descriptor_table_ptr gdt_descr = { 50 .limit = sizeof(gdt) - 1, 51 .base = (unsigned long)gdt, 52 }; 53 54 #ifndef __x86_64__ 55 __attribute__((regparm(1))) 56 #endif 57 void do_handle_exception(struct ex_regs *regs); 58 59 void set_idt_entry(int vec, void *addr, int dpl) 60 { 61 idt_entry_t *e = &boot_idt[vec]; 62 memset(e, 0, sizeof *e); 63 e->offset0 = (unsigned long)addr; 64 e->selector = read_cs(); 65 e->ist = 0; 66 e->type = 14; 67 e->dpl = dpl; 68 e->p = 1; 69 e->offset1 = (unsigned long)addr >> 16; 70 #ifdef __x86_64__ 71 e->offset2 = (unsigned long)addr >> 32; 72 #endif 73 } 74 75 void set_idt_dpl(int vec, u16 dpl) 76 { 77 idt_entry_t *e = &boot_idt[vec]; 78 e->dpl = dpl; 79 } 80 81 void set_idt_sel(int vec, u16 sel) 82 { 83 idt_entry_t *e = &boot_idt[vec]; 84 e->selector = sel; 85 } 86 87 struct ex_record { 88 unsigned long rip; 89 unsigned long handler; 90 }; 91 92 extern struct ex_record exception_table_start, exception_table_end; 93 94 static const char* exception_mnemonic(int vector) 95 { 96 switch(vector) { 97 case 0: return "#DE"; 98 case 1: return "#DB"; 99 case 2: return "#NMI"; 100 case 3: return "#BP"; 101 case 4: return "#OF"; 102 case 5: return "#BR"; 103 case 6: return "#UD"; 104 case 7: return "#NM"; 105 case 8: return "#DF"; 106 case 10: return "#TS"; 107 case 11: return "#NP"; 108 case 12: return "#SS"; 109 case 13: return "#GP"; 110 case 14: return "#PF"; 111 case 16: return "#MF"; 112 case 17: return "#AC"; 113 case 18: return "#MC"; 114 case 19: return "#XM"; 115 default: return "#??"; 116 } 117 } 118 119 void unhandled_exception(struct ex_regs *regs, bool cpu) 120 { 121 printf("Unhandled %sexception %ld %s at ip %016lx\n", 122 cpu ? "cpu " : "", regs->vector, 123 exception_mnemonic(regs->vector), regs->rip); 124 if (regs->vector == 14) 125 printf("PF at %#lx addr %#lx\n", regs->rip, read_cr2()); 126 127 printf("error_code=%04lx rflags=%08lx cs=%08lx\n" 128 "rax=%016lx rcx=%016lx rdx=%016lx rbx=%016lx\n" 129 "rbp=%016lx rsi=%016lx rdi=%016lx\n" 130 #ifdef __x86_64__ 131 " r8=%016lx r9=%016lx r10=%016lx r11=%016lx\n" 132 "r12=%016lx r13=%016lx r14=%016lx r15=%016lx\n" 133 #endif 134 "cr0=%016lx cr2=%016lx cr3=%016lx cr4=%016lx\n" 135 #ifdef __x86_64__ 136 "cr8=%016lx\n" 137 #endif 138 , 139 regs->error_code, regs->rflags, regs->cs, 140 regs->rax, regs->rcx, regs->rdx, regs->rbx, 141 regs->rbp, regs->rsi, regs->rdi, 142 #ifdef __x86_64__ 143 regs->r8, regs->r9, regs->r10, regs->r11, 144 regs->r12, regs->r13, regs->r14, regs->r15, 145 #endif 146 read_cr0(), read_cr2(), read_cr3(), read_cr4() 147 #ifdef __x86_64__ 148 , read_cr8() 149 #endif 150 ); 151 dump_frame_stack((void*) regs->rip, (void*) regs->rbp); 152 abort(); 153 } 154 155 static void check_exception_table(struct ex_regs *regs) 156 { 157 struct ex_record *ex; 158 unsigned ex_val; 159 160 ex_val = regs->vector | (regs->error_code << 16) | 161 (((regs->rflags >> 16) & 1) << 8); 162 asm("mov %0, %%gs:4" : : "r"(ex_val)); 163 164 for (ex = &exception_table_start; ex != &exception_table_end; ++ex) { 165 if (ex->rip == regs->rip) { 166 regs->rip = ex->handler; 167 return; 168 } 169 } 170 unhandled_exception(regs, false); 171 } 172 173 static handler exception_handlers[32]; 174 175 handler handle_exception(u8 v, handler fn) 176 { 177 handler old; 178 179 old = exception_handlers[v]; 180 if (v < 32) 181 exception_handlers[v] = fn; 182 return old; 183 } 184 185 #ifndef __x86_64__ 186 __attribute__((regparm(1))) 187 #endif 188 void do_handle_exception(struct ex_regs *regs) 189 { 190 if (regs->vector < 32 && exception_handlers[regs->vector]) { 191 exception_handlers[regs->vector](regs); 192 return; 193 } 194 unhandled_exception(regs, true); 195 } 196 197 #define EX(NAME, N) extern char NAME##_fault; \ 198 asm (".pushsection .text \n\t" \ 199 #NAME"_fault: \n\t" \ 200 "push"W" $0 \n\t" \ 201 "push"W" $"#N" \n\t" \ 202 "jmp __handle_exception \n\t" \ 203 ".popsection") 204 205 #define EX_E(NAME, N) extern char NAME##_fault; \ 206 asm (".pushsection .text \n\t" \ 207 #NAME"_fault: \n\t" \ 208 "push"W" $"#N" \n\t" \ 209 "jmp __handle_exception \n\t" \ 210 ".popsection") 211 212 EX(de, 0); 213 EX(db, 1); 214 EX(nmi, 2); 215 EX(bp, 3); 216 EX(of, 4); 217 EX(br, 5); 218 EX(ud, 6); 219 EX(nm, 7); 220 EX_E(df, 8); 221 EX_E(ts, 10); 222 EX_E(np, 11); 223 EX_E(ss, 12); 224 EX_E(gp, 13); 225 EX_E(pf, 14); 226 EX(mf, 16); 227 EX_E(ac, 17); 228 EX(mc, 18); 229 EX(xm, 19); 230 EX_E(cp, 21); 231 232 asm (".pushsection .text \n\t" 233 "__handle_exception: \n\t" 234 #ifdef __x86_64__ 235 "push %r15; push %r14; push %r13; push %r12 \n\t" 236 "push %r11; push %r10; push %r9; push %r8 \n\t" 237 #endif 238 "push %"R "di; push %"R "si; push %"R "bp; sub $"S", %"R "sp \n\t" 239 "push %"R "bx; push %"R "dx; push %"R "cx; push %"R "ax \n\t" 240 #ifdef __x86_64__ 241 "mov %"R "sp, %"R "di \n\t" 242 #else 243 "mov %"R "sp, %"R "ax \n\t" 244 #endif 245 "call do_handle_exception \n\t" 246 "pop %"R "ax; pop %"R "cx; pop %"R "dx; pop %"R "bx \n\t" 247 "add $"S", %"R "sp; pop %"R "bp; pop %"R "si; pop %"R "di \n\t" 248 #ifdef __x86_64__ 249 "pop %r8; pop %r9; pop %r10; pop %r11 \n\t" 250 "pop %r12; pop %r13; pop %r14; pop %r15 \n\t" 251 #endif 252 "add $"S", %"R "sp \n\t" 253 "add $"S", %"R "sp \n\t" 254 "iret"W" \n\t" 255 ".popsection"); 256 257 static void *idt_handlers[32] = { 258 [0] = &de_fault, 259 [1] = &db_fault, 260 [2] = &nmi_fault, 261 [3] = &bp_fault, 262 [4] = &of_fault, 263 [5] = &br_fault, 264 [6] = &ud_fault, 265 [7] = &nm_fault, 266 [8] = &df_fault, 267 [10] = &ts_fault, 268 [11] = &np_fault, 269 [12] = &ss_fault, 270 [13] = &gp_fault, 271 [14] = &pf_fault, 272 [16] = &mf_fault, 273 [17] = &ac_fault, 274 [18] = &mc_fault, 275 [19] = &xm_fault, 276 [21] = &cp_fault, 277 }; 278 279 void setup_idt(void) 280 { 281 int i; 282 static bool idt_initialized = false; 283 284 if (idt_initialized) { 285 return; 286 } 287 idt_initialized = true; 288 for (i = 0; i < 32; i++) 289 if (idt_handlers[i]) 290 set_idt_entry(i, idt_handlers[i], 0); 291 handle_exception(0, check_exception_table); 292 handle_exception(6, check_exception_table); 293 handle_exception(13, check_exception_table); 294 } 295 296 unsigned exception_vector(void) 297 { 298 unsigned char vector; 299 300 asm volatile("movb %%gs:4, %0" : "=q"(vector)); 301 return vector; 302 } 303 304 int write_cr4_checking(unsigned long val) 305 { 306 asm volatile(ASM_TRY("1f") 307 "mov %0,%%cr4\n\t" 308 "1:": : "r" (val)); 309 return exception_vector(); 310 } 311 312 unsigned exception_error_code(void) 313 { 314 unsigned short error_code; 315 316 asm volatile("mov %%gs:6, %0" : "=r"(error_code)); 317 return error_code; 318 } 319 320 bool exception_rflags_rf(void) 321 { 322 unsigned char rf_flag; 323 324 asm volatile("movb %%gs:5, %b0" : "=q"(rf_flag)); 325 return rf_flag & 1; 326 } 327 328 static char intr_alt_stack[4096]; 329 330 void set_gdt_entry(int sel, unsigned long base, u32 limit, u8 type, u8 flags) 331 { 332 gdt_entry_t *entry = &gdt[sel >> 3]; 333 334 /* Setup the descriptor base address */ 335 entry->base1 = (base & 0xFFFF); 336 entry->base2 = (base >> 16) & 0xFF; 337 entry->base3 = (base >> 24) & 0xFF; 338 339 /* Setup the descriptor limits, type and flags */ 340 entry->limit1 = (limit & 0xFFFF); 341 entry->type_limit_flags = ((limit & 0xF0000) >> 8) | ((flags & 0xF0) << 8) | type; 342 343 #ifdef __x86_64__ 344 if (!entry->s) { 345 struct system_desc64 *entry16 = (struct system_desc64 *)entry; 346 entry16->zero = 0; 347 entry16->base4 = base >> 32; 348 } 349 #endif 350 } 351 352 #ifndef __x86_64__ 353 void set_gdt_task_gate(u16 sel, u16 tss_sel) 354 { 355 set_gdt_entry(sel, tss_sel, 0, 0x85, 0); // task, present 356 } 357 358 void set_idt_task_gate(int vec, u16 sel) 359 { 360 idt_entry_t *e = &boot_idt[vec]; 361 362 memset(e, 0, sizeof *e); 363 364 e->selector = sel; 365 e->ist = 0; 366 e->type = 5; 367 e->dpl = 0; 368 e->p = 1; 369 } 370 371 /* 372 * 0 - main task 373 * 1 - interrupt task 374 */ 375 376 tss32_t tss_intr; 377 378 void setup_tss32(void) 379 { 380 u16 desc_size = sizeof(tss32_t); 381 382 tss[0].cr3 = read_cr3(); 383 tss_intr.cr3 = read_cr3(); 384 tss_intr.ss0 = tss_intr.ss1 = tss_intr.ss2 = 0x10; 385 tss_intr.esp = tss_intr.esp0 = tss_intr.esp1 = tss_intr.esp2 = 386 (u32)intr_alt_stack + 4096; 387 tss_intr.cs = 0x08; 388 tss_intr.ds = tss_intr.es = tss_intr.fs = tss_intr.ss = 0x10; 389 tss_intr.gs = read_gs(); 390 tss_intr.iomap_base = (u16)desc_size; 391 set_gdt_entry(TSS_INTR, (u32)&tss_intr, desc_size - 1, 0x89, 0); 392 } 393 394 void set_intr_task_gate(int e, void *fn) 395 { 396 tss_intr.eip = (u32)fn; 397 set_idt_task_gate(e, TSS_INTR); 398 } 399 400 void setup_alt_stack(void) 401 { 402 setup_tss32(); 403 } 404 405 void set_intr_alt_stack(int e, void *fn) 406 { 407 set_intr_task_gate(e, fn); 408 } 409 410 void print_current_tss_info(void) 411 { 412 u16 tr = str(); 413 414 if (tr != TSS_MAIN && tr != TSS_INTR) 415 printf("Unknown TSS %x\n", tr); 416 else 417 printf("TR=%x (%s) Main TSS back link %x. Intr TSS back link %x\n", 418 tr, tr ? "interrupt" : "main", tss[0].prev, tss_intr.prev); 419 } 420 #else 421 void set_intr_alt_stack(int e, void *addr) 422 { 423 set_idt_entry(e, addr, 0); 424 boot_idt[e].ist = 1; 425 } 426 427 void setup_alt_stack(void) 428 { 429 tss[0].ist1 = (u64)intr_alt_stack + 4096; 430 } 431 #endif 432 433 static bool exception; 434 static jmp_buf *exception_jmpbuf; 435 436 static void exception_handler_longjmp(void) 437 { 438 longjmp(*exception_jmpbuf, 1); 439 } 440 441 static void exception_handler(struct ex_regs *regs) 442 { 443 /* longjmp must happen after iret, so do not do it now. */ 444 exception = true; 445 regs->rip = (unsigned long)&exception_handler_longjmp; 446 regs->cs = read_cs(); 447 } 448 449 bool test_for_exception(unsigned int ex, void (*trigger_func)(void *data), 450 void *data) 451 { 452 handler old; 453 jmp_buf jmpbuf; 454 int ret; 455 456 old = handle_exception(ex, exception_handler); 457 ret = set_exception_jmpbuf(jmpbuf); 458 if (ret == 0) 459 trigger_func(data); 460 handle_exception(ex, old); 461 return ret; 462 } 463 464 void __set_exception_jmpbuf(jmp_buf *addr) 465 { 466 exception_jmpbuf = addr; 467 } 468 469 gdt_entry_t *get_tss_descr(void) 470 { 471 struct descriptor_table_ptr gdt_ptr; 472 gdt_entry_t *gdt; 473 474 sgdt(&gdt_ptr); 475 gdt = (gdt_entry_t *)gdt_ptr.base; 476 return &gdt[str() / 8]; 477 } 478 479 unsigned long get_gdt_entry_base(gdt_entry_t *entry) 480 { 481 unsigned long base; 482 base = entry->base1 | ((u32)entry->base2 << 16) | ((u32)entry->base3 << 24); 483 #ifdef __x86_64__ 484 if (!entry->s) { 485 base |= (u64)((struct system_desc64 *)entry)->base4 << 32; 486 } 487 #endif 488 return base; 489 } 490 491 unsigned long get_gdt_entry_limit(gdt_entry_t *entry) 492 { 493 unsigned long limit; 494 limit = entry->limit1 | ((u32)entry->limit2 << 16); 495 if (entry->g) { 496 limit = (limit << 12) | 0xFFF; 497 } 498 return limit; 499 } 500