1fcdc04e0SPierre Morel /* SPDX-License-Identifier: GPL-2.0-only */ 2fcdc04e0SPierre Morel /* 3fcdc04e0SPierre Morel * Structures used to Store System Information 4fcdc04e0SPierre Morel * 5fcdc04e0SPierre Morel * Copyright IBM Corp. 2022 6fcdc04e0SPierre Morel */ 7fcdc04e0SPierre Morel 8fcdc04e0SPierre Morel #ifndef _S390X_STSI_H_ 9fcdc04e0SPierre Morel #define _S390X_STSI_H_ 10fcdc04e0SPierre Morel 11fcdc04e0SPierre Morel struct sysinfo_3_2_2 { 12fcdc04e0SPierre Morel uint8_t reserved[31]; 13fcdc04e0SPierre Morel uint8_t count; 14fcdc04e0SPierre Morel struct { 15fcdc04e0SPierre Morel uint8_t reserved2[4]; 16fcdc04e0SPierre Morel uint16_t total_cpus; 17fcdc04e0SPierre Morel uint16_t conf_cpus; 18fcdc04e0SPierre Morel uint16_t standby_cpus; 19fcdc04e0SPierre Morel uint16_t reserved_cpus; 20fcdc04e0SPierre Morel uint8_t name[8]; 21fcdc04e0SPierre Morel uint32_t caf; 22fcdc04e0SPierre Morel uint8_t cpi[16]; 23fcdc04e0SPierre Morel uint8_t reserved5[3]; 24fcdc04e0SPierre Morel uint8_t ext_name_encoding; 25fcdc04e0SPierre Morel uint32_t reserved3; 26fcdc04e0SPierre Morel uint8_t uuid[16]; 27fcdc04e0SPierre Morel } vm[8]; 28fcdc04e0SPierre Morel uint8_t reserved4[1504]; 29fcdc04e0SPierre Morel uint8_t ext_names[8][256]; 30fcdc04e0SPierre Morel }; 31fcdc04e0SPierre Morel 32*6f33f0b7SPierre Morel #define CPUS_TLE_RES_BITS 0x00fffffff8000000UL 33*6f33f0b7SPierre Morel struct topology_core { 34*6f33f0b7SPierre Morel uint8_t nl; 35*6f33f0b7SPierre Morel uint8_t reserved1[3]; 36*6f33f0b7SPierre Morel uint8_t reserved4:5; 37*6f33f0b7SPierre Morel uint8_t d:1; 38*6f33f0b7SPierre Morel uint8_t pp:2; 39*6f33f0b7SPierre Morel uint8_t type; 40*6f33f0b7SPierre Morel uint16_t origin; 41*6f33f0b7SPierre Morel uint64_t mask; 42*6f33f0b7SPierre Morel }; 43*6f33f0b7SPierre Morel 44*6f33f0b7SPierre Morel #define CONTAINER_TLE_RES_BITS 0x00ffffffffffff00UL 45*6f33f0b7SPierre Morel struct topology_container { 46*6f33f0b7SPierre Morel uint8_t nl; 47*6f33f0b7SPierre Morel uint8_t reserved[6]; 48*6f33f0b7SPierre Morel uint8_t id; 49*6f33f0b7SPierre Morel }; 50*6f33f0b7SPierre Morel 51*6f33f0b7SPierre Morel union topology_entry { 52*6f33f0b7SPierre Morel uint8_t nl; 53*6f33f0b7SPierre Morel struct topology_core cpu; 54*6f33f0b7SPierre Morel struct topology_container container; 55*6f33f0b7SPierre Morel }; 56*6f33f0b7SPierre Morel 57*6f33f0b7SPierre Morel #define CPU_TOPOLOGY_MAX_LEVEL 6 58*6f33f0b7SPierre Morel struct sysinfo_15_1_x { 59*6f33f0b7SPierre Morel uint8_t reserved0[2]; 60*6f33f0b7SPierre Morel uint16_t length; 61*6f33f0b7SPierre Morel uint8_t mag[CPU_TOPOLOGY_MAX_LEVEL]; 62*6f33f0b7SPierre Morel uint8_t reserved0a; 63*6f33f0b7SPierre Morel uint8_t mnest; 64*6f33f0b7SPierre Morel uint8_t reserved0c[4]; 65*6f33f0b7SPierre Morel union topology_entry tle[]; 66*6f33f0b7SPierre Morel }; 67*6f33f0b7SPierre Morel 68fcdc04e0SPierre Morel #endif /* _S390X_STSI_H_ */ 69