1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * s390x SCLP driver 4 * 5 * Copyright (c) 2017 Red Hat Inc 6 * 7 * Authors: 8 * David Hildenbrand <david@redhat.com> 9 */ 10 11 #include <libcflat.h> 12 #include <asm/page.h> 13 #include <asm/arch_def.h> 14 #include <asm/interrupt.h> 15 #include <asm/barrier.h> 16 #include <asm/spinlock.h> 17 #include "sclp.h" 18 #include <alloc_phys.h> 19 #include <alloc_page.h> 20 21 extern unsigned long stacktop; 22 23 static uint64_t storage_increment_size; 24 static uint64_t max_ram_size; 25 static uint64_t ram_size; 26 char _read_info[PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE))); 27 static ReadInfo *read_info; 28 struct sclp_facilities sclp_facilities; 29 30 char _sccb[PAGE_SIZE] __attribute__((__aligned__(4096))); 31 static volatile bool sclp_busy; 32 static struct spinlock sclp_lock; 33 34 static void mem_init(phys_addr_t mem_end) 35 { 36 phys_addr_t freemem_start = (phys_addr_t)&stacktop; 37 phys_addr_t base, top; 38 39 phys_alloc_init(freemem_start, mem_end - freemem_start); 40 phys_alloc_get_unused(&base, &top); 41 base = PAGE_ALIGN(base) >> PAGE_SHIFT; 42 top = top >> PAGE_SHIFT; 43 44 /* Make the pages available to the physical allocator */ 45 page_alloc_init_area(AREA_ANY_NUMBER, base, top); 46 page_alloc_ops_enable(); 47 } 48 49 void sclp_setup_int(void) 50 { 51 uint64_t mask; 52 53 ctl_set_bit(0, CTL0_SERVICE_SIGNAL); 54 55 mask = extract_psw_mask(); 56 mask |= PSW_MASK_EXT; 57 load_psw_mask(mask); 58 } 59 60 void sclp_handle_ext(void) 61 { 62 ctl_clear_bit(0, CTL0_SERVICE_SIGNAL); 63 spin_lock(&sclp_lock); 64 sclp_busy = false; 65 spin_unlock(&sclp_lock); 66 } 67 68 void sclp_wait_busy(void) 69 { 70 while (sclp_busy) 71 mb(); 72 } 73 74 void sclp_mark_busy(void) 75 { 76 /* 77 * With multiple CPUs we might need to wait for another CPU's 78 * request before grabbing the busy indication. 79 */ 80 while (true) { 81 sclp_wait_busy(); 82 spin_lock(&sclp_lock); 83 if (!sclp_busy) { 84 sclp_busy = true; 85 spin_unlock(&sclp_lock); 86 return; 87 } 88 spin_unlock(&sclp_lock); 89 } 90 } 91 92 static void sclp_read_scp_info(ReadInfo *ri, int length) 93 { 94 unsigned int commands[] = { SCLP_CMDW_READ_SCP_INFO_FORCED, 95 SCLP_CMDW_READ_SCP_INFO }; 96 int i, cc; 97 98 for (i = 0; i < ARRAY_SIZE(commands); i++) { 99 sclp_mark_busy(); 100 memset(&ri->h, 0, sizeof(ri->h)); 101 ri->h.length = length; 102 103 cc = sclp_service_call(commands[i], ri); 104 if (cc) 105 break; 106 if (ri->h.response_code == SCLP_RC_NORMAL_READ_COMPLETION) 107 return; 108 if (ri->h.response_code != SCLP_RC_INVALID_SCLP_COMMAND) 109 break; 110 } 111 report_abort("READ_SCP_INFO failed"); 112 } 113 114 void sclp_read_info(void) 115 { 116 sclp_read_scp_info((void *)_read_info, SCCB_SIZE); 117 read_info = (ReadInfo *)_read_info; 118 } 119 120 int sclp_get_cpu_num(void) 121 { 122 assert(read_info); 123 return read_info->entries_cpu; 124 } 125 126 CPUEntry *sclp_get_cpu_entries(void) 127 { 128 assert(read_info); 129 return (CPUEntry *)(_read_info + read_info->offset_cpu); 130 } 131 132 static bool sclp_feat_check(int byte, int bit) 133 { 134 uint8_t *rib = (uint8_t *)read_info; 135 136 return !!(rib[byte] & (0x80 >> bit)); 137 } 138 139 void sclp_facilities_setup(void) 140 { 141 unsigned short cpu0_addr = stap(); 142 CPUEntry *cpu; 143 int i; 144 145 assert(read_info); 146 147 cpu = sclp_get_cpu_entries(); 148 if (read_info->offset_cpu > 134) 149 sclp_facilities.has_diag318 = read_info->byte_134_diag318; 150 sclp_facilities.has_gsls = sclp_feat_check(85, SCLP_FEAT_85_BIT_GSLS); 151 sclp_facilities.has_kss = sclp_feat_check(98, SCLP_FEAT_98_BIT_KSS); 152 sclp_facilities.has_cmma = sclp_feat_check(116, SCLP_FEAT_116_BIT_CMMA); 153 sclp_facilities.has_64bscao = sclp_feat_check(116, SCLP_FEAT_116_BIT_64BSCAO); 154 sclp_facilities.has_esca = sclp_feat_check(116, SCLP_FEAT_116_BIT_ESCA); 155 sclp_facilities.has_ibs = sclp_feat_check(117, SCLP_FEAT_117_BIT_IBS); 156 sclp_facilities.has_pfmfi = sclp_feat_check(117, SCLP_FEAT_117_BIT_PFMFI); 157 158 for (i = 0; i < read_info->entries_cpu; i++, cpu++) { 159 /* 160 * The logic for only reading the facilities from the 161 * boot cpu comes from the kernel. I haven't yet found 162 * documentation that explains why this is necessary 163 * but I figure there's a reason behind doing it this 164 * way. 165 */ 166 if (cpu->address == cpu0_addr) { 167 sclp_facilities.has_sief2 = cpu->feat_sief2; 168 sclp_facilities.has_skeyi = cpu->feat_skeyi; 169 sclp_facilities.has_siif = cpu->feat_siif; 170 sclp_facilities.has_sigpif = cpu->feat_sigpif; 171 sclp_facilities.has_ib = cpu->feat_ib; 172 sclp_facilities.has_cei = cpu->feat_cei; 173 break; 174 } 175 } 176 } 177 178 /* Perform service call. Return 0 on success, non-zero otherwise. */ 179 int sclp_service_call(unsigned int command, void *sccb) 180 { 181 int cc; 182 183 sclp_setup_int(); 184 cc = servc(command, __pa(sccb)); 185 sclp_wait_busy(); 186 if (cc == 3) 187 return -1; 188 if (cc == 2) 189 return -1; 190 return 0; 191 } 192 193 void sclp_memory_setup(void) 194 { 195 uint64_t rnmax, rnsize; 196 int cc; 197 198 assert(read_info); 199 200 /* calculate the storage increment size */ 201 rnsize = read_info->rnsize; 202 if (!rnsize) { 203 rnsize = read_info->rnsize2; 204 } 205 storage_increment_size = rnsize << 20; 206 207 /* calculate the maximum memory size */ 208 rnmax = read_info->rnmax; 209 if (!rnmax) { 210 rnmax = read_info->rnmax2; 211 } 212 max_ram_size = rnmax * storage_increment_size; 213 214 /* lowcore is always accessible, so the first increment is accessible */ 215 ram_size = storage_increment_size; 216 217 /* probe for r/w memory up to max memory size */ 218 while (ram_size < max_ram_size) { 219 expect_pgm_int(); 220 cc = tprot(ram_size + storage_increment_size - 1, 0); 221 /* stop once we receive an exception or have protected memory */ 222 if (clear_pgm_int() || cc != 0) 223 break; 224 ram_size += storage_increment_size; 225 } 226 227 mem_init(ram_size); 228 } 229 230 uint64_t get_ram_size(void) 231 { 232 return ram_size; 233 } 234 235 uint64_t get_max_ram_size(void) 236 { 237 return max_ram_size; 238 } 239