1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * s390x interrupt handling 4 * 5 * Copyright (c) 2017 Red Hat Inc 6 * 7 * Authors: 8 * David Hildenbrand <david@redhat.com> 9 */ 10 #include <libcflat.h> 11 #include <asm/barrier.h> 12 #include <sclp.h> 13 #include <interrupt.h> 14 #include <sie.h> 15 #include <fault.h> 16 #include <asm/page.h> 17 18 static bool pgm_int_expected; 19 static bool ext_int_expected; 20 static void (*pgm_cleanup_func)(void); 21 static struct lowcore *lc; 22 23 void expect_pgm_int(void) 24 { 25 pgm_int_expected = true; 26 lc->pgm_int_code = 0; 27 lc->trans_exc_id = 0; 28 mb(); 29 } 30 31 void expect_ext_int(void) 32 { 33 ext_int_expected = true; 34 lc->ext_int_code = 0; 35 mb(); 36 } 37 38 uint16_t clear_pgm_int(void) 39 { 40 uint16_t code; 41 42 mb(); 43 code = lc->pgm_int_code; 44 lc->pgm_int_code = 0; 45 lc->trans_exc_id = 0; 46 pgm_int_expected = false; 47 return code; 48 } 49 50 void check_pgm_int_code(uint16_t code) 51 { 52 mb(); 53 report(code == lc->pgm_int_code, 54 "Program interrupt: expected(%d) == received(%d)", code, 55 lc->pgm_int_code); 56 } 57 58 void register_pgm_cleanup_func(void (*f)(void)) 59 { 60 pgm_cleanup_func = f; 61 } 62 63 static void fixup_pgm_int(struct stack_frame_int *stack) 64 { 65 /* If we have an error on SIE we directly move to sie_exit */ 66 if (lc->pgm_old_psw.addr >= (uint64_t)&sie_entry && 67 lc->pgm_old_psw.addr <= (uint64_t)&sie_exit) { 68 lc->pgm_old_psw.addr = (uint64_t)&sie_exit; 69 } 70 71 switch (lc->pgm_int_code) { 72 case PGM_INT_CODE_PRIVILEGED_OPERATION: 73 /* Normal operation is in supervisor state, so this exception 74 * was produced intentionally and we should return to the 75 * supervisor state. 76 */ 77 lc->pgm_old_psw.mask &= ~PSW_MASK_PSTATE; 78 break; 79 case PGM_INT_CODE_PROTECTION: 80 /* Handling for iep.c test case. */ 81 if (prot_is_iep(lc->trans_exc_id)) 82 /* 83 * We branched to the instruction that caused 84 * the exception so we can use the return 85 * address in GR14 to jump back and continue 86 * executing test code. 87 */ 88 lc->pgm_old_psw.addr = stack->grs0[12]; 89 break; 90 case PGM_INT_CODE_SEGMENT_TRANSLATION: 91 case PGM_INT_CODE_PAGE_TRANSLATION: 92 case PGM_INT_CODE_TRACE_TABLE: 93 case PGM_INT_CODE_AFX_TRANSLATION: 94 case PGM_INT_CODE_ASX_TRANSLATION: 95 case PGM_INT_CODE_LX_TRANSLATION: 96 case PGM_INT_CODE_EX_TRANSLATION: 97 case PGM_INT_CODE_PRIMARY_AUTHORITY: 98 case PGM_INT_CODE_SECONDARY_AUTHORITY: 99 case PGM_INT_CODE_LFX_TRANSLATION: 100 case PGM_INT_CODE_LSX_TRANSLATION: 101 case PGM_INT_CODE_ALEN_TRANSLATION: 102 case PGM_INT_CODE_ALE_SEQUENCE: 103 case PGM_INT_CODE_ASTE_VALIDITY: 104 case PGM_INT_CODE_ASTE_SEQUENCE: 105 case PGM_INT_CODE_EXTENDED_AUTHORITY: 106 case PGM_INT_CODE_LSTE_SEQUENCE: 107 case PGM_INT_CODE_ASTE_INSTANCE: 108 case PGM_INT_CODE_STACK_FULL: 109 case PGM_INT_CODE_STACK_EMPTY: 110 case PGM_INT_CODE_STACK_SPECIFICATION: 111 case PGM_INT_CODE_STACK_TYPE: 112 case PGM_INT_CODE_STACK_OPERATION: 113 case PGM_INT_CODE_ASCE_TYPE: 114 case PGM_INT_CODE_REGION_FIRST_TRANS: 115 case PGM_INT_CODE_REGION_SECOND_TRANS: 116 case PGM_INT_CODE_REGION_THIRD_TRANS: 117 case PGM_INT_CODE_PER: 118 case PGM_INT_CODE_CRYPTO_OPERATION: 119 case PGM_INT_CODE_SECURE_STOR_ACCESS: 120 case PGM_INT_CODE_NON_SECURE_STOR_ACCESS: 121 case PGM_INT_CODE_SECURE_STOR_VIOLATION: 122 /* The interrupt was nullified, the old PSW points at the 123 * responsible instruction. Forward the PSW so we don't loop. 124 */ 125 lc->pgm_old_psw.addr += lc->pgm_int_id; 126 } 127 /* suppressed/terminated/completed point already at the next address */ 128 } 129 130 static void print_storage_exception_information(void) 131 { 132 switch (lc->pgm_int_code) { 133 case PGM_INT_CODE_PROTECTION: 134 case PGM_INT_CODE_PAGE_TRANSLATION: 135 case PGM_INT_CODE_SEGMENT_TRANSLATION: 136 case PGM_INT_CODE_ASCE_TYPE: 137 case PGM_INT_CODE_REGION_FIRST_TRANS: 138 case PGM_INT_CODE_REGION_SECOND_TRANS: 139 case PGM_INT_CODE_REGION_THIRD_TRANS: 140 case PGM_INT_CODE_SECURE_STOR_ACCESS: 141 case PGM_INT_CODE_NON_SECURE_STOR_ACCESS: 142 case PGM_INT_CODE_SECURE_STOR_VIOLATION: 143 print_decode_teid(lc->trans_exc_id); 144 break; 145 } 146 } 147 148 static void print_int_regs(struct stack_frame_int *stack) 149 { 150 printf("\n"); 151 printf("GPRS:\n"); 152 printf("%016lx %016lx %016lx %016lx\n", 153 stack->grs1[0], stack->grs1[1], stack->grs0[0], stack->grs0[1]); 154 printf("%016lx %016lx %016lx %016lx\n", 155 stack->grs0[2], stack->grs0[3], stack->grs0[4], stack->grs0[5]); 156 printf("%016lx %016lx %016lx %016lx\n", 157 stack->grs0[6], stack->grs0[7], stack->grs0[8], stack->grs0[9]); 158 printf("%016lx %016lx %016lx %016lx\n", 159 stack->grs0[10], stack->grs0[11], stack->grs0[12], stack->grs0[13]); 160 printf("\n"); 161 } 162 163 static void print_pgm_info(struct stack_frame_int *stack) 164 165 { 166 bool in_sie; 167 168 in_sie = (lc->pgm_old_psw.addr >= (uintptr_t)sie_entry && 169 lc->pgm_old_psw.addr <= (uintptr_t)sie_exit); 170 171 printf("\n"); 172 printf("Unexpected program interrupt %s: %#x on cpu %d at %#lx, ilen %d\n", 173 in_sie ? "in SIE" : "", 174 lc->pgm_int_code, stap(), lc->pgm_old_psw.addr, lc->pgm_int_id); 175 print_int_regs(stack); 176 dump_stack(); 177 178 /* Dump stack doesn't end with a \n so we add it here instead */ 179 printf("\n"); 180 print_storage_exception_information(); 181 report_summary(); 182 abort(); 183 } 184 185 void handle_pgm_int(struct stack_frame_int *stack) 186 { 187 if (!pgm_int_expected) { 188 /* Force sclp_busy to false, otherwise we will loop forever */ 189 sclp_handle_ext(); 190 print_pgm_info(stack); 191 } 192 193 pgm_int_expected = false; 194 195 if (pgm_cleanup_func) 196 (*pgm_cleanup_func)(); 197 else 198 fixup_pgm_int(stack); 199 } 200 201 void handle_ext_int(struct stack_frame_int *stack) 202 { 203 if (!ext_int_expected && 204 lc->ext_int_code != EXT_IRQ_SERVICE_SIG) { 205 report_abort("Unexpected external call interrupt (code %#x): on cpu %d at %#lx", 206 lc->ext_int_code, stap(), lc->ext_old_psw.addr); 207 return; 208 } 209 210 if (lc->ext_int_code == EXT_IRQ_SERVICE_SIG) { 211 stack->crs[0] &= ~(1UL << 9); 212 sclp_handle_ext(); 213 } else { 214 ext_int_expected = false; 215 } 216 217 if (!(stack->crs[0] & CR0_EXTM_MASK)) 218 lc->ext_old_psw.mask &= ~PSW_MASK_EXT; 219 } 220 221 void handle_mcck_int(void) 222 { 223 report_abort("Unexpected machine check interrupt: on cpu %d at %#lx", 224 stap(), lc->mcck_old_psw.addr); 225 } 226 227 static void (*io_int_func)(void); 228 229 void handle_io_int(void) 230 { 231 if (io_int_func) 232 return io_int_func(); 233 234 report_abort("Unexpected io interrupt: on cpu %d at %#lx", 235 stap(), lc->io_old_psw.addr); 236 } 237 238 int register_io_int_func(void (*f)(void)) 239 { 240 if (io_int_func) 241 return -1; 242 io_int_func = f; 243 return 0; 244 } 245 246 int unregister_io_int_func(void (*f)(void)) 247 { 248 if (io_int_func != f) 249 return -1; 250 io_int_func = NULL; 251 return 0; 252 } 253 254 void handle_svc_int(void) 255 { 256 uint16_t code = lc->svc_int_code; 257 258 switch (code) { 259 case SVC_LEAVE_PSTATE: 260 lc->svc_old_psw.mask &= ~PSW_MASK_PSTATE; 261 break; 262 default: 263 report_abort("Unexpected supervisor call interrupt: code %#x on cpu %d at %#lx", 264 code, stap(), lc->svc_old_psw.addr); 265 } 266 } 267