1 /* 2 * Copyright (c) 2017 Red Hat Inc 3 * 4 * Authors: 5 * David Hildenbrand <david@redhat.com> 6 * 7 * This code is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU Library General Public License version 2. 9 */ 10 #include <libcflat.h> 11 #include <kbuild.h> 12 #include <asm/arch_def.h> 13 14 int main(void) 15 { 16 OFFSET(GEN_LC_EXT_INT_PARAM, lowcore, ext_int_param); 17 OFFSET(GEN_LC_CPU_ADDR, lowcore, cpu_addr); 18 OFFSET(GEN_LC_EXT_INT_CODE, lowcore, ext_int_code); 19 OFFSET(GEN_LC_SVC_INT_ID, lowcore, svc_int_id); 20 OFFSET(GEN_LC_SVC_INT_CODE, lowcore, svc_int_code); 21 OFFSET(GEN_LC_PGM_INT_ID, lowcore, pgm_int_id); 22 OFFSET(GEN_LC_PGM_INT_CODE, lowcore, pgm_int_code); 23 OFFSET(GEN_LC_DXC_VXC, lowcore, dxc_vxc); 24 OFFSET(GEN_LC_MON_CLASS_NB, lowcore, mon_class_nb); 25 OFFSET(GEN_LC_PER_CODE, lowcore, per_code); 26 OFFSET(GEN_LC_PER_ATMID, lowcore, per_atmid); 27 OFFSET(GEN_LC_PER_ADDR, lowcore, per_addr); 28 OFFSET(GEN_LC_EXC_ACC_ID, lowcore, exc_acc_id); 29 OFFSET(GEN_LC_PER_ACC_ID, lowcore, per_acc_id); 30 OFFSET(GEN_LC_OP_ACC_ID, lowcore, op_acc_id); 31 OFFSET(GEN_LC_ARCH_MODE_ID, lowcore, arch_mode_id); 32 OFFSET(GEN_LC_TRANS_EXC_ID, lowcore, trans_exc_id); 33 OFFSET(GEN_LC_MON_CODE, lowcore, mon_code); 34 OFFSET(GEN_LC_SUBSYS_ID_WORD, lowcore, subsys_id_word); 35 OFFSET(GEN_LC_IO_INT_PARAM, lowcore, io_int_param); 36 OFFSET(GEN_LC_IO_INT_WORD, lowcore, io_int_word); 37 OFFSET(GEN_LC_STFL, lowcore, stfl); 38 OFFSET(GEN_LC_MCCK_INT_CODE, lowcore, mcck_int_code); 39 OFFSET(GEN_LC_EXT_DAMAGE_CODE, lowcore, ext_damage_code); 40 OFFSET(GEN_LC_FAILING_STORAGE_ADDR, lowcore, failing_storage_addr); 41 OFFSET(GEN_LC_EMON_CA_ORIGIN, lowcore, emon_ca_origin); 42 OFFSET(GEN_LC_EMON_CA_SIZE, lowcore, emon_ca_size); 43 OFFSET(GEN_LC_EMON_EXC_COUNT, lowcore, emon_exc_count); 44 OFFSET(GEN_LC_BREAKING_EVENT_ADDR, lowcore, breaking_event_addr); 45 OFFSET(GEN_LC_RESTART_OLD_PSW, lowcore, restart_old_psw); 46 OFFSET(GEN_LC_EXT_OLD_PSW, lowcore, ext_old_psw); 47 OFFSET(GEN_LC_SVC_OLD_PSW, lowcore, svc_old_psw); 48 OFFSET(GEN_LC_PGM_OLD_PSW, lowcore, pgm_old_psw); 49 OFFSET(GEN_LC_MCCK_OLD_PSW, lowcore, mcck_old_psw); 50 OFFSET(GEN_LC_IO_OLD_PSW, lowcore, io_old_psw); 51 OFFSET(GEN_LC_RESTART_NEW_PSW, lowcore, restart_new_psw); 52 OFFSET(GEN_LC_EXT_NEW_PSW, lowcore, ext_new_psw); 53 OFFSET(GEN_LC_SVC_NEW_PSW, lowcore, svc_new_psw); 54 OFFSET(GEN_LC_PGM_NEW_PSW, lowcore, pgm_new_psw); 55 OFFSET(GEN_LC_MCCK_NEW_PSW, lowcore, mcck_new_psw); 56 OFFSET(GEN_LC_IO_NEW_PSW, lowcore, io_new_psw); 57 OFFSET(GEN_LC_SW_INT_GRS, lowcore, sw_int_grs); 58 OFFSET(GEN_LC_SW_INT_FPRS, lowcore, sw_int_fprs); 59 OFFSET(GEN_LC_SW_INT_FPC, lowcore, sw_int_fpc); 60 OFFSET(GEN_LC_MCCK_EXT_SA_ADDR, lowcore, mcck_ext_sa_addr); 61 OFFSET(GEN_LC_FPRS_SA, lowcore, fprs_sa); 62 OFFSET(GEN_LC_GRS_SA, lowcore, grs_sa); 63 OFFSET(GEN_LC_PSW_SA, lowcore, psw_sa); 64 OFFSET(GEN_LC_PREFIX_SA, lowcore, prefix_sa); 65 OFFSET(GEN_LC_FPC_SA, lowcore, fpc_sa); 66 OFFSET(GEN_LC_TOD_PR_SA, lowcore, tod_pr_sa); 67 OFFSET(GEN_LC_CPUTM_SA, lowcore, cputm_sa); 68 OFFSET(GEN_LC_CC_SA, lowcore, cc_sa); 69 OFFSET(GEN_LC_ARS_SA, lowcore, ars_sa); 70 OFFSET(GEN_LC_CRS_SA, lowcore, crs_sa); 71 OFFSET(GEN_LC_PGM_INT_TDB, lowcore, pgm_int_tdb); 72 73 return 0; 74 } 75