1*ad435a71SAndrew Jones /* SPDX-License-Identifier: GPL-2.0-only */ 2*ad435a71SAndrew Jones #ifndef _ASMRISCV_MMU_H_ 3*ad435a71SAndrew Jones #define _ASMRISCV_MMU_H_ 4*ad435a71SAndrew Jones #include <libcflat.h> 5*ad435a71SAndrew Jones #include <asm/csr.h> 6*ad435a71SAndrew Jones #include <asm/page.h> 7*ad435a71SAndrew Jones #include <asm/pgtable.h> 8*ad435a71SAndrew Jones 9*ad435a71SAndrew Jones static inline pgd_t *current_pgtable(void) 10*ad435a71SAndrew Jones { 11*ad435a71SAndrew Jones return (pgd_t *)((csr_read(CSR_SATP) & SATP_PPN) << PAGE_SHIFT); 12*ad435a71SAndrew Jones } 13*ad435a71SAndrew Jones 14*ad435a71SAndrew Jones void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset, 15*ad435a71SAndrew Jones phys_addr_t phys_start, phys_addr_t phys_end, 16*ad435a71SAndrew Jones pgprot_t prot, bool flush); 17*ad435a71SAndrew Jones void __mmu_enable(unsigned long satp); 18*ad435a71SAndrew Jones void mmu_enable(unsigned long mode, pgd_t *pgtable); 19*ad435a71SAndrew Jones void mmu_disable(void); 20*ad435a71SAndrew Jones 21*ad435a71SAndrew Jones void setup_mmu(void); 22*ad435a71SAndrew Jones 23*ad435a71SAndrew Jones static inline void local_flush_tlb_page(unsigned long addr) 24*ad435a71SAndrew Jones { 25*ad435a71SAndrew Jones asm volatile("sfence.vma %0" : : "r" (addr) : "memory"); 26*ad435a71SAndrew Jones } 27*ad435a71SAndrew Jones 28*ad435a71SAndrew Jones /* 29*ad435a71SAndrew Jones * Get the pte pointer for a virtual address, even if it's not mapped. 30*ad435a71SAndrew Jones * Constructs upper levels of the table as necessary. 31*ad435a71SAndrew Jones */ 32*ad435a71SAndrew Jones pte_t *get_pte(pgd_t *pgtable, uintptr_t vaddr); 33*ad435a71SAndrew Jones 34*ad435a71SAndrew Jones #endif /* _ASMRISCV_MMU_H_ */ 35