1 #ifndef _ASMPOWERPC_PPC_ASM_H 2 #define _ASMPOWERPC_PPC_ASM_H 3 4 #include <asm/asm-offsets.h> 5 6 #define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) 7 #define REST_GPR(n, base) ld n,GPR0+8*(n)(base) 8 9 #define LOAD_REG_IMMEDIATE(reg,expr) \ 10 lis reg,(expr)@highest; \ 11 ori reg,reg,(expr)@higher; \ 12 rldicr reg,reg,32,31; \ 13 oris reg,reg,(expr)@h; \ 14 ori reg,reg,(expr)@l; 15 16 #define LOAD_REG_ADDR(reg,name) \ 17 ld reg,name@got(r2) 18 19 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ 20 21 #define FIXUP_ENDIAN 22 23 #elif __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ 24 25 #define FIXUP_ENDIAN \ 26 .long 0x05000048; /* bl . + 4 */ \ 27 .long 0xa602487d; /* mflr r10 */ \ 28 .long 0x20004a39; /* addi r10,r10,32 */ \ 29 .long 0xa600607d; /* mfmsr r11 */ \ 30 .long 0x01006b69; /* xori r11,r11,1 */ \ 31 .long 0xa6035a7d; /* mtsrr0 r10 */ \ 32 .long 0xa6037b7d; /* mtsrr1 r11 */ \ 33 .long 0x2400004c; /* rfid */ \ 34 .long 0x00000048; /* b . */ \ 35 36 #endif /* __BYTE_ORDER__ */ 37 38 /* Machine State Register definitions: */ 39 #define MSR_SF_BIT 63 /* 64-bit mode */ 40 41 #endif /* _ASMPOWERPC_PPC_ASM_H */ 42