14764c05fSLaurent Vivier #ifndef _ASMPOWERPC_PPC_ASM_H 24764c05fSLaurent Vivier #define _ASMPOWERPC_PPC_ASM_H 34764c05fSLaurent Vivier 46842bc34SLaurent Vivier #include <asm/asm-offsets.h> 5*9c5e1913SNicholas Piggin #include <asm/reg.h> 66842bc34SLaurent Vivier 76842bc34SLaurent Vivier #define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) 86842bc34SLaurent Vivier #define REST_GPR(n, base) ld n,GPR0+8*(n)(base) 96842bc34SLaurent Vivier 104764c05fSLaurent Vivier #define LOAD_REG_IMMEDIATE(reg,expr) \ 114764c05fSLaurent Vivier lis reg,(expr)@highest; \ 124764c05fSLaurent Vivier ori reg,reg,(expr)@higher; \ 134764c05fSLaurent Vivier rldicr reg,reg,32,31; \ 144764c05fSLaurent Vivier oris reg,reg,(expr)@h; \ 154764c05fSLaurent Vivier ori reg,reg,(expr)@l; 164764c05fSLaurent Vivier 174764c05fSLaurent Vivier #define LOAD_REG_ADDR(reg,name) \ 184764c05fSLaurent Vivier ld reg,name@got(r2) 194764c05fSLaurent Vivier 20f1ccf5d2SLaurent Vivier #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ 21f1ccf5d2SLaurent Vivier 22f1ccf5d2SLaurent Vivier #define FIXUP_ENDIAN 23f1ccf5d2SLaurent Vivier 24f1ccf5d2SLaurent Vivier #elif __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ 25f1ccf5d2SLaurent Vivier 26f1ccf5d2SLaurent Vivier #define FIXUP_ENDIAN \ 27f1ccf5d2SLaurent Vivier .long 0x05000048; /* bl . + 4 */ \ 28f1ccf5d2SLaurent Vivier .long 0xa602487d; /* mflr r10 */ \ 29f1ccf5d2SLaurent Vivier .long 0x20004a39; /* addi r10,r10,32 */ \ 30f1ccf5d2SLaurent Vivier .long 0xa600607d; /* mfmsr r11 */ \ 31f1ccf5d2SLaurent Vivier .long 0x01006b69; /* xori r11,r11,1 */ \ 32f1ccf5d2SLaurent Vivier .long 0xa6035a7d; /* mtsrr0 r10 */ \ 33f1ccf5d2SLaurent Vivier .long 0xa6037b7d; /* mtsrr1 r11 */ \ 34f1ccf5d2SLaurent Vivier .long 0x2400004c; /* rfid */ \ 35f1ccf5d2SLaurent Vivier .long 0x00000048; /* b . */ \ 36f1ccf5d2SLaurent Vivier 37f1ccf5d2SLaurent Vivier #endif /* __BYTE_ORDER__ */ 38f1ccf5d2SLaurent Vivier 394764c05fSLaurent Vivier #endif /* _ASMPOWERPC_PPC_ASM_H */ 40