1 #ifndef PCI_H 2 #define PCI_H 3 /* 4 * API for scanning a PCI bus for a given device, as well to access 5 * BAR registers. 6 * 7 * Copyright (C) 2013, Red Hat Inc, Michael S. Tsirkin <mst@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU LGPL, version 2. 10 */ 11 #include "libcflat.h" 12 13 typedef uint16_t pcidevaddr_t; 14 enum { 15 PCIDEVADDR_INVALID = 0xffff, 16 }; 17 18 extern void pci_print(void); 19 extern bool pci_dev_exists(pcidevaddr_t dev); 20 extern pcidevaddr_t pci_find_dev(uint16_t vendor_id, uint16_t device_id); 21 22 /* 23 * @bar_num in all BAR access functions below is the index of the 32-bit 24 * register starting from the PCI_BASE_ADDRESS_0 offset. 25 * 26 * In cases where the BAR size is 64-bit, a caller should still provide 27 * @bar_num in terms of 32-bit words. For example, if a device has a 64-bit 28 * BAR#0 and a 32-bit BAR#1, then caller should provide 2 to address BAR#1, 29 * not 1. 30 * 31 * It is expected the caller is aware of the device BAR layout and never 32 * tries to address the middle of a 64-bit register. 33 */ 34 extern phys_addr_t pci_bar_get_addr(pcidevaddr_t dev, int bar_num); 35 extern void pci_bar_set_addr(pcidevaddr_t dev, int bar_num, phys_addr_t addr); 36 extern phys_addr_t pci_bar_size(pcidevaddr_t dev, int bar_num); 37 extern bool pci_bar_is64(pcidevaddr_t dev, int bar_num); 38 extern bool pci_bar_is_memory(pcidevaddr_t dev, int bar_num); 39 extern bool pci_bar_is_valid(pcidevaddr_t dev, int bar_num); 40 41 /* 42 * pci-testdev is a driver for the pci-testdev qemu pci device. The 43 * device enables testing mmio and portio exits, and measuring their 44 * speed. 45 */ 46 #define PCI_VENDOR_ID_REDHAT 0x1b36 47 #define PCI_DEVICE_ID_REDHAT_TEST 0x0005 48 49 #define PCI_TESTDEV_NUM_BARS 2 50 51 struct pci_test_dev_hdr { 52 uint8_t test; 53 uint8_t width; 54 uint8_t pad0[2]; 55 uint32_t offset; 56 uint32_t data; 57 uint32_t count; 58 uint8_t name[]; 59 }; 60 61 #define PCI_HEADER_TYPE_MASK 0x7f 62 63 #endif /* PCI_H */ 64