1 #ifndef PCI_H 2 #define PCI_H 3 /* 4 * API for scanning a PCI bus for a given device, as well to access 5 * BAR registers. 6 * 7 * Copyright (C) 2013, Red Hat Inc, Michael S. Tsirkin <mst@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU LGPL, version 2. 10 */ 11 #include "libcflat.h" 12 13 typedef uint16_t pcidevaddr_t; 14 enum { 15 PCIDEVADDR_INVALID = 0xffff, 16 }; 17 18 #define PCI_BAR_NUM 6 19 #define PCI_DEVFN_MAX 256 20 21 #define PCI_BDF_GET_DEVFN(x) ((x) & 0xff) 22 #define PCI_BDF_GET_BUS(x) (((x) >> 8) & 0xff) 23 24 struct pci_dev { 25 uint16_t bdf; 26 uint16_t msi_offset; 27 phys_addr_t resource[PCI_BAR_NUM]; 28 }; 29 30 extern void pci_dev_init(struct pci_dev *dev, pcidevaddr_t bdf); 31 extern void pci_scan_bars(struct pci_dev *dev); 32 extern void pci_cmd_set_clr(struct pci_dev *dev, uint16_t set, uint16_t clr); 33 extern void pci_cap_walk(struct pci_dev *dev); 34 extern void pci_enable_defaults(struct pci_dev *dev); 35 extern bool pci_setup_msi(struct pci_dev *dev, uint64_t msi_addr, 36 uint32_t msi_data); 37 38 typedef phys_addr_t iova_t; 39 40 extern bool pci_probe(void); 41 extern void pci_print(void); 42 extern bool pci_dev_exists(pcidevaddr_t dev); 43 extern pcidevaddr_t pci_find_dev(uint16_t vendor_id, uint16_t device_id); 44 45 /* 46 * @bar_num in all BAR access functions below is the index of the 32-bit 47 * register starting from the PCI_BASE_ADDRESS_0 offset. 48 * 49 * In cases where the BAR size is 64-bit, a caller should still provide 50 * @bar_num in terms of 32-bit words. For example, if a device has a 64-bit 51 * BAR#0 and a 32-bit BAR#1, then caller should provide 2 to address BAR#1, 52 * not 1. 53 * 54 * It is expected the caller is aware of the device BAR layout and never 55 * tries to address the middle of a 64-bit register. 56 */ 57 extern phys_addr_t pci_bar_get_addr(struct pci_dev *dev, int bar_num); 58 extern void pci_bar_set_addr(struct pci_dev *dev, int bar_num, phys_addr_t addr); 59 extern phys_addr_t pci_bar_size(struct pci_dev *dev, int bar_num); 60 extern uint32_t pci_bar_get(struct pci_dev *dev, int bar_num); 61 extern uint32_t pci_bar_mask(uint32_t bar); 62 extern bool pci_bar_is64(struct pci_dev *dev, int bar_num); 63 extern bool pci_bar_is_memory(struct pci_dev *dev, int bar_num); 64 extern bool pci_bar_is_valid(struct pci_dev *dev, int bar_num); 65 extern void pci_bar_print(struct pci_dev *dev, int bar_num); 66 extern void pci_dev_print_id(pcidevaddr_t dev); 67 68 extern int pci_testdev(void); 69 70 /* 71 * pci-testdev is a driver for the pci-testdev qemu pci device. The 72 * device enables testing mmio and portio exits, and measuring their 73 * speed. 74 */ 75 #define PCI_VENDOR_ID_REDHAT 0x1b36 76 #define PCI_DEVICE_ID_REDHAT_TEST 0x0005 77 78 /* 79 * pci-testdev supports at least three types of tests (via mmio and 80 * portio BARs): no-eventfd, wildcard-eventfd and datamatch-eventfd 81 */ 82 #define PCI_TESTDEV_BAR_MEM 0 83 #define PCI_TESTDEV_BAR_IO 1 84 #define PCI_TESTDEV_NUM_BARS 2 85 #define PCI_TESTDEV_NUM_TESTS 3 86 87 struct pci_test_dev_hdr { 88 uint8_t test; 89 uint8_t width; 90 uint8_t pad0[2]; 91 uint32_t offset; 92 uint32_t data; 93 uint32_t count; 94 uint8_t name[]; 95 }; 96 97 #define PCI_HEADER_TYPE_MASK 0x7f 98 99 #endif /* PCI_H */ 100