xref: /kvm-unit-tests/lib/pci.h (revision 33d78b078aa03e2e42d4a7477609085b6a5ec95c)
1 #ifndef PCI_H
2 #define PCI_H
3 /*
4  * API for scanning a PCI bus for a given device, as well to access
5  * BAR registers.
6  *
7  * Copyright (C) 2013, Red Hat Inc, Michael S. Tsirkin <mst@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU LGPL, version 2.
10  */
11 #include "libcflat.h"
12 
13 typedef uint16_t pcidevaddr_t;
14 enum {
15 	PCIDEVADDR_INVALID = 0xffff,
16 };
17 
18 extern bool pci_probe(void);
19 extern void pci_print(void);
20 extern bool pci_dev_exists(pcidevaddr_t dev);
21 extern pcidevaddr_t pci_find_dev(uint16_t vendor_id, uint16_t device_id);
22 
23 /*
24  * @bar_num in all BAR access functions below is the index of the 32-bit
25  * register starting from the PCI_BASE_ADDRESS_0 offset.
26  *
27  * In cases where the BAR size is 64-bit, a caller should still provide
28  * @bar_num in terms of 32-bit words. For example, if a device has a 64-bit
29  * BAR#0 and a 32-bit BAR#1, then caller should provide 2 to address BAR#1,
30  * not 1.
31  *
32  * It is expected the caller is aware of the device BAR layout and never
33  * tries to address the middle of a 64-bit register.
34  */
35 extern phys_addr_t pci_bar_get_addr(pcidevaddr_t dev, int bar_num);
36 extern void pci_bar_set_addr(pcidevaddr_t dev, int bar_num, phys_addr_t addr);
37 extern phys_addr_t pci_bar_size(pcidevaddr_t dev, int bar_num);
38 extern uint32_t pci_bar_get(pcidevaddr_t dev, int bar_num);
39 extern uint32_t pci_bar_mask(uint32_t bar);
40 extern bool pci_bar_is64(pcidevaddr_t dev, int bar_num);
41 extern bool pci_bar_is_memory(pcidevaddr_t dev, int bar_num);
42 extern bool pci_bar_is_valid(pcidevaddr_t dev, int bar_num);
43 extern void pci_bar_print(pcidevaddr_t dev, int bar_num);
44 extern void pci_dev_print_id(pcidevaddr_t dev);
45 
46 /*
47  * pci-testdev is a driver for the pci-testdev qemu pci device. The
48  * device enables testing mmio and portio exits, and measuring their
49  * speed.
50  */
51 #define PCI_VENDOR_ID_REDHAT		0x1b36
52 #define PCI_DEVICE_ID_REDHAT_TEST	0x0005
53 
54 #define PCI_TESTDEV_NUM_BARS		2
55 
56 struct pci_test_dev_hdr {
57 	uint8_t  test;
58 	uint8_t  width;
59 	uint8_t  pad0[2];
60 	uint32_t offset;
61 	uint32_t data;
62 	uint32_t count;
63 	uint8_t  name[];
64 };
65 
66 #define  PCI_HEADER_TYPE_MASK		0x7f
67 
68 #endif /* PCI_H */
69