1*7f2a26cdSPeter Xu /* 2*7f2a26cdSPeter Xu * Edu PCI device header. 3*7f2a26cdSPeter Xu * 4*7f2a26cdSPeter Xu * Copyright (C) 2016 Red Hat, Inc. 5*7f2a26cdSPeter Xu * 6*7f2a26cdSPeter Xu * Authors: 7*7f2a26cdSPeter Xu * Peter Xu <peterx@redhat.com>, 8*7f2a26cdSPeter Xu * 9*7f2a26cdSPeter Xu * This work is licensed under the terms of the GNU LGPL, version 2 or 10*7f2a26cdSPeter Xu * later. 11*7f2a26cdSPeter Xu * 12*7f2a26cdSPeter Xu * Edu device is a virtualized device in QEMU. Please refer to 13*7f2a26cdSPeter Xu * docs/specs/edu.txt in QEMU repository for EDU device manual. 14*7f2a26cdSPeter Xu */ 15*7f2a26cdSPeter Xu #ifndef __PCI_EDU_H__ 16*7f2a26cdSPeter Xu #define __PCI_EDU_H__ 17*7f2a26cdSPeter Xu 18*7f2a26cdSPeter Xu #include "pci.h" 19*7f2a26cdSPeter Xu #include "asm/io.h" 20*7f2a26cdSPeter Xu 21*7f2a26cdSPeter Xu #define PCI_VENDOR_ID_QEMU 0x1234 22*7f2a26cdSPeter Xu #define PCI_DEVICE_ID_EDU 0x11e8 23*7f2a26cdSPeter Xu 24*7f2a26cdSPeter Xu /* The only bar used by EDU device */ 25*7f2a26cdSPeter Xu #define EDU_BAR 0 26*7f2a26cdSPeter Xu #define EDU_MAGIC 0xed 27*7f2a26cdSPeter Xu #define EDU_VERSION 0x100 28*7f2a26cdSPeter Xu #define EDU_DMA_BUF_SIZE (1 << 20) 29*7f2a26cdSPeter Xu #define EDU_INPUT_BUF_SIZE 256 30*7f2a26cdSPeter Xu 31*7f2a26cdSPeter Xu #define EDU_REG_ID 0x0 32*7f2a26cdSPeter Xu #define EDU_REG_ALIVE 0x4 33*7f2a26cdSPeter Xu #define EDU_REG_FACTORIAL 0x8 34*7f2a26cdSPeter Xu #define EDU_REG_STATUS 0x20 35*7f2a26cdSPeter Xu #define EDU_REG_DMA_SRC 0x80 36*7f2a26cdSPeter Xu #define EDU_REG_DMA_DST 0x88 37*7f2a26cdSPeter Xu #define EDU_REG_DMA_COUNT 0x90 38*7f2a26cdSPeter Xu #define EDU_REG_DMA_CMD 0x98 39*7f2a26cdSPeter Xu 40*7f2a26cdSPeter Xu #define EDU_CMD_DMA_START 0x01 41*7f2a26cdSPeter Xu #define EDU_CMD_DMA_FROM 0x02 42*7f2a26cdSPeter Xu #define EDU_CMD_DMA_TO 0x00 43*7f2a26cdSPeter Xu 44*7f2a26cdSPeter Xu #define EDU_STATUS_FACTORIAL 0x1 45*7f2a26cdSPeter Xu #define EDU_STATUS_INT_ENABLE 0x80 46*7f2a26cdSPeter Xu 47*7f2a26cdSPeter Xu #define EDU_DMA_START 0x40000 48*7f2a26cdSPeter Xu #define EDU_DMA_SIZE_MAX 4096 49*7f2a26cdSPeter Xu 50*7f2a26cdSPeter Xu struct pci_edu_dev { 51*7f2a26cdSPeter Xu struct pci_dev pci_dev; 52*7f2a26cdSPeter Xu volatile void *reg_base; 53*7f2a26cdSPeter Xu }; 54*7f2a26cdSPeter Xu 55*7f2a26cdSPeter Xu #define edu_reg(d, r) (volatile void *)((d)->reg_base + (r)) 56*7f2a26cdSPeter Xu 57*7f2a26cdSPeter Xu static inline uint64_t edu_reg_readq(struct pci_edu_dev *dev, int reg) 58*7f2a26cdSPeter Xu { 59*7f2a26cdSPeter Xu return __raw_readq(edu_reg(dev, reg)); 60*7f2a26cdSPeter Xu } 61*7f2a26cdSPeter Xu 62*7f2a26cdSPeter Xu static inline uint32_t edu_reg_readl(struct pci_edu_dev *dev, int reg) 63*7f2a26cdSPeter Xu { 64*7f2a26cdSPeter Xu return __raw_readl(edu_reg(dev, reg)); 65*7f2a26cdSPeter Xu } 66*7f2a26cdSPeter Xu 67*7f2a26cdSPeter Xu static inline void edu_reg_writeq(struct pci_edu_dev *dev, int reg, 68*7f2a26cdSPeter Xu uint64_t val) 69*7f2a26cdSPeter Xu { 70*7f2a26cdSPeter Xu __raw_writeq(val, edu_reg(dev, reg)); 71*7f2a26cdSPeter Xu } 72*7f2a26cdSPeter Xu 73*7f2a26cdSPeter Xu static inline void edu_reg_writel(struct pci_edu_dev *dev, int reg, 74*7f2a26cdSPeter Xu uint32_t val) 75*7f2a26cdSPeter Xu { 76*7f2a26cdSPeter Xu __raw_writel(val, edu_reg(dev, reg)); 77*7f2a26cdSPeter Xu } 78*7f2a26cdSPeter Xu 79*7f2a26cdSPeter Xu bool edu_init(struct pci_edu_dev *dev); 80*7f2a26cdSPeter Xu void edu_dma(struct pci_edu_dev *dev, iova_t iova, 81*7f2a26cdSPeter Xu size_t size, unsigned int dev_offset, bool from_device); 82*7f2a26cdSPeter Xu 83*7f2a26cdSPeter Xu #endif 84