1 #ifndef _ASM_GENERIC_IO_H_ 2 #define _ASM_GENERIC_IO_H_ 3 /* 4 * asm-generic/io.h 5 * adapted from the Linux kernel's include/asm-generic/io.h 6 * and arch/arm/include/asm/io.h 7 * 8 * Copyright (C) 2017, Red Hat Inc, Andrew Jones <drjones@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. 11 */ 12 #include "libcflat.h" 13 #include "asm/page.h" 14 #include "asm/barrier.h" 15 16 #ifndef __raw_readb 17 static inline u8 __raw_readb(const volatile void *addr) 18 { 19 return *(const volatile u8 *)addr; 20 } 21 #endif 22 23 #ifndef __raw_readw 24 static inline u16 __raw_readw(const volatile void *addr) 25 { 26 return *(const volatile u16 *)addr; 27 } 28 #endif 29 30 #ifndef __raw_readl 31 static inline u32 __raw_readl(const volatile void *addr) 32 { 33 return *(const volatile u32 *)addr; 34 } 35 #endif 36 37 #ifndef __raw_readq 38 static inline u64 __raw_readq(const volatile void *addr) 39 { 40 assert(sizeof(unsigned long) == sizeof(u64)); 41 return *(const volatile u64 *)addr; 42 } 43 #endif 44 45 #ifndef __raw_writeb 46 static inline void __raw_writeb(u8 b, volatile void *addr) 47 { 48 *(volatile u8 *)addr = b; 49 } 50 #endif 51 52 #ifndef __raw_writew 53 static inline void __raw_writew(u16 b, volatile void *addr) 54 { 55 *(volatile u16 *)addr = b; 56 } 57 #endif 58 59 #ifndef __raw_writel 60 static inline void __raw_writel(u32 b, volatile void *addr) 61 { 62 *(volatile u32 *)addr = b; 63 } 64 #endif 65 66 #ifndef __raw_writeq 67 static inline void __raw_writeq(u64 b, volatile void *addr) 68 { 69 assert(sizeof(unsigned long) == sizeof(u64)); 70 *(volatile u64 *)addr = b; 71 } 72 #endif 73 74 #ifndef __bswap16 75 static inline u16 __bswap16(u16 x) 76 { 77 return ((x >> 8) & 0xff) | ((x & 0xff) << 8); 78 } 79 #endif 80 81 #ifndef __bswap32 82 static inline u32 __bswap32(u32 x) 83 { 84 return ((x & 0xff000000) >> 24) | ((x & 0x00ff0000) >> 8) | 85 ((x & 0x0000ff00) << 8) | ((x & 0x000000ff) << 24); 86 } 87 #endif 88 89 #ifndef __bswap64 90 static inline u64 __bswap64(u64 x) 91 { 92 return ((x & 0x00000000000000ffULL) << 56) | 93 ((x & 0x000000000000ff00ULL) << 40) | 94 ((x & 0x0000000000ff0000ULL) << 24) | 95 ((x & 0x00000000ff000000ULL) << 8) | 96 ((x & 0x000000ff00000000ULL) >> 8) | 97 ((x & 0x0000ff0000000000ULL) >> 24) | 98 ((x & 0x00ff000000000000ULL) >> 40) | 99 ((x & 0xff00000000000000ULL) >> 56); 100 } 101 #endif 102 103 #ifndef __cpu_is_be 104 #define __cpu_is_be() (0) 105 #endif 106 107 #define le16_to_cpu(x) \ 108 ({ u16 __r = __cpu_is_be() ? __bswap16(x) : ((u16)x); __r; }) 109 #define cpu_to_le16 le16_to_cpu 110 111 #define le32_to_cpu(x) \ 112 ({ u32 __r = __cpu_is_be() ? __bswap32(x) : ((u32)x); __r; }) 113 #define cpu_to_le32 le32_to_cpu 114 115 #define le64_to_cpu(x) \ 116 ({ u64 __r = __cpu_is_be() ? __bswap64(x) : ((u64)x); __r; }) 117 #define cpu_to_le64 le64_to_cpu 118 119 #define be16_to_cpu(x) \ 120 ({ u16 __r = !__cpu_is_be() ? __bswap16(x) : ((u16)x); __r; }) 121 #define cpu_to_be16 be16_to_cpu 122 123 #define be32_to_cpu(x) \ 124 ({ u32 __r = !__cpu_is_be() ? __bswap32(x) : ((u32)x); __r; }) 125 #define cpu_to_be32 be32_to_cpu 126 127 #define be64_to_cpu(x) \ 128 ({ u64 __r = !__cpu_is_be() ? __bswap64(x) : ((u64)x); __r; }) 129 #define cpu_to_be64 be64_to_cpu 130 131 #define readb(addr) \ 132 ({ u8 __r = __raw_readb(addr); rmb(); __r; }) 133 #define readw(addr) \ 134 ({ u16 __r = le16_to_cpu(__raw_readw(addr)); rmb(); __r; }) 135 #define readl(addr) \ 136 ({ u32 __r = le32_to_cpu(__raw_readl(addr)); rmb(); __r; }) 137 #define readq(addr) \ 138 ({ u64 __r = le64_to_cpu(__raw_readq(addr)); rmb(); __r; }) 139 140 #define writeb(b, addr) \ 141 ({ wmb(); __raw_writeb(b, addr); }) 142 #define writew(b, addr) \ 143 ({ wmb(); __raw_writew(cpu_to_le16(b), addr); }) 144 #define writel(b, addr) \ 145 ({ wmb(); __raw_writel(cpu_to_le32(b), addr); }) 146 #define writeq(b, addr) \ 147 ({ wmb(); __raw_writeq(cpu_to_le64(b), addr); }) 148 149 #ifndef inb 150 static inline uint8_t inb(unsigned long port) 151 { 152 return readb((const volatile void __iomem *)port); 153 } 154 #endif 155 156 #ifndef inw 157 static inline uint16_t inw(unsigned long port) 158 { 159 return readw((const volatile void __iomem *)port); 160 } 161 #endif 162 163 #ifndef inl 164 static inline uint32_t inl(unsigned long port) 165 { 166 return readl((const volatile void __iomem *)port); 167 } 168 #endif 169 170 #ifndef outb 171 static inline void outb(uint8_t value, unsigned long port) 172 { 173 writeb(value, (volatile void __iomem *)port); 174 } 175 #endif 176 177 #ifndef outw 178 static inline void outw(uint16_t value, unsigned long port) 179 { 180 writew(value, (volatile void __iomem *)port); 181 } 182 #endif 183 184 #ifndef outl 185 static inline void outl(uint32_t value, unsigned long port) 186 { 187 writel(value, (volatile void __iomem *)port); 188 } 189 #endif 190 191 #ifndef ioremap 192 static inline void __iomem *ioremap(phys_addr_t phys_addr, size_t size __unused) 193 { 194 assert(sizeof(long) == 8 || !(phys_addr >> 32)); 195 return (void __iomem *)(unsigned long)phys_addr; 196 } 197 #endif 198 199 #ifndef virt_to_phys 200 static inline unsigned long virt_to_phys(volatile void *address) 201 { 202 return __pa((unsigned long)address); 203 } 204 #endif 205 206 #ifndef phys_to_virt 207 static inline void *phys_to_virt(unsigned long address) 208 { 209 return __va(address); 210 } 211 #endif 212 213 #endif /* _ASM_GENERIC_IO_H_ */ 214