xref: /kvm-unit-tests/lib/arm64/asm/sysreg.h (revision c7ca23ce3f571449a58dd8ef86c953e865f9c3f1)
192fca209SWei Huang /*
292fca209SWei Huang  * Ripped off from arch/arm64/include/asm/sysreg.h
392fca209SWei Huang  *
492fca209SWei Huang  * Copyright (C) 2016, Red Hat Inc, Andrew Jones <drjones@redhat.com>
592fca209SWei Huang  *
692fca209SWei Huang  * This work is licensed under the terms of the GNU LGPL, version 2.
792fca209SWei Huang  */
892fca209SWei Huang #ifndef _ASMARM64_SYSREG_H_
992fca209SWei Huang #define _ASMARM64_SYSREG_H_
1092fca209SWei Huang 
1191a6c3ceSAndrew Jones #define sys_reg(op0, op1, crn, crm, op2) \
1291a6c3ceSAndrew Jones 	((((op0)&3)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))
1391a6c3ceSAndrew Jones 
1491a6c3ceSAndrew Jones #ifdef __ASSEMBLY__
1591a6c3ceSAndrew Jones 	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
1691a6c3ceSAndrew Jones 	.equ	.L__reg_num_x\num, \num
1791a6c3ceSAndrew Jones 	.endr
1891a6c3ceSAndrew Jones 	.equ	.L__reg_num_xzr, 31
1991a6c3ceSAndrew Jones 
2091a6c3ceSAndrew Jones 	.macro	mrs_s, rt, sreg
2191a6c3ceSAndrew Jones 	.inst	0xd5200000|(\sreg)|(.L__reg_num_\rt)
2291a6c3ceSAndrew Jones 	.endm
2391a6c3ceSAndrew Jones 
2491a6c3ceSAndrew Jones 	.macro	msr_s, sreg, rt
2591a6c3ceSAndrew Jones 	.inst	0xd5000000|(\sreg)|(.L__reg_num_\rt)
2691a6c3ceSAndrew Jones 	.endm
2791a6c3ceSAndrew Jones #else
2892fca209SWei Huang #include <libcflat.h>
2992fca209SWei Huang 
3092fca209SWei Huang #define read_sysreg(r) ({					\
3192fca209SWei Huang 	u64 __val;						\
3292fca209SWei Huang 	asm volatile("mrs %0, " xstr(r) : "=r" (__val));	\
3392fca209SWei Huang 	__val;							\
3492fca209SWei Huang })
3592fca209SWei Huang 
3692fca209SWei Huang #define write_sysreg(v, r) do {					\
3792fca209SWei Huang 	u64 __val = (u64)v;					\
3892fca209SWei Huang 	asm volatile("msr " xstr(r) ", %x0" : : "rZ" (__val));	\
3992fca209SWei Huang } while (0)
4092fca209SWei Huang 
41*c7ca23ceSAndrew Jones #define read_sysreg_s(r) ({					\
42*c7ca23ceSAndrew Jones 	u64 __val;						\
43*c7ca23ceSAndrew Jones 	asm volatile("mrs_s %0, " xstr(r) : "=r" (__val));	\
44*c7ca23ceSAndrew Jones 	__val;							\
45*c7ca23ceSAndrew Jones })
46*c7ca23ceSAndrew Jones 
47*c7ca23ceSAndrew Jones #define write_sysreg_s(v, r) do {				\
48*c7ca23ceSAndrew Jones 	u64 __val = (u64)v;					\
49*c7ca23ceSAndrew Jones 	asm volatile("msr_s " xstr(r) ", %x0" : : "rZ" (__val));\
50*c7ca23ceSAndrew Jones } while (0)
51*c7ca23ceSAndrew Jones 
5291a6c3ceSAndrew Jones asm(
5391a6c3ceSAndrew Jones "	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n"
5491a6c3ceSAndrew Jones "	.equ	.L__reg_num_x\\num, \\num\n"
5591a6c3ceSAndrew Jones "	.endr\n"
5691a6c3ceSAndrew Jones "	.equ	.L__reg_num_xzr, 31\n"
5791a6c3ceSAndrew Jones "\n"
5891a6c3ceSAndrew Jones "	.macro	mrs_s, rt, sreg\n"
5991a6c3ceSAndrew Jones "	.inst	0xd5200000|(\\sreg)|(.L__reg_num_\\rt)\n"
6091a6c3ceSAndrew Jones "	.endm\n"
6191a6c3ceSAndrew Jones "\n"
6291a6c3ceSAndrew Jones "	.macro	msr_s, sreg, rt\n"
6391a6c3ceSAndrew Jones "	.inst	0xd5000000|(\\sreg)|(.L__reg_num_\\rt)\n"
6491a6c3ceSAndrew Jones "	.endm\n"
6591a6c3ceSAndrew Jones );
6691a6c3ceSAndrew Jones #endif /* __ASSEMBLY__ */
6792fca209SWei Huang #endif /* _ASMARM64_SYSREG_H_ */
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