1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Based on the file arch/arm64/include/asm/assembled.h from Linux v5.10, which 4 * in turn is based on arch/arm/include/asm/assembler.h and 5 * arch/arm/mm/proc-macros.S 6 * 7 * Copyright (C) 1996-2000 Russell King 8 * Copyright (C) 2012 ARM Ltd. 9 */ 10 11 #ifndef __ASSEMBLY__ 12 #error "Only include this from assembly code" 13 #endif 14 15 #ifndef _ASMARM64_ASSEMBLER_H_ 16 #define _ASMARM64_ASSEMBLER_H_ 17 18 /* 19 * raw_dcache_line_size - get the minimum D-cache line size on this CPU 20 * from the CTR register. 21 */ 22 .macro raw_dcache_line_size, reg, tmp 23 mrs \tmp, ctr_el0 // read CTR 24 ubfx \tmp, \tmp, #16, #4 // cache line size encoding 25 mov \reg, #4 // bytes per word 26 lsl \reg, \reg, \tmp // actual cache line size 27 .endm 28 29 /* 30 * Macro to perform a data cache maintenance for the interval 31 * [addr, addr + size). Use the raw value for the dcache line size because 32 * kvm-unit-tests has no concept of scheduling. 33 * 34 * op: operation passed to dc instruction 35 * domain: domain used in dsb instruciton 36 * addr: starting virtual address of the region 37 * size: size of the region 38 * Corrupts: addr, size, tmp1, tmp2 39 */ 40 41 .macro dcache_by_line_op op, domain, addr, size, tmp1, tmp2 42 raw_dcache_line_size \tmp1, \tmp2 43 add \size, \addr, \size 44 sub \tmp2, \tmp1, #1 45 bic \addr, \addr, \tmp2 46 9998: 47 dc \op, \addr 48 add \addr, \addr, \tmp1 49 cmp \addr, \size 50 b.lo 9998b 51 dsb \domain 52 .endm 53 54 #endif /* _ASMARM64_ASSEMBLER_H_ */ 55