1 #ifndef _ASMARM_CP15_H_ 2 #define _ASMARM_CP15_H_ 3 /* 4 * From the Linux kernel arch/arm/include/asm/cp15.h 5 * 6 * CR1 bits (CP#15 CR1) 7 */ 8 #define CR_M (1 << 0) /* MMU enable */ 9 #define CR_A (1 << 1) /* Alignment abort enable */ 10 #define CR_C (1 << 2) /* Dcache enable */ 11 #define CR_W (1 << 3) /* Write buffer enable */ 12 #define CR_P (1 << 4) /* 32-bit exception handler */ 13 #define CR_D (1 << 5) /* 32-bit data address range */ 14 #define CR_L (1 << 6) /* Implementation defined */ 15 #define CR_B (1 << 7) /* Big endian */ 16 #define CR_S (1 << 8) /* System MMU protection */ 17 #define CR_R (1 << 9) /* ROM MMU protection */ 18 #define CR_F (1 << 10) /* Implementation defined */ 19 #define CR_Z (1 << 11) /* Implementation defined */ 20 #define CR_I (1 << 12) /* Icache enable */ 21 #define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */ 22 #define CR_RR (1 << 14) /* Round Robin cache replacement */ 23 #define CR_L4 (1 << 15) /* LDR pc can set T bit */ 24 #define CR_DT (1 << 16) 25 #define CR_HA (1 << 17) /* Hardware management of Access Flag */ 26 #define CR_IT (1 << 18) 27 #define CR_ST (1 << 19) 28 #define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */ 29 #define CR_U (1 << 22) /* Unaligned access operation */ 30 #define CR_XP (1 << 23) /* Extended page tables */ 31 #define CR_VE (1 << 24) /* Vectored interrupts */ 32 #define CR_EE (1 << 25) /* Exception (Big) Endian */ 33 #define CR_TRE (1 << 28) /* TEX remap enable */ 34 #define CR_AFE (1 << 29) /* Access flag enable */ 35 #define CR_TE (1 << 30) /* Thumb exception enable */ 36 37 #endif /* _ASMARM_CP15_H_ */ 38