1 #ifndef _ASMARM_PTRACE_H_ 2 #define _ASMARM_PTRACE_H_ 3 /* 4 * Adapted from Linux kernel headers 5 * arch/arm/include/asm/ptrace.h 6 * arch/arm/include/uapi/asm/ptrace.h 7 */ 8 9 /* 10 * PSR bits 11 */ 12 #define USR_MODE 0x00000010 13 #define SVC_MODE 0x00000013 14 #define FIQ_MODE 0x00000011 15 #define IRQ_MODE 0x00000012 16 #define ABT_MODE 0x00000017 17 #define HYP_MODE 0x0000001a 18 #define UND_MODE 0x0000001b 19 #define SYSTEM_MODE 0x0000001f 20 #define MODE32_BIT 0x00000010 21 #define MODE_MASK 0x0000001f 22 23 #define PSR_T_BIT 0x00000020 /* >= V4T, but not V7M */ 24 #define PSR_F_BIT 0x00000040 /* >= V4, but not V7M */ 25 #define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */ 26 #define PSR_A_BIT 0x00000100 /* >= V6, but not V7M */ 27 #define PSR_E_BIT 0x00000200 /* >= V6, but not V7M */ 28 #define PSR_J_BIT 0x01000000 /* >= V5J, but not V7M */ 29 #define PSR_Q_BIT 0x08000000 /* >= V5E, including V7M */ 30 #define PSR_V_BIT 0x10000000 31 #define PSR_C_BIT 0x20000000 32 #define PSR_Z_BIT 0x40000000 33 #define PSR_N_BIT 0x80000000 34 35 /* 36 * Groups of PSR bits 37 */ 38 #define PSR_f 0xff000000 /* Flags */ 39 #define PSR_s 0x00ff0000 /* Status */ 40 #define PSR_x 0x0000ff00 /* Extension */ 41 #define PSR_c 0x000000ff /* Control */ 42 43 /* 44 * ARMv7 groups of PSR bits 45 */ 46 #define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */ 47 #define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */ 48 #define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 49 #define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */ 50 51 #ifndef __ASSEMBLY__ 52 #include "libcflat.h" 53 54 struct pt_regs { 55 unsigned long uregs[18]; 56 }; 57 58 #define ARM_cpsr uregs[16] 59 #define ARM_pc uregs[15] 60 #define ARM_lr uregs[14] 61 #define ARM_sp uregs[13] 62 #define ARM_ip uregs[12] 63 #define ARM_fp uregs[11] 64 #define ARM_r10 uregs[10] 65 #define ARM_r9 uregs[9] 66 #define ARM_r8 uregs[8] 67 #define ARM_r7 uregs[7] 68 #define ARM_r6 uregs[6] 69 #define ARM_r5 uregs[5] 70 #define ARM_r4 uregs[4] 71 #define ARM_r3 uregs[3] 72 #define ARM_r2 uregs[2] 73 #define ARM_r1 uregs[1] 74 #define ARM_r0 uregs[0] 75 #define ARM_ORIG_r0 uregs[17] 76 77 #define user_mode(regs) \ 78 (((regs)->ARM_cpsr & 0xf) == 0) 79 80 #define processor_mode(regs) \ 81 ((regs)->ARM_cpsr & MODE_MASK) 82 83 #define interrupts_enabled(regs) \ 84 (!((regs)->ARM_cpsr & PSR_I_BIT)) 85 86 #define fast_interrupts_enabled(regs) \ 87 (!((regs)->ARM_cpsr & PSR_F_BIT)) 88 89 #define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0)) 90 91 static inline unsigned long regs_get_register(struct pt_regs *regs, 92 unsigned int offset) 93 { 94 if (offset > MAX_REG_OFFSET) 95 return 0; 96 return *(unsigned long *)((unsigned long)regs + offset); 97 } 98 99 #endif /* !__ASSEMBLY__ */ 100 #endif /* _ASMARM_PTRACE_H_ */ 101