xref: /kvm-unit-tests/lib/arm/asm/gic.h (revision 00d7e26501263263877465d2a74a330897de1e70)
100cc96f0SAndrew Jones /*
200cc96f0SAndrew Jones  * Copyright (C) 2016, Red Hat Inc, Andrew Jones <drjones@redhat.com>
300cc96f0SAndrew Jones  *
400cc96f0SAndrew Jones  * This work is licensed under the terms of the GNU LGPL, version 2.
500cc96f0SAndrew Jones  */
600cc96f0SAndrew Jones #ifndef _ASMARM_GIC_H_
700cc96f0SAndrew Jones #define _ASMARM_GIC_H_
800cc96f0SAndrew Jones 
978ad7e95SAndre Przywara #define GIC_NR_PRIVATE_IRQS		32
1078ad7e95SAndre Przywara #define GIC_FIRST_SPI			GIC_NR_PRIVATE_IRQS
1100cc96f0SAndrew Jones 
1200cc96f0SAndrew Jones /* Distributor registers */
1300cc96f0SAndrew Jones #define GICD_CTLR			0x0000
1400cc96f0SAndrew Jones #define GICD_TYPER			0x0004
1578ad7e95SAndre Przywara #define GICD_IIDR			0x0008
1691a6c3ceSAndrew Jones #define GICD_IGROUPR			0x0080
1700cc96f0SAndrew Jones #define GICD_ISENABLER			0x0100
18f2f220deSAlexander Graf #define GICD_ISPENDR			0x0200
19f2f220deSAlexander Graf #define GICD_ICPENDR			0x0280
20c152d8bcSChristoffer Dall #define GICD_ISACTIVER			0x0300
21c152d8bcSChristoffer Dall #define GICD_ICACTIVER			0x0380
2200cc96f0SAndrew Jones #define GICD_IPRIORITYR			0x0400
23fe572a5eSAndre Przywara #define GICD_ITARGETSR			0x0800
24ac4a67b6SAndrew Jones #define GICD_SGIR			0x0f00
2578ad7e95SAndre Przywara #define GICD_ICPIDR2			0x0fe8
2600cc96f0SAndrew Jones 
2700cc96f0SAndrew Jones #define GICD_TYPER_IRQS(typer)		((((typer) & 0x1f) + 1) * 32)
2800cc96f0SAndrew Jones #define GICD_INT_EN_SET_SGI		0x0000ffff
2900cc96f0SAndrew Jones #define GICD_INT_DEF_PRI_X4		0xa0a0a0a0
3000cc96f0SAndrew Jones 
3100cc96f0SAndrew Jones /* CPU interface registers */
3200cc96f0SAndrew Jones #define GICC_CTLR			0x0000
3300cc96f0SAndrew Jones #define GICC_PMR			0x0004
34ac4a67b6SAndrew Jones #define GICC_IAR			0x000c
35ac4a67b6SAndrew Jones #define GICC_EOIR			0x0010
3600cc96f0SAndrew Jones 
3700cc96f0SAndrew Jones #define GICC_INT_PRI_THRESHOLD		0xf0
38ac4a67b6SAndrew Jones #define GICC_INT_SPURIOUS		0x3ff
3900cc96f0SAndrew Jones 
4091a6c3ceSAndrew Jones #include <asm/gic-v2.h>
4191a6c3ceSAndrew Jones #include <asm/gic-v3.h>
4291a6c3ceSAndrew Jones 
43f2f220deSAlexander Graf #define PPI(irq)			((irq) + 16)
44*00d7e265SAlexander Graf #define SPI(irq)			((irq) + GIC_FIRST_SPI)
45f2f220deSAlexander Graf 
4600cc96f0SAndrew Jones #ifndef __ASSEMBLY__
472e2d471dSAndrew Jones #include <asm/cpumask.h>
4800cc96f0SAndrew Jones 
4900cc96f0SAndrew Jones /*
5000cc96f0SAndrew Jones  * gic_init will try to find all known gics, and then
5100cc96f0SAndrew Jones  * initialize the gic data for the one found.
5200cc96f0SAndrew Jones  * returns
5300cc96f0SAndrew Jones  *  0   : no gic was found
5400cc96f0SAndrew Jones  *  > 0 : the gic version of the gic found
5500cc96f0SAndrew Jones  */
5600cc96f0SAndrew Jones extern int gic_init(void);
5700cc96f0SAndrew Jones 
582e2d471dSAndrew Jones /*
592e2d471dSAndrew Jones  * gic_enable_defaults enables the gic with basic but useful
602e2d471dSAndrew Jones  * settings. gic_enable_defaults will call gic_init if it has
612e2d471dSAndrew Jones  * not yet been invoked.
622e2d471dSAndrew Jones  */
632e2d471dSAndrew Jones extern void gic_enable_defaults(void);
642e2d471dSAndrew Jones 
652e2d471dSAndrew Jones /*
662e2d471dSAndrew Jones  * After enabling the gic with gic_enable_defaults the functions
672e2d471dSAndrew Jones  * below will work with any supported gic version.
682e2d471dSAndrew Jones  */
692e2d471dSAndrew Jones extern int gic_version(void);
702e2d471dSAndrew Jones extern u32 gic_read_iar(void);
712e2d471dSAndrew Jones extern u32 gic_iar_irqnr(u32 iar);
722e2d471dSAndrew Jones extern void gic_write_eoir(u32 irqstat);
732e2d471dSAndrew Jones extern void gic_ipi_send_single(int irq, int cpu);
742e2d471dSAndrew Jones extern void gic_ipi_send_mask(int irq, const cpumask_t *dest);
752e2d471dSAndrew Jones 
7600cc96f0SAndrew Jones #endif /* !__ASSEMBLY__ */
7700cc96f0SAndrew Jones #endif /* _ASMARM_GIC_H_ */
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