1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Based on several files from Linux version v5.10: arch/arm/mm/proc-macros.S, 4 * arch/arm/mm/proc-v7.S. 5 */ 6 7 #ifndef __ASSEMBLY__ 8 #error "Only include this from assembly code" 9 #endif 10 11 #ifndef __ASM_ASSEMBLER_H 12 #define __ASM_ASSEMBLER_H 13 14 /* 15 * dcache_line_size - get the minimum D-cache line size from the CTR register 16 * on ARMv7. 17 */ 18 .macro dcache_line_size, reg, tmp 19 mrc p15, 0, \tmp, c0, c0, 1 // read ctr 20 lsr \tmp, \tmp, #16 21 and \tmp, \tmp, #0xf // cache line size encoding 22 mov \reg, #4 // bytes per word 23 mov \reg, \reg, lsl \tmp // actual cache line size 24 .endm 25 26 /* 27 * Macro to perform a data cache maintenance for the interval 28 * [addr, addr + size). 29 * 30 * op: operation to execute 31 * domain domain used in the dsb instruction 32 * addr: starting virtual address of the region 33 * size: size of the region 34 * Corrupts: addr, size, tmp1, tmp2 35 */ 36 .macro dcache_by_line_op op, domain, addr, size, tmp1, tmp2 37 dcache_line_size \tmp1, \tmp2 38 add \size, \addr, \size 39 sub \tmp2, \tmp1, #1 40 bic \addr, \addr, \tmp2 41 9998: 42 .ifc \op, dccimvac 43 mcr p15, 0, \addr, c7, c14, 1 44 .else 45 .err 46 .endif 47 add \addr, \addr, \tmp1 48 cmp \addr, \size 49 blo 9998b 50 dsb \domain 51 .endm 52 53 #endif /* __ASM_ASSEMBLER_H */ 54