191a6c3ceSAndrew Jones /* 291a6c3ceSAndrew Jones * All ripped off from arch/arm/include/asm/arch_gicv3.h 391a6c3ceSAndrew Jones * 491a6c3ceSAndrew Jones * Copyright (C) 2016, Red Hat Inc, Andrew Jones <drjones@redhat.com> 591a6c3ceSAndrew Jones * 691a6c3ceSAndrew Jones * This work is licensed under the terms of the GNU LGPL, version 2. 791a6c3ceSAndrew Jones */ 891a6c3ceSAndrew Jones #ifndef _ASMARM_ARCH_GICV3_H_ 991a6c3ceSAndrew Jones #define _ASMARM_ARCH_GICV3_H_ 1091a6c3ceSAndrew Jones 1191a6c3ceSAndrew Jones #ifndef __ASSEMBLY__ 1291a6c3ceSAndrew Jones #include <libcflat.h> 1391a6c3ceSAndrew Jones #include <asm/sysreg.h> 1491a6c3ceSAndrew Jones #include <asm/barrier.h> 1591a6c3ceSAndrew Jones #include <asm/io.h> 1691a6c3ceSAndrew Jones 1791a6c3ceSAndrew Jones #define ICC_PMR __ACCESS_CP15(c4, 0, c6, 0) 18*2e2d471dSAndrew Jones #define ICC_SGI1R __ACCESS_CP15_64(0, c12) 19*2e2d471dSAndrew Jones #define ICC_IAR1 __ACCESS_CP15(c12, 0, c12, 0) 20*2e2d471dSAndrew Jones #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1) 2191a6c3ceSAndrew Jones #define ICC_IGRPEN1 __ACCESS_CP15(c12, 0, c12, 7) 2291a6c3ceSAndrew Jones 2391a6c3ceSAndrew Jones static inline void gicv3_write_pmr(u32 val) 2491a6c3ceSAndrew Jones { 2591a6c3ceSAndrew Jones write_sysreg(val, ICC_PMR); 2691a6c3ceSAndrew Jones } 2791a6c3ceSAndrew Jones 28*2e2d471dSAndrew Jones static inline void gicv3_write_sgi1r(u64 val) 29*2e2d471dSAndrew Jones { 30*2e2d471dSAndrew Jones write_sysreg(val, ICC_SGI1R); 31*2e2d471dSAndrew Jones } 32*2e2d471dSAndrew Jones 33*2e2d471dSAndrew Jones static inline u32 gicv3_read_iar(void) 34*2e2d471dSAndrew Jones { 35*2e2d471dSAndrew Jones u32 irqstat = read_sysreg(ICC_IAR1); 36*2e2d471dSAndrew Jones dsb(sy); 37*2e2d471dSAndrew Jones return irqstat; 38*2e2d471dSAndrew Jones } 39*2e2d471dSAndrew Jones 40*2e2d471dSAndrew Jones static inline void gicv3_write_eoir(u32 irq) 41*2e2d471dSAndrew Jones { 42*2e2d471dSAndrew Jones write_sysreg(irq, ICC_EOIR1); 43*2e2d471dSAndrew Jones isb(); 44*2e2d471dSAndrew Jones } 45*2e2d471dSAndrew Jones 4691a6c3ceSAndrew Jones static inline void gicv3_write_grpen1(u32 val) 4791a6c3ceSAndrew Jones { 4891a6c3ceSAndrew Jones write_sysreg(val, ICC_IGRPEN1); 4991a6c3ceSAndrew Jones isb(); 5091a6c3ceSAndrew Jones } 5191a6c3ceSAndrew Jones 5291a6c3ceSAndrew Jones /* 5391a6c3ceSAndrew Jones * We may access GICR_TYPER and GITS_TYPER by reading both the TYPER 5491a6c3ceSAndrew Jones * offset and the following offset (+ 4) and then combining them to 5591a6c3ceSAndrew Jones * form a 64-bit address. 5691a6c3ceSAndrew Jones */ 5791a6c3ceSAndrew Jones static inline u64 gicv3_read_typer(const volatile void __iomem *addr) 5891a6c3ceSAndrew Jones { 5991a6c3ceSAndrew Jones u64 val = readl(addr); 6091a6c3ceSAndrew Jones val |= (u64)readl(addr + 4) << 32; 6191a6c3ceSAndrew Jones return val; 6291a6c3ceSAndrew Jones } 6391a6c3ceSAndrew Jones 6491a6c3ceSAndrew Jones #endif /* !__ASSEMBLY__ */ 6591a6c3ceSAndrew Jones #endif /* _ASMARM_ARCH_GICV3_H_ */ 66