1 // Copyright © 2020 Intel Corporation 2 // 3 // SPDX-License-Identifier: Apache-2.0 4 // 5 6 use serde::{Deserialize, Serialize}; 7 8 mod bus; 9 pub mod dma_mapping; 10 pub mod interrupt; 11 12 pub use self::bus::{Bus, BusDevice, Error as BusError}; 13 14 /// Type of Message Signalled Interrupt 15 #[derive(Copy, Clone, Debug, PartialEq, Eq, Serialize, Deserialize)] 16 pub enum MsiIrqType { 17 /// PCI MSI IRQ numbers. 18 PciMsi, 19 /// PCI MSIx IRQ numbers. 20 PciMsix, 21 /// Generic MSI IRQ numbers. 22 GenericMsi, 23 } 24 25 #[derive(Copy, Clone, PartialEq, Eq, Serialize, Deserialize, Debug)] 26 pub enum PciBarType { 27 Io, 28 Mmio32, 29 Mmio64, 30 } 31 32 /// Enumeration for device resources. 33 #[allow(missing_docs)] 34 #[derive(Clone, Debug, Serialize, Deserialize)] 35 pub enum Resource { 36 /// IO Port address range. 37 PioAddressRange { base: u16, size: u16 }, 38 /// Memory Mapped IO address range. 39 MmioAddressRange { base: u64, size: u64 }, 40 /// PCI BAR 41 PciBar { 42 index: usize, 43 base: u64, 44 size: u64, 45 type_: PciBarType, 46 prefetchable: bool, 47 }, 48 /// Legacy IRQ number. 49 LegacyIrq(u32), 50 /// Message Signaled Interrupt 51 MsiIrq { 52 ty: MsiIrqType, 53 base: u32, 54 size: u32, 55 }, 56 /// Network Interface Card MAC address. 57 MacAddress(String), 58 /// KVM memslot index. 59 KvmMemSlot(u32), 60 } 61