xref: /cloud-hypervisor/vm-device/src/lib.rs (revision 954f3dd057a61ec84107d0e893565f66167f6bd2)
115025d71SRob Bradford // Copyright © 2020 Intel Corporation
215025d71SRob Bradford //
315025d71SRob Bradford // SPDX-License-Identifier: Apache-2.0
415025d71SRob Bradford //
515025d71SRob Bradford 
63a0429c9SMaksym Pavlenko use serde::{Deserialize, Serialize};
7664431ffSSamuel Ortiz 
815025d71SRob Bradford mod bus;
95bd05b1aSSebastien Boeuf pub mod dma_mapping;
1011d4d57cSSebastien Boeuf pub mod interrupt;
1111d4d57cSSebastien Boeuf 
12*954f3dd0SYuanchu Xie pub use self::bus::{Bus, BusDevice, BusDeviceSync, Error as BusError};
1315025d71SRob Bradford 
145c3f4dbeSJosh Soref /// Type of Message Signalled Interrupt
152716bc33SRob Bradford #[derive(Copy, Clone, Debug, PartialEq, Eq, Serialize, Deserialize)]
16a6fde0bbSSebastien Boeuf pub enum MsiIrqType {
17a6fde0bbSSebastien Boeuf     /// PCI MSI IRQ numbers.
18a6fde0bbSSebastien Boeuf     PciMsi,
19a6fde0bbSSebastien Boeuf     /// PCI MSIx IRQ numbers.
20a6fde0bbSSebastien Boeuf     PciMsix,
21a6fde0bbSSebastien Boeuf     /// Generic MSI IRQ numbers.
22a6fde0bbSSebastien Boeuf     GenericMsi,
23a6fde0bbSSebastien Boeuf }
24a6fde0bbSSebastien Boeuf 
252716bc33SRob Bradford #[derive(Copy, Clone, PartialEq, Eq, Serialize, Deserialize, Debug)]
2611e9f433SSebastien Boeuf pub enum PciBarType {
2711e9f433SSebastien Boeuf     Io,
2811e9f433SSebastien Boeuf     Mmio32,
2911e9f433SSebastien Boeuf     Mmio64,
3011e9f433SSebastien Boeuf }
3111e9f433SSebastien Boeuf 
32a6fde0bbSSebastien Boeuf /// Enumeration for device resources.
33a6fde0bbSSebastien Boeuf #[allow(missing_docs)]
34987f8215SSebastien Boeuf #[derive(Clone, Debug, Serialize, Deserialize)]
35a6fde0bbSSebastien Boeuf pub enum Resource {
36a6fde0bbSSebastien Boeuf     /// IO Port address range.
37a6fde0bbSSebastien Boeuf     PioAddressRange { base: u16, size: u16 },
38a6fde0bbSSebastien Boeuf     /// Memory Mapped IO address range.
39a6fde0bbSSebastien Boeuf     MmioAddressRange { base: u64, size: u64 },
4011e9f433SSebastien Boeuf     /// PCI BAR
4111e9f433SSebastien Boeuf     PciBar {
4211e9f433SSebastien Boeuf         index: usize,
4311e9f433SSebastien Boeuf         base: u64,
4411e9f433SSebastien Boeuf         size: u64,
4511e9f433SSebastien Boeuf         type_: PciBarType,
4611e9f433SSebastien Boeuf         prefetchable: bool,
4711e9f433SSebastien Boeuf     },
48a6fde0bbSSebastien Boeuf     /// Legacy IRQ number.
49a6fde0bbSSebastien Boeuf     LegacyIrq(u32),
50a6fde0bbSSebastien Boeuf     /// Message Signaled Interrupt
51a6fde0bbSSebastien Boeuf     MsiIrq {
52a6fde0bbSSebastien Boeuf         ty: MsiIrqType,
53a6fde0bbSSebastien Boeuf         base: u32,
54a6fde0bbSSebastien Boeuf         size: u32,
55a6fde0bbSSebastien Boeuf     },
56a6fde0bbSSebastien Boeuf     /// Network Interface Card MAC address.
57a6fde0bbSSebastien Boeuf     MacAddress(String),
58a6fde0bbSSebastien Boeuf     /// KVM memslot index.
59a6fde0bbSSebastien Boeuf     KvmMemSlot(u32),
60a6fde0bbSSebastien Boeuf }
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