1 // Copyright 2018 The Chromium OS Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE-BSD-3-Clause file. 4 5 //! Implements pci devices and busses. 6 #[macro_use] 7 extern crate log; 8 9 mod bus; 10 mod configuration; 11 mod device; 12 mod msi; 13 mod msix; 14 mod vfio; 15 16 pub use self::bus::{PciBus, PciConfigIo, PciConfigMmio, PciRoot, PciRootError}; 17 pub use self::configuration::{ 18 PciBarConfiguration, PciBarPrefetchable, PciBarRegionType, PciCapability, PciCapabilityId, 19 PciClassCode, PciConfiguration, PciHeaderType, PciMassStorageSubclass, 20 PciNetworkControllerSubclass, PciProgrammingInterface, PciSerialBusSubClass, PciSubclass, 21 }; 22 pub use self::device::{ 23 BarReprogrammingParams, DeviceRelocation, Error as PciDeviceError, PciDevice, 24 }; 25 pub use self::msi::{msi_num_enabled_vectors, MsiCap, MsiConfig}; 26 pub use self::msix::{MsixCap, MsixConfig, MsixTableEntry, MSIX_TABLE_ENTRY_SIZE}; 27 pub use self::vfio::{VfioPciDevice, VfioPciError}; 28 29 /// PCI has four interrupt pins A->D. 30 #[derive(Copy, Clone)] 31 pub enum PciInterruptPin { 32 IntA, 33 IntB, 34 IntC, 35 IntD, 36 } 37 38 impl PciInterruptPin { 39 pub fn to_mask(self) -> u32 { 40 self as u32 41 } 42 } 43