xref: /cloud-hypervisor/hypervisor/src/mshv/aarch64/gic/mod.rs (revision 38380198e1660348e54cc69a6355bcd1f92e8cae)
1 // SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
2 //
3 // Copyright © 2025, Microsoft Corporation
4 //
5 use std::any::Any;
6 
7 use serde::{Deserialize, Serialize};
8 
9 use crate::arch::aarch64::gic::{GicState, Result, Vgic, VgicConfig};
10 use crate::{CpuState, Vm};
11 
12 pub struct MshvGicV2M {
13     /// GIC distributor address
14     pub dist_addr: u64,
15 
16     /// GIC distributor size
17     pub dist_size: u64,
18 
19     /// GIC re-distributors address
20     pub redists_addr: u64,
21 
22     /// GIC re-distributors size
23     pub redists_size: u64,
24 
25     /// GITS translator address
26     pub gits_addr: u64,
27 
28     /// GITS translator size
29     pub gits_size: u64,
30 
31     /// Number of CPUs handled by the device
32     pub vcpu_count: u64,
33 }
34 
35 pub const BASE_SPI_IRQ: u32 = 32;
36 
37 #[derive(Clone, Default, Serialize, Deserialize)]
38 pub struct MshvGicV2MState {}
39 
40 impl From<GicState> for MshvGicV2MState {
41     fn from(state: GicState) -> Self {
42         match state {
43             GicState::MshvGicV2M(state) => state,
44             /* Needed in case other hypervisors are enabled */
45             #[allow(unreachable_patterns)]
46             _ => panic!("GicState is not valid"),
47         }
48     }
49 }
50 
51 impl From<MshvGicV2MState> for GicState {
52     fn from(state: MshvGicV2MState) -> Self {
53         GicState::MshvGicV2M(state)
54     }
55 }
56 
57 impl MshvGicV2M {
58     /// Create a new GICv2m device
59     pub fn new(_vm: &dyn Vm, config: VgicConfig) -> Result<MshvGicV2M> {
60         let gic_device = MshvGicV2M {
61             dist_addr: config.dist_addr,
62             dist_size: config.dist_size,
63             redists_addr: config.redists_addr,
64             redists_size: config.redists_size,
65             gits_addr: config.msi_addr,
66             gits_size: config.msi_size,
67             vcpu_count: config.vcpu_count,
68         };
69         Ok(gic_device)
70     }
71 }
72 
73 impl Vgic for MshvGicV2M {
74     fn fdt_compatibility(&self) -> &str {
75         "arm,gic-v3"
76     }
77 
78     fn msi_compatible(&self) -> bool {
79         true
80     }
81 
82     fn msi_compatibility(&self) -> &str {
83         "arm,gic-v2m-frame"
84     }
85 
86     fn fdt_maint_irq(&self) -> u32 {
87         0
88     }
89 
90     fn vcpu_count(&self) -> u64 {
91         self.vcpu_count
92     }
93 
94     fn msi_properties(&self) -> [u64; 2] {
95         [self.gits_addr, self.gits_size]
96     }
97 
98     fn device_properties(&self) -> [u64; 4] {
99         [
100             self.dist_addr,
101             self.dist_size,
102             self.redists_addr,
103             self.redists_size,
104         ]
105     }
106 
107     fn set_gicr_typers(&mut self, _vcpu_states: &[CpuState]) {
108         unimplemented!()
109     }
110 
111     fn state(&self) -> Result<GicState> {
112         unimplemented!()
113     }
114 
115     fn as_any_concrete_mut(&mut self) -> &mut dyn Any {
116         self
117     }
118 
119     fn set_state(&mut self, _state: &GicState) -> Result<()> {
120         unimplemented!()
121     }
122 
123     fn save_data_tables(&self) -> Result<()> {
124         unimplemented!()
125     }
126 }
127