xref: /cloud-hypervisor/arch/src/aarch64/layout.rs (revision 7d7bfb2034001d4cb15df2ddc56d2d350c8da30f)
1 // Copyright 2020 Arm Limited (or its affiliates). All rights reserved.
2 // Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 //
6 // Memory layout of AArch64 guest:
7 //
8 // Physical  +---------------------------------------------------------------+
9 // address   |                                                               |
10 // end       |                                                               |
11 //           ~                   ~                       ~                   ~
12 //           |                                                               |
13 //           |                      Highmem PCI MMIO space                   |
14 //           |                                                               |
15 // RAM end   +---------------------------------------------------------------+
16 // (dynamic, |                                                               |
17 // including |                                                               |
18 // hotplug   ~                   ~                       ~                   ~
19 // memory)   |                                                               |
20 //           |                            DRAM                               |
21 //           |                                                               |
22 //           |                                                               |
23 // 4GB       +---------------------------------------------------------------+
24 //           |                      32-bit devices hole                      |
25 // 4GB-64M   +---------------------------------------------------------------+
26 //           |                                                               |
27 //           |                                                               |
28 //           |                            DRAM                               |
29 //           |                                                               |
30 //           |                                                               |
31 // 1GB       +---------------------------------------------------------------+
32 //           |                                                               |
33 //           |                        PCI MMCONFIG space                     |
34 //           |                                                               |
35 // 768 M     +---------------------------------------------------------------+
36 //           |                                                               |
37 //           |                                                               |
38 //           |                           PCI MMIO space                      |
39 //           |                                                               |
40 // 256 M     +---------------------------------------------------------------|
41 //           |                                                               |
42 //           |                        Legacy devices space                   |
43 //           |                                                               |
44 // 144 M     +---------------------------------------------------------------|
45 //           |                    Reserved (now GIC is here)                 |
46 // 64  M     +---------------------------------------------------------------+
47 //           |                                                               |
48 //           |                          UEFI space                           |
49 //           |                                                               |
50 // 0GB       +---------------------------------------------------------------+
51 //
52 //
53 
54 use vm_memory::GuestAddress;
55 
56 /// 0x0 ~ 0x40_0000 (4 MiB) is reserved to UEFI
57 /// UEFI binary size is required less than 3 MiB, reserving 4 MiB is enough.
58 pub const UEFI_START: GuestAddress = GuestAddress(0);
59 pub const UEFI_SIZE: u64 = 0x040_0000;
60 
61 /// Below this address will reside the GIC, above this address will reside the MMIO devices.
62 pub const MAPPED_IO_START: GuestAddress = GuestAddress(0x0900_0000);
63 
64 /// See kernel file arch/arm64/include/uapi/asm/kvm.h for the GIC related definitions.
65 /// 0x08ff_0000 ~ 0x0900_0000 is reserved for GICv3 Distributor
66 pub const GIC_V3_DIST_SIZE: u64 = 0x01_0000;
67 pub const GIC_V3_DIST_START: GuestAddress = GuestAddress(MAPPED_IO_START.0 - GIC_V3_DIST_SIZE);
68 /// Below 0x08ff_0000 is reserved for GICv3 Redistributor.
69 /// The size defined here is for each vcpu.
70 /// The total size is 'number_of_vcpu * GIC_V3_REDIST_SIZE'
71 pub const GIC_V3_REDIST_SIZE: u64 = 0x02_0000;
72 /// Below Redistributor area is GICv3 ITS
73 pub const GIC_V3_ITS_SIZE: u64 = 0x02_0000;
74 
75 /// Space 0x0900_0000 ~ 0x0905_0000 is reserved for legacy devices.
76 pub const LEGACY_SERIAL_MAPPED_IO_START: GuestAddress = GuestAddress(0x0900_0000);
77 pub const LEGACY_RTC_MAPPED_IO_START: GuestAddress = GuestAddress(0x0901_0000);
78 pub const LEGACY_GPIO_MAPPED_IO_START: GuestAddress = GuestAddress(0x0902_0000);
79 
80 /// Space 0x0905_0000 ~ 0x0906_0000 is reserved for pcie io address
81 pub const MEM_PCI_IO_START: GuestAddress = GuestAddress(0x0905_0000);
82 pub const MEM_PCI_IO_SIZE: u64 = 0x10000;
83 
84 /// Starting from 0x1000_0000 (256MiB) to 0x3000_0000 (768MiB) is used for PCIE MMIO
85 pub const MEM_32BIT_DEVICES_START: GuestAddress = GuestAddress(0x1000_0000);
86 pub const MEM_32BIT_DEVICES_SIZE: u64 = 0x2000_0000;
87 
88 /// PCI MMCONFIG space (start: after the device space at 1 GiB, length: 256MiB)
89 pub const PCI_MMCONFIG_START: GuestAddress = GuestAddress(0x3000_0000);
90 pub const PCI_MMCONFIG_SIZE: u64 = 256 << 20;
91 // One bus with potentially 256 devices (32 slots x 8 functions).
92 pub const PCI_MMIO_CONFIG_SIZE_PER_SEGMENT: u64 = 4096 * 256;
93 
94 /// Start of RAM.
95 pub const RAM_START: GuestAddress = GuestAddress(0x4000_0000);
96 
97 /// 32-bit reserved area: 64MiB before 4GiB
98 pub const MEM_32BIT_RESERVED_START: GuestAddress = GuestAddress(0xfc00_0000);
99 pub const MEM_32BIT_RESERVED_SIZE: u64 = 0x0400_0000;
100 
101 /// Start of 64-bit RAM.
102 pub const RAM_64BIT_START: GuestAddress = GuestAddress(0x1_0000_0000);
103 
104 /// Kernel command line maximum size.
105 /// As per `arch/arm64/include/uapi/asm/setup.h`.
106 pub const CMDLINE_MAX_SIZE: usize = 2048;
107 
108 /// FDT is at the beginning of RAM.
109 /// Maximum size of the device tree blob as specified in https://www.kernel.org/doc/Documentation/arm64/booting.txt.
110 pub const FDT_START: GuestAddress = RAM_START;
111 pub const FDT_MAX_SIZE: u64 = 0x20_0000;
112 
113 /// Put ACPI table above dtb
114 pub const ACPI_START: GuestAddress = GuestAddress(RAM_START.0 + FDT_MAX_SIZE);
115 pub const ACPI_MAX_SIZE: u64 = 0x20_0000;
116 pub const RSDP_POINTER: GuestAddress = ACPI_START;
117 
118 /// Kernel start after FDT and ACPI
119 pub const KERNEL_START: GuestAddress = GuestAddress(ACPI_START.0 + ACPI_MAX_SIZE);
120 
121 /// Pci high memory base
122 pub const PCI_HIGH_BASE: GuestAddress = GuestAddress(0x2_0000_0000);
123 
124 // As per virt/kvm/arm/vgic/vgic-kvm-device.c we need
125 // the number of interrupts our GIC will support to be:
126 // * bigger than 32
127 // * less than 1023 and
128 // * a multiple of 32.
129 // We are setting up our interrupt controller to support a maximum of 256 interrupts.
130 /// First usable interrupt on aarch64
131 pub const IRQ_BASE: u32 = 32;
132 
133 /// Number of supported interrupts
134 pub const IRQ_NUM: u32 = 256;
135