| /src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 250 MI.getOperand(0).setSubReg(KilledProdSubReg); in processBlock()
251 MI.getOperand(1).setSubReg(KilledProdSubReg); in processBlock()
252 MI.getOperand(3).setSubReg(AddSubReg); in processBlock()
266 MI.getOperand(2).setSubReg(AddSubReg); in processBlock()
271 MI.getOperand(2).setSubReg(OtherProdSubReg); in processBlock()
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| H A D | PPCVSXCopy.cpp | 134 SrcMO.setSubReg(PPC::sub_64); in processBlock()
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNPreRAOptimizations.cpp | 134 I.getOperand(1).setSubReg(DefSrcMO.getSubReg()); in processReg()
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| H A D | SIPreAllocateWWMRegs.cpp | 136 MO.setSubReg(0); in rewriteRegs()
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| H A D | GCNRewritePartialRegUses.cpp | 470 MO.setSubReg(SubReg); in rewriteReg()
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| H A D | SIFoldOperands.cpp | 896 UseMI->getOperand(1).setSubReg(OpToFold.getSubReg()); in foldOperand()
1036 UseMI->getOperand(1).setSubReg(OpToFold.getSubReg()); in foldOperand()
1976 MO.setSubReg(AGPRSubReg); in tryFoldPhiAGPR()
2167 MO->setSubReg(AMDGPU::NoSubRegister); in tryOptimizeAGPRPhis()
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| H A D | SIInstrInfo.cpp | 2617 UseMO->setSubReg(AMDGPU::NoSubRegister); in reMaterialize()
2623 MI->getOperand(0).setSubReg(AMDGPU::NoSubRegister); in reMaterialize()
2763 NonRegOp.setSubReg(SubReg); in swapRegAndNonRegOperand()
3479 UseMI.getOperand(0).setSubReg(0); in foldImmediate()
3575 Src0->setSubReg(SrcSubReg); in foldImmediate()
5955 Src0.setSubReg(Src1.getSubReg()); in legalizeOperandsVOP2()
5960 Src1.setSubReg(Src0SubReg); in legalizeOperandsVOP2()
6237 Op.setSubReg(0); in legalizeGenericOperand()
9944 Op.setSubReg(AMDGPU::sub0); in enforceOperandRCAlignment()
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| /src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 652 UseMO->setSubReg(0); in INITIALIZE_PASS_DEPENDENCY()
920 MOSrc.setSubReg(NewSubReg); in RewriteCurrentSource()
1010 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1137 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1302 NewCopy->getOperand(0).setSubReg(Def.SubReg); in rewriteSource()
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| H A D | CodeGenCommonISel.cpp | 288 UseMO.setSubReg(Op0->getSubReg()); in salvageDebugInfoForDbgValue()
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| H A D | TwoAddressInstructionPass.cpp | 1542 SrcMO.setSubReg(0); in collectTiedOperands()
1666 MO.setSubReg(0); in processTiedPairs()
1680 MO.setSubReg(0); in processTiedPairs()
1923 mi->getOperand(0).setSubReg(SubIdx); in run()
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| H A D | RegAllocFast.cpp | 1001 MO.setSubReg(0); in allocVirtRegUndef()
1196 MO.setSubReg(0); in setPhysReg()
1511 MO.setSubReg(0); in allocateInstruction()
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| H A D | MachineSink.cpp | 587 MO->setSubReg(0); in PerformSinkAndFold()
1430 DbgMO.setSubReg(SrcMO->getSubReg()); in attemptDebugCopyProp()
1844 DbgOp.setSubReg(MI.getOperand(1).getSubReg()); in SalvageUnsunkDebugUsersOfCopy()
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| H A D | MachineOperand.cpp | 90 setSubReg(SubIdx); in substVirtReg()
99 setSubReg(0); in substPhysReg()
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| H A D | TargetInstrInfo.cpp | 228 CommutedMI->getOperand(0).setSubReg(SubReg0); in commuteInstructionImpl()
232 CommutedMI->getOperand(Idx2).setSubReg(SubReg1); in commuteInstructionImpl()
233 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
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| H A D | VirtRegMap.cpp | 604 MO.setSubReg(0); in rewrite()
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| H A D | LiveDebugVariables.cpp | 1368 MO.setSubReg(locations[OldLocNo].getSubReg()); in splitLocation()
1553 Loc.setSubReg(0); in rewriteLocations()
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| H A D | TailDuplicator.cpp | 454 MO.setSubReg( in duplicateInstruction()
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| /src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenMemAbsolute.cpp | 202 MIB->getOperand(0).setSubReg(MO0.getSubReg()); in runOnMachineFunction()
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| H A D | RDFCopy.cpp | 221 Op.setSubReg(0); in run()
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| H A D | HexagonBitSimplify.cpp | 408 I->setSubReg(NewSR); in replaceRegWithSub()
427 I->setSubReg(NewSR); in replaceSubWithSub()
1967 ValOp.setSubReg(H.Sub); in genStoreUpperHalf()
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| H A D | HexagonExpandCondsets.cpp | 949 Op.setSubReg(RN.Sub); in renameInRange()
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| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 490 void setSubReg(unsigned subReg) { in setSubReg() function
859 Op.setSubReg(SubReg);
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| H A D | MachineInstr.h | 1975 MO.setSubReg(0);
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| /src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86DomainReassignment.cpp | 512 MO.setSubReg(0); in reassign()
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| /src/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 334 I.getOperand(1).setSubReg(getSubRegIndex(DstRC)); in selectCopy()
849 I.getOperand(1).setSubReg(SubIdx); in selectTruncOrPtrToInt()
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