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Searched refs:getTargetExtractSubreg (Results 1 – 21 of 21) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp252 SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32, in tryInlineAsm()
254 SDValue Sub1 = CurDAG->getTargetExtractSubreg(SP::sub_odd, dl, MVT::i32, in tryInlineAsm()
H A DSparcISelLowering.cpp2933 SDValue Hi32 = DAG.getTargetExtractSubreg(SP::sub_even, dl, MVT::f32, in LowerF64Op()
2935 SDValue Lo32 = DAG.getTargetExtractSubreg(SP::sub_odd, dl, MVT::f32, in LowerF64Op()
3082 SDValue Hi64 = DAG.getTargetExtractSubreg(SP::sub_even64, dl, MVT::f64, in LowerFNEGorFABS()
3084 SDValue Lo64 = DAG.getTargetExtractSubreg(SP::sub_odd64, dl, MVT::f64, in LowerFNEGorFABS()
/src/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp219 CurDAG->getTargetExtractSubreg(CSKY::sub32_0, dl, MVT::i32, RegCopy); in selectInlineAsm()
221 CurDAG->getTargetExtractSubreg(CSKY::sub32_32, dl, MVT::i32, RegCopy); in selectInlineAsm()
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp915 return CurDAG->getTargetExtractSubreg(AArch64::sub_32, dl, MVT::i32, N); in narrowIfNeeded()
1693 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectLoad()
1732 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectPostLoad()
1839 ReplaceUses(SDValue(N, I), CurDAG->getTargetExtractSubreg( in SelectPExtPair()
1855 ReplaceUses(SDValue(N, I), CurDAG->getTargetExtractSubreg( in SelectWhilePair()
1870 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectCVTIntrinsic()
1909 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectDestructiveMultiIntrinsic()
1939 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectPredicatedLoad()
1974 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectContiguousMultiVectorLoad()
2009 ReplaceUses(SDValue(Node, I), CurDAG->getTargetExtractSubreg( in SelectMultiVectorLuti()
[all …]
H A DAArch64ISelLowering.cpp4349 SDValue Result = DAG.getTargetExtractSubreg(AArch64::hsub, dl, VT, Narrow); in LowerFP_ROUND()
4946 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, OpVT, Op); in LowerBITCAST()
10022 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, VT, BSP); in LowerFCOPYSIGN()
10024 return DAG.getTargetExtractSubreg(AArch64::ssub, DL, VT, BSP); in LowerFCOPYSIGN()
10026 return DAG.getTargetExtractSubreg(AArch64::dsub, DL, VT, BSP); in LowerFCOPYSIGN()
10777 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, Ty, Res); in LowerSELECT()
26006 SDValue Lo = DAG.getTargetExtractSubreg(SubReg1, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results()
26008 SDValue Hi = DAG.getTargetExtractSubreg(SubReg2, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results()
/src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h460 return DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, V); in LoHalf()
471 return DAG.getTargetExtractSubreg(Hexagon::isub_hi, dl, MVT::i32, V); in HiHalf()
H A DHexagonISelDAGToDAGHVX.cpp1196 Op = DAG.getTargetExtractSubreg(Sub, dl, HalfTy, Op); in materialize()
1887 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, Vec); in scalarizeShuffle()
1889 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, Vec); in scalarizeShuffle()
2585 SDValue Ext = DAG.getTargetExtractSubreg(SubReg, SDLoc(N), ResTy, Inp); in selectExtractSubvector()
H A DHexagonISelDAGToDAG.cpp530 Value = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, in SelectIndexedStore()
719 SDValue Ext = CurDAG->getTargetExtractSubreg(SubReg, SDLoc(N), ResTy, Inp); in SelectExtractSubvector()
832 SDValue E = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, dl, ResTy, in SelectVAlign()
/src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2250 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD()
2533 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane()
2839 CurDAG->getTargetExtractSubreg(ARM::qsub_0 + i, Loc, VT, in SelectMVE_VLD()
2945 SDValue SubReg = CurDAG->getTargetExtractSubreg(SubRegs[ResIdx], Loc, in SelectCDE_CXxD()
3070 CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg)); in SelectVLDDup()
3127 SDValue NewExt = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt()
3139 SDValue Inp1 = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt()
3141 SDValue Inp2 = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt()
4065 SDValue Lo = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32, in Select()
4067 SDValue Hi = CurDAG->getTargetExtractSubreg(ARM::gsub_1, dl, MVT::i32, in Select()
[all …]
H A DARMISelLowering.cpp10504 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_1 : ARM::gsub_0, in ReplaceCMP_SWAP_64Results()
10507 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_0 : ARM::gsub_1, in ReplaceCMP_SWAP_64Results()
/src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp372 CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, SuperReg)); in selectVLSEG()
413 CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, SuperReg)); in selectVLSEGFF()
465 CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, SuperReg)); in selectVLXSEG()
1037 SDValue Lo = CurDAG->getTargetExtractSubreg(RISCV::sub_gpr_even, DL, VT, in Select()
1043 SDValue Hi = CurDAG->getTargetExtractSubreg(RISCV::sub_gpr_odd, DL, VT, in Select()
2276 SDValue Extract = CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, V); in Select()
H A DRISCVISelLowering.cpp10376 Vec = DAG.getTargetExtractSubreg(SubRegIdx, DL, ContainerSubVecVT, Vec); in lowerEXTRACT_SUBVECTOR()
10396 Vec = DAG.getTargetExtractSubreg(SubRegIdx, DL, InterSubVT, Vec); in lowerEXTRACT_SUBVECTOR()
/src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp977 return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32, DL, VT, N); in convertTo()
1201 Node, CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, Op).getNode()); in loadVectorConstant()
H A DSystemZISelLowering.cpp1561 SDValue Hi = DAG.getTargetExtractSubreg(SystemZ::subreg_h64, in lowerGR128ToI128()
1563 SDValue Lo = DAG.getTargetExtractSubreg(SystemZ::subreg_l64, in lowerGR128ToI128()
3181 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
3182 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
3861 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, in lowerBITCAST()
3870 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST()
6283 DAG.getTargetExtractSubreg(SystemZ::subreg_l64, SL, MVT::f64, Src); in expandBitCastF128ToI128()
6285 DAG.getTargetExtractSubreg(SystemZ::subreg_h64, SL, MVT::f64, Src); in expandBitCastF128ToI128()
/src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp5891 CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, MVT::i8, Result); in Select()
5967 CurDAG->getTargetExtractSubreg(X86::sub_8bit_hi, dl, MVT::i8, FNSTSW); in Select()
6096 CurDAG->getTargetExtractSubreg(SubRegIdx, dl, SubRegVT, Shift); in Select()
6181 Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg); in Select()
6302 Result = CurDAG->getTargetExtractSubreg(SubIndex, dl, VT, Result); in Select()
6323 Result = CurDAG->getTargetExtractSubreg(SubIndex, dl, VT, Result); in Select()
H A DX86ISelLowering.cpp26412 SDValue Result0 = DAG.getTargetExtractSubreg(X86::sub_mask_0, DL, in LowerINTRINSIC_WO_CHAIN()
26414 SDValue Result1 = DAG.getTargetExtractSubreg(X86::sub_mask_1, DL, in LowerINTRINSIC_WO_CHAIN()
/src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp3021 Lo = CurDAG->getTargetExtractSubreg( in SelectVOP3PMods()
3027 Hi = CurDAG->getTargetExtractSubreg( in SelectVOP3PMods()
H A DSIISelLowering.cpp15325 SDValue PtrLo = DAG.getTargetExtractSubreg(AMDGPU::sub0, DL, MVT::i32, Ptr); in buildRSRC()
15326 SDValue PtrHi = DAG.getTargetExtractSubreg(AMDGPU::sub1, DL, MVT::i32, Ptr); in buildRSRC()
/src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1701 SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,
/src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp5890 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
/src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp10946 SDValue SelectionDAG::getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT, in getTargetExtractSubreg() function in SelectionDAG