| /src/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 50 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
158 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
171 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
184 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
197 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
206 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
221 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
249 return getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF; in getDispRIEncoding()
263 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF); in getDispRIXEncoding()
279 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 4) & 0xFFF); in getDispRIX16Encoding()
[all …]
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| H A D | PPCMCCodeEmitter.h | 105 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 528 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
723 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
748 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding()
750 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
764 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
766 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
778 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
780 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
792 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
794 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
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| H A D | MipsMCCodeEmitter.h | 177 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /src/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEMCCodeEmitter.cpp | 63 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
90 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in VEMCCodeEmitter
122 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
135 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI))); in getCCOpValue()
145 getMachineOpValue(MI, MO, Fixups, STI))); in getRDOpValue()
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| /src/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCCodeEmitter.cpp | 68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
113 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
122 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
211 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
224 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
237 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
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| /src/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 58 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
110 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
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| /src/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
79 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
103 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::MSP430MCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | R600MCCodeEmitter.cpp | 47 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
152 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
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| H A D | AMDGPUMCCodeEmitter.cpp | 48 void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op,
407 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
468 getMachineOpValue(MI, MO, Op, Fixups, STI); in getSOPPBrEncoding()
584 void AMDGPUMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in AMDGPUMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kMCCodeEmitter.cpp | 47 void getMachineOpValue(const MCInst &MI, const MCOperand &Op,
199 void M68kMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &Op, in getMachineOpValue() function in M68kMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/ |
| H A D | XtensaMCCodeEmitter.cpp | 58 uint32_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
146 XtensaMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in XtensaMCCodeEmitter
268 uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getMemRegEncoding()
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| /src/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCCodeEmitter.cpp | 59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
148 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.h | 68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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| H A D | HexagonMCCodeEmitter.cpp | 708 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRMCCodeEmitter.h | 94 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| H A D | AVRMCCodeEmitter.cpp | 255 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::AVRMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 64 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
101 LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in LoongArchMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 80 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
364 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in RISCVMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.h | 45 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| H A D | CSKYMCCodeEmitter.cpp | 235 CSKYMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in CSKYMCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 61 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
223 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
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| /src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 87 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
542 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter
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