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Searched refs:XCore (Results 1 – 25 of 25) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp44 : XCoreGenRegisterInfo(XCore::LR) { in XCoreRegisterInfo()
69 case XCore::LDWFI: in InsertFPImmInst()
70 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) in InsertFPImmInst()
75 case XCore::STWFI: in InsertFPImmInst()
76 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) in InsertFPImmInst()
82 case XCore::LDAWFI: in InsertFPImmInst()
83 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) in InsertFPImmInst()
101 RS->scavengeRegisterBackwards(XCore::GRRegsRegClass, II, false, 0); in InsertFPConstInst()
106 case XCore::LDWFI: in InsertFPConstInst()
107 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) in InsertFPConstInst()
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H A DXCoreInstrInfo.cpp34 namespace XCore { namespace
49 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP), in XCoreInstrInfo()
65 if (Opcode == XCore::LDWFI) in isLoadFromStackSlot()
85 if (Opcode == XCore::STWFI) in isStoreToStackSlot()
102 return BrOpc == XCore::BRFU_u6 in IsBRU()
103 || BrOpc == XCore::BRFU_lu6 in IsBRU()
104 || BrOpc == XCore::BRBU_u6 in IsBRU()
105 || BrOpc == XCore::BRBU_lu6; in IsBRU()
109 return BrOpc == XCore::BRFT_ru6 in IsBRT()
110 || BrOpc == XCore::BRFT_lru6 in IsBRT()
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H A DXCoreFrameLowering.cpp34 static const unsigned FramePtr = XCore::R10;
106 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in IfNeededExtSP()
128 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in IfNeededLDAWSP()
129 BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(OpImm); in IfNeededLDAWSP()
145 XCore::LR)); in GetSpillList()
201 int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in RestoreSpillList()
241 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDWSP_ru6), XCore::R11).addImm(0); in emitPrologue()
261 int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; in emitPrologue()
262 MBB.addLiveIn(XCore::LR); in emitPrologue()
265 MIB->addRegisterKilled(XCore::LR, MF.getSubtarget().getRegisterInfo(), in emitPrologue()
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H A DXCoreISelDAGToDAG.cpp135 Reg = CurDAG->getRegister(XCore::CP, MVT::i32); in SelectInlineAsmMemoryOperand()
138 Reg = CurDAG->getRegister(XCore::DP, MVT::i32); in SelectInlineAsmMemoryOperand()
158 N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl, MVT::i32, MskSize)); in Select()
165 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32, in Select()
180 ReplaceNode(N, CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, in Select()
187 ReplaceNode(N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, in Select()
194 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, in Select()
201 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32, in Select()
208 ReplaceNode(N, CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, in Select()
214 ReplaceNode(N, CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, in Select()
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H A DXCore.td1 //===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===//
9 // This is the top level entry point for the XCore target.
30 // XCore processors supported.
43 def XCore : Target {
H A DXCoreRegisterInfo.td1 //===-- XCoreRegisterInfo.td - XCore Register defs ---------*- tablegen -*-===//
10 // Declarations that describe the XCore register file
15 let Namespace = "XCore";
44 def GRRegs : RegisterClass<"XCore", [i32], 32,
53 def RRegs : RegisterClass<"XCore", [i32], 32,
H A DXCoreCallingConv.td1 //===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
8 // This describes the calling conventions for XCore architecture.
12 // XCore Return Value Calling Convention
24 // XCore Argument Calling Conventions
H A DXCoreMachineFunctionInfo.cpp45 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createLRSpillSlot()
63 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createFPSpillSlot()
76 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createEHSpillSlot()
H A DXCoreAsmPrinter.cpp266 case XCore::DBG_VALUE: in emitInstruction()
268 case XCore::ADD_2rus: in emitInstruction()
277 case XCore::BR_JT: in emitInstruction()
278 case XCore::BR_JT32: in emitInstruction()
281 if (MI->getOpcode() == XCore::BR_JT) in emitInstruction()
H A DXCoreISelLowering.h128 return XCore::R0; in getExceptionPointerRegister()
135 return XCore::R1; in getExceptionSelectorRegister()
H A DXCoreFrameToArgsOffsetElim.cpp54 if (MBBI->getOpcode() == XCore::FRAME_TO_ARGS_OFFSET) { in runOnMachineFunction()
H A DXCoreISelLowering.cpp76 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass); in XCoreTargetLowering()
81 setStackPointerRegisterToSaveRestore(XCore::SP); in XCoreTargetLowering()
830 unsigned StackReg = XCore::R2; in LowerEH_RETURN()
831 unsigned HandlerReg = XCore::R3; in LowerEH_RETURN()
1219 Register VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments()
1252 XCore::R0, XCore::R1, XCore::R2, XCore::R3 in LowerCCCArguments()
1269 Register VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments()
1430 assert((MI.getOpcode() == XCore::SELECT_CC) && in EmitInstrWithCustomInserter()
1462 BuildMI(BB, dl, TII.get(XCore::BRFT_lru6)) in EmitInstrWithCustomInserter()
1478 BuildMI(*BB, BB->begin(), dl, TII.get(XCore::PHI), MI.getOperand(0).getReg()) in EmitInstrWithCustomInserter()
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H A DXCoreInstrFormats.td1 //===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===//
16 let Namespace = "XCore";
25 // XCore pseudo instructions format
H A DXCoreInstrInfo.td1 //===-- XCoreInstrInfo.td - Target Description for XCore ---*- tablegen -*-===//
9 // This file describes the XCore instructions in TableGen format.
25 // XCore specific DAG Nodes.
1279 // ashr X, 32 is equivalent to ashr X, 31 on the XCore.
/src/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp181 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo); in DecodeGRRegsRegisterClass()
191 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo); in DecodeRRegsRegisterClass()
256 Inst.setOpcode(XCore::STW_2rus); in Decode2OpInstructionFail()
259 Inst.setOpcode(XCore::LDW_2rus); in Decode2OpInstructionFail()
262 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
265 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
268 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
271 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
274 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
277 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
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/src/contrib/llvm-project/clang/lib/Driver/ToolChains/
H A DXCore.cpp25 void tools::XCore::Assembler::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
59 void tools::XCore::Linker::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
95 return new tools::XCore::Assembler(*this); in buildAssembler()
99 return new tools::XCore::Linker(*this); in buildLinker()
H A DXCore.h19 namespace XCore {
/src/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsXCore.def1 //===--- BuiltinsXCore.def - XCore Builtin function database ----*- C++ -*-===//
9 // This file defines the XCore-specific builtin function database. Users of
H A DTargetBuiltins.h340 namespace XCore {
373 Hexagon::LastTSBuiltin, Mips::LastTSBuiltin, XCore::LastTSBuiltin,
/src/contrib/llvm-project/llvm/lib/Target/XCore/MCTargetDesc/
H A DXCoreMCTargetDesc.cpp49 InitXCoreMCRegisterInfo(X, XCore::LR); in createXCoreMCRegisterInfo()
64 MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, XCore::SP, 0); in createXCoreMCAsmInfo()
/src/contrib/llvm-project/clang/lib/Basic/Targets/
H A DXCore.cpp37 clang::XCore::LastTSBuiltin - Builtin::FirstTSBuiltin); in getTargetBuiltins()
/src/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsXCore.td1 //==- IntrinsicsXCore.td - XCore intrinsics -*- tablegen -*-==//
9 // This file defines all of the XCore-specific intrinsics.
/src/contrib/llvm-project/
H A DFREEBSD-Xlist754 llvm/lib/Target/XCore/CMakeLists.txt
755 llvm/lib/Target/XCore/Disassembler/CMakeLists.txt
756 llvm/lib/Target/XCore/MCTargetDesc/CMakeLists.txt
757 llvm/lib/Target/XCore/README.txt
758 llvm/lib/Target/XCore/TargetInfo/CMakeLists.txt
/src/lib/clang/libclang/
H A DMakefile275 SRCS_MIN+= Basic/Targets/XCore.cpp
365 SRCS_MIN+= CodeGen/Targets/XCore.cpp
435 SRCS_MIN+= Driver/ToolChains/XCore.cpp
/src/lib/clang/libllvm/
H A DMakefile2107 X86/x86 XCore/xcore