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/src/sys/contrib/device-tree/Bindings/phy/
H A Dapm-xgene-phy.txt19 Two set of 3-tuple setting for each (up to 3)
25 Two set of 3-tuple setting for each (up to 3)
28 gain control. Two set of 3-tuple setting for each
31 - apm,tx-amplitude : Amplitude control. Two set of 3-tuple setting for
35 - apm,tx-pre-cursor1 : 1st pre-cursor emphasis taps control. Two set of
39 - apm,tx-pre-cursor2 : 2nd pre-cursor emphasis taps control. Two set of
43 - apm,tx-post-cursor : Post-cursor emphasis taps control. Two set of
/src/contrib/arm-optimized-routines/math/aarch64/experimental/
H A Dacoshf_2u8.c15 #define Two 0x40000000 macro
42 if (ix > Two) in acoshf()
H A Dacosh_3u.c16 #define Two (0x4000000000000000) /* asuint64(2.0). */ macro
48 if (ix >= Two) in acosh()
/src/contrib/bmake/unit-tests/
H A Dvarmod-match.mk40 .if ${One Two Three Four five six seven so s:L:Ms??*} != "six seven"
89 .if ${One Two Three Four five six seven:L:M[A-Z]*} != "One Two Three Four"
94 .if ${One Two Three Four five six seven:L:M[^A-Z]*} != "five six seven"
179 .if ${One Two Three Four five six seven:L:M[^s]*[ex]} != "One Three five"
/src/sys/contrib/device-tree/Bindings/timer/
H A Dandestech,atcpit100-timer.txt12 Two 16-bit timers
16 Two 8-bit timer and one 8-bit PWM
H A Denergymicro,efm32-timer.txt3 The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be
H A Dsnps,arc-timer.txt4 - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically
/src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP10.td43 def P10_BR : ProcResource<2>; // Two Branch pipelines.
46 def P10_DV : ProcResource<2>; // Two Fixed-point divide (DIV) pipelines.
47 def P10_DX : ProcResource<2>; // Two 128-bit fixed-point and BCD pipelines.
49 def P10_LD : ProcResource<2>; // Two Load pipelines.
50 def P10_MM : ProcResource<2>; // Two 512-bit SIMD matrix multiply engine pipelines.
52 def P10_ST : ProcResource<2>; // Two ST-D pipelines.
53 def P10_SX : ProcResource<2>; // Two Simple Fixed-point (SFX) pipelines.
H A DPPCScheduleP8.td54 // Two ports to do loads or fixed-point operations.
55 // Two ports to do stores, fixed-point loads, or fixed-point operations.
56 // Two ports for fixed-point operations.
57 // Two issue ports shared by 2 DFP/2 VSX/2 VMX/1 CY/1 DFP operations.
67 // Two ports to do loads or fixed-point operations.
69 // Two ports to do stores, fixed-point loads, or fixed-point operations.
71 // Two issue ports shared by two floating-point, two VSX, two VMX, one crypto,
/src/sys/contrib/device-tree/Bindings/gpio/
H A Dmicrochip,pic32-gpio.txt8 - #gpio-cells: Two. The first cell is the pin number and
15 - #interrupt-cells: Two. The first cell is the GPIO number and second cell
H A Dgpio_oxnas.txt10 - #gpio-cells: Two. The first cell is the pin number and
16 - #interrupt-cells: Two. The first cell is the GPIO number and second cell
/src/contrib/libcbor/doc/source/api/
H A Dtype_4.rst13 Number of allocations (definite) Two plus any manipulations with the data
14 Number of allocations (indefinite) Two plus logarithmically many
H A Dtype_5.rst19 Number of allocations (definite) Two plus any manipulations with the data
20 Number of allocations (indefinite) Two plus logarithmically many
/src/sys/contrib/device-tree/src/powerpc/
H A Dmedia5200.dts114 device-width = <2>; // Two devices on each bank
121 device-width = <2>; // Two devices on each bank
/src/sys/contrib/device-tree/Bindings/pci/
H A Dti-pci.txt22 - reg : Two register ranges as listed in the reg-names property
27 - interrupts : Two interrupt entries must be specified. The first one is for
63 NOTE: Two DT nodes may be added for each PCI controller; one for host
/src/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-g12b-dreambox-two.dts12 model = "Dreambox Two";
/src/sys/contrib/device-tree/Bindings/clock/
H A Drenesas,h8s2678-pll-clock.txt13 - reg: Two rate selector (Multiply / Divide) register address
/src/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Dpamu.txt59 Two cells that specify the geometry of the primary PAMU
65 Two cells that specify the geometry of the secondary PAMU
84 Two cells that specify the location of the LIODN register
/src/sys/contrib/device-tree/Bindings/mmc/
H A Dvt8500-sdmmc.txt8 - interrupts: Two interrupts are required - regular irq and dma irq.
/src/sys/contrib/device-tree/Bindings/soc/fsl/
H A Dqman-portals.txt27 Definition: Two regions. The first is the cache-enabled region of
39 Definition: Two LIODN(s). DQRR LIODN (DLIODN) and Frame LIODN
/src/sys/contrib/device-tree/Bindings/sound/
H A Dname-prefix.txt12 Example: Two instances of the same component.
/src/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-octeon.txt1 * Two Wire Serial Interface (TWSI) / I2C
/src/sys/contrib/device-tree/Bindings/cpufreq/
H A Dimx-cpufreq-dt.txt12 - opp-supported-hw: Two bitmaps indicating:
/src/sys/contrib/device-tree/Bindings/serial/
H A Dnxp,lpc1850-uart.txt11 - dmas : Two or more DMA channel specifiers following the
/src/sys/contrib/device-tree/Bindings/watchdog/
H A Dzii,rave-sp-wdt.txt18 - wdt-timeout: Two byte nvmem cell specified as per

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