| /src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetPassConfig.cpp | 357 INITIALIZE_PASS(TargetPassConfig, "targetpassconfig",
359 char TargetPassConfig::ID = 0;
405 TargetPassConfig::~TargetPassConfig() { in ~TargetPassConfig()
438 void TargetPassConfig::setStartStopPasses() { in setStartStopPasses()
539 Expected<TargetPassConfig::StartStopInfo>
540 TargetPassConfig::getStartStopInfo(PassInstrumentationCallbacks &PIC) { in getStartStopInfo()
575 TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm) in TargetPassConfig() function in TargetPassConfig
603 CodeGenOptLevel TargetPassConfig::getOptLevel() const { in getOptLevel()
608 void TargetPassConfig::insertPass(AnalysisID TargetPassID, in insertPass()
622 TargetPassConfig *LLVMTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
[all …]
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| H A D | LLVMTargetMachine.cpp | 111 static TargetPassConfig *
117 TargetPassConfig *PassConfig = TM.createPassConfig(PM); in addPassesToGenerateCode()
216 TargetPassConfig *PassConfig = in addPassesToEmitFile()
221 if (TargetPassConfig::willCompleteCodeGenPipeline()) { in addPassesToEmitFile()
244 TargetPassConfig *PassConfig = in addPassesToEmitMC()
248 assert(TargetPassConfig::willCompleteCodeGenPipeline() && in addPassesToEmitMC()
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| /src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchTargetMachine.cpp | 144 class LoongArchPassConfig : public TargetPassConfig {
147 : TargetPassConfig(TM, PM) {} in LoongArchPassConfig()
165 TargetPassConfig *
179 TargetPassConfig::addIRPasses(); in addIRPasses()
185 TargetPassConfig::addCodeGenPrepare(); in addCodeGenPrepare()
210 TargetPassConfig::addMachineSSAOptimization(); in addMachineSSAOptimization()
225 return TargetPassConfig::addRegAssignAndRewriteFast(); in addRegAssignAndRewriteFast()
232 return TargetPassConfig::addRegAssignAndRewriteOptimized(); in addRegAssignAndRewriteOptimized()
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| /src/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVTargetMachine.cpp | 96 class SPIRVPassConfig : public TargetPassConfig {
99 : TargetPassConfig(TM, PM), TM(TM) {} in SPIRVPassConfig()
147 TargetPassConfig::addPostRegAlloc(); in addPostRegAlloc()
155 TargetPassConfig *SPIRVTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
178 TargetPassConfig::addIRPasses(); in addIRPasses()
186 TargetPassConfig::addISelPrepare(); in addISelPrepare()
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| /src/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVO0PreLegalizerCombiner.cpp | 49 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
69 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, in RISCVO0PreLegalizerCombinerImpl()
105 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
125 auto &TPC = getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
144 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| H A D | RISCVPostLegalizerCombiner.cpp | 56 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
77 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, in RISCVPostLegalizerCombinerImpl()
110 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
137 auto *TPC = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
164 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| H A D | RISCVPreLegalizerCombiner.cpp | 51 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
72 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, in RISCVPreLegalizerCombinerImpl()
107 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
131 auto &TPC = getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
159 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| /src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsPostLegalizerCombiner.cpp | 51 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
72 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, in MipsPostLegalizerCombinerImpl()
107 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
131 auto *TPC = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
155 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| H A D | MipsPreLegalizerCombiner.cpp | 46 const TargetPassConfig *TPC, GISelKnownBits &KB, in MipsPreLegalizerCombinerImpl()
106 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
123 auto *TPC = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
139 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| /src/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DirectXTargetMachine.cpp | 69 class DirectXPassConfig : public TargetPassConfig {
72 : TargetPassConfig(TM, PM) {} in DirectXPassConfig()
114 TargetPassConfig *PassConfig = createPassConfig(PM); in addPassesToEmitFile()
123 if (TargetPassConfig::willCompleteCodeGenPipeline()) { in addPassesToEmitFile()
151 TargetPassConfig *DirectXTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
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| /src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64O0PreLegalizerCombiner.cpp | 53 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
75 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, in AArch64O0PreLegalizerCombinerImpl()
138 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
158 auto &TPC = getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
181 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| /src/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430TargetMachine.cpp | 59 class MSP430PassConfig : public TargetPassConfig {
62 : TargetPassConfig(TM, PM) {} in MSP430PassConfig()
74 TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
88 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreTargetMachine.cpp | 65 class XCorePassConfig : public TargetPassConfig {
68 : TargetPassConfig(TM, PM) {} in XCorePassConfig()
82 TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
89 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRTargetMachine.cpp | 62 class AVRPassConfig : public TargetPassConfig {
65 : TargetPassConfig(TM, PM) {} in AVRPassConfig()
78 TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
88 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCTargetMachine.cpp | 51 class ARCPassConfig : public TargetPassConfig {
54 : TargetPassConfig(TM, PM) {} in ARCPassConfig()
68 TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
75 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiTargetMachine.cpp | 87 class LanaiPassConfig : public TargetPassConfig {
90 : TargetPassConfig(TM, *PassManager) {} in LanaiPassConfig()
103 TargetPassConfig *
111 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyTargetMachine.cpp | 332 class WebAssemblyPassConfig final : public TargetPassConfig {
335 : TargetPassConfig(TM, PM) {} in WebAssemblyPassConfig()
372 TargetPassConfig *
485 TargetPassConfig::addIRPasses(); in addIRPasses()
498 TargetPassConfig::addISelPrepare(); in addISelPrepare()
502 (void)TargetPassConfig::addInstSelector(); in addInstSelector()
534 TargetPassConfig::addOptimizedRegAlloc(); in addOptimizedRegAlloc()
556 TargetPassConfig::addPostRegAlloc(); in addPostRegAlloc()
560 TargetPassConfig::addPreEmitPass(); in addPreEmitPass()
630 TargetPassConfig::addPreISel(); in addPreISel()
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| /src/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFTargetMachine.cpp | 86 class BPFPassConfig : public TargetPassConfig {
89 : TargetPassConfig(TM, PM) {} in BPFPassConfig()
107 TargetPassConfig *BPFTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
150 TargetPassConfig::addIRPasses(); in addIRPasses()
171 TargetPassConfig::addMachineSSAOptimization(); in addMachineSSAOptimization()
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| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Combiner.h | 26 class TargetPassConfig; variable
55 const TargetPassConfig *TPC, GISelKnownBits *KB,
71 const TargetPassConfig *TPC;
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| H A D | InstructionSelector.h | 35 void setTargetPassConfig(const TargetPassConfig *T) { TPC = T; } in setTargetPassConfig()
40 const TargetPassConfig *TPC = nullptr;
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| /src/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VETargetMachine.cpp | 116 class VEPassConfig : public TargetPassConfig {
119 : TargetPassConfig(TM, PM) {} in VEPassConfig()
131 TargetPassConfig *VETargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
138 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYTargetMachine.cpp | 100 class CSKYPassConfig : public TargetPassConfig {
103 : TargetPassConfig(TM, PM) {} in CSKYPassConfig()
116 TargetPassConfig *CSKYTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
122 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetMachine.cpp | 332 class RISCVPassConfig : public TargetPassConfig {
335 : TargetPassConfig(TM, PM) { in RISCVPassConfig()
379 TargetPassConfig *RISCVTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
405 return TargetPassConfig::addRegAssignAndRewriteFast(); in addRegAssignAndRewriteFast()
416 return TargetPassConfig::addRegAssignAndRewriteOptimized(); in addRegAssignAndRewriteOptimized()
431 TargetPassConfig::addIRPasses(); in addIRPasses()
454 TargetPassConfig::addCodeGenPrepare(); in addCodeGenPrepare()
539 TargetPassConfig::addMachineSSAOptimization(); in addMachineSSAOptimization()
569 TargetPassConfig::addFastRegAlloc(); in addFastRegAlloc()
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| /src/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kTargetMachine.cpp | 146 class M68kPassConfig : public TargetPassConfig {
149 : TargetPassConfig(TM, PM) {} in M68kPassConfig()
169 TargetPassConfig *M68kTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
175 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetPassConfig.h | 85 class TargetPassConfig : public ImmutablePass {
148 TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm);
150 TargetPassConfig();
152 ~TargetPassConfig() override;
|