Searched refs:SPI2 (Results 1 – 25 of 30) sorted by relevance
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| /src/sys/contrib/device-tree/src/arm64/microchip/ |
| H A D | sparx5_nand.dtsi | 26 reg = <0x6>; /* SPI2 */
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| H A D | sparx5.dtsi | 134 * SPI2: value 6 - (SIBM,SIMC) = 0b0110
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| /src/sys/contrib/device-tree/Bindings/clock/ |
| H A D | brcm,bcm2835-aux-clock.txt | 6 The auxiliary peripherals (UART, SPI1, and SPI2) have a small register
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| /src/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | rda,8810pl-intc.txt | 25 7: SPI2
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| /src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8-apalis-eval.dtsi | 62 /* Apalis SPI2 */
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| H A D | imx8-apalis-ixora-v1.1.dtsi | 137 /* Apalis SPI2 */
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| H A D | imx8-apalis-ixora-v1.2.dtsi | 186 /* Apalis SPI2 */
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| H A D | imx95-phycore-fpsc.dtsi | 211 &lpspi3 { /* FPSC SPI2 */
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| H A D | imx8-apalis-v1.1.dtsi | 475 /* Apalis SPI2 */
1214 /* Apalis SPI2 */
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| H A D | imx8mp-phycore-fpsc.dtsi | 65 &ecspi2 { /* FPSC SPI2 */
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| /src/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | stm32mp1-clks.h | 29 #define SPI2 16 macro
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| /src/sys/contrib/device-tree/src/mips/mobileye/ |
| H A D | eyeq6h-pins.dtsi | 83 pinctrl-single,pins = <0x0a8 1>; // SPI2 pin group
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| /src/sys/contrib/device-tree/Bindings/spi/ |
| H A D | fsl-spi.txt | 6 1: QE subblock SPI2
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| /src/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx27-pdk.dts | 119 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
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| H A D | imx6ull-dhcom-som.dtsi | 24 spi1 = &ecspi4; /* DHCOM SPI2, special hardware required */
90 * DHCOM SPI2
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| H A D | imx6qdl-apalis.dtsi | 251 /* Apalis SPI2 */
971 /* SPI2 cs */
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| /src/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-g6-pinctrl.dtsi | 671 function = "SPI2";
951 function = "SPI2";
952 groups = "SPI2";
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| /src/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp157c-osd32mp1-red.dts | 117 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc CK_PER>, <&rcc PLL3_R>;
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| H A D | stm32mp15xx-dkx.dtsi | 439 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| H A D | stm32f746.dtsi | 300 clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI2)>;
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| H A D | stm32h743.dtsi | 113 resets = <&rcc STM32H7_APB1L_RESET(SPI2)>;
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| /src/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra30-apalis-eval.dts | 123 /* SPI5: Apalis SPI2 */
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| H A D | tegra124-apalis-v1.2-eval.dts | 120 /* SPI4: Apalis SPI2 */
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| H A D | tegra124-apalis-eval.dts | 118 /* SPI4: Apalis SPI2 */
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| H A D | tegra30-apalis-v1.1-eval.dts | 124 /* SPI5: Apalis SPI2 */
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