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Searched refs:PLL_CONTROL (Results 1 – 4 of 4) sorted by relevance

/src/sys/dev/bhnd/cores/pmu/
H A Dbhnd_pmu_private.h68 BHND_PMU_IND_READ((_sc), PLL_CONTROL, (_reg))
70 BHND_PMU_IND_WRITE((_sc), PLL_CONTROL, (_reg), (_val), (_mask))
/src/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dscorpion_reg_map.h298 volatile u_int32_t PLL_CONTROL; /* 0x14 - 0x18 */ member
H A Dosprey_reg_map.h602 volatile u_int32_t PLL_CONTROL; /* 0x7014 - 0x7018 */ member
2509 volatile u_int32_t PLL_CONTROL; /* 0xf4 - 0xf8 */ member
H A Dar9300reg.h1128 #define AR_RTC_PLL_CONTROL AR_RTC_OFFSET(PLL_CONTROL)